CN112487747B - Power element simulation method and device - Google Patents
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Abstract
The application is suitable for the field of integrated circuit design and layout, and provides a power element simulation method and device, comprising the following steps: firstly, obtaining a rectangular device model and parameters of the rectangular device model; then, stacking rectangular device models to construct power devices; then, the rectangular device model parameters are related to the power devices; and finally, simulating the power device according to the rectangular device model parameters, thereby avoiding errors generated by calculating the electric parameters of the power device by numerical operation of an interpolation method or an extrapolation method and improving the accuracy of electric parameter simulation of the power device.
Description
Technical Field
The application belongs to the technical field of component simulation, and particularly relates to a power element simulation method and device.
Background
In a conventional semiconductor device, accuracy of a model is required to ensure design accuracy, so that consistency of conversion of the simulation model to a process (S2S) is very important, and it is ensured that excessive or insufficient spare space is not required in addition to the accuracy. Power devices are commonly used in power circuits, mainly on top of power field effect transistors, to provide corresponding currents, e.g. 2A and 4A, and thus have very large device sizes, e.g. 20000um, 40000um and 60000um.
The traditional simulation model is to measure the component size on the test pattern, the test pattern is usually composed of three groups of small-size components, the measurement data is provided for the reference points of three fixed points of the simulation model, the simulation model calculates the sizes of other design components without real size measurement by an interpolation method or an extrapolation method, and then provides corresponding current, voltage, dynamic switch and other behavior descriptions to enable a user to simulate the device. The disadvantage of this approach is apparent, since the device model uses numerical operations to estimate the device size without actual measurement data, there is a clear gap between the model simulation result and the current of the actual device size, which can be as high as 15% to 20% error, and the designer is forced to use only larger design spare space for achieving the specification of the circuit for safety. This error will be amplified with larger dimensions. For example, as shown in fig. 1, the three dimensions of the points (t 1, t2 and t 3) actually measured by the model, plus the error caused by the fluctuation of the model itself, are only 3%, but when applied to a power device, the error between the point (s 1) simulated by the software and the actual points (a 1 and a 2) is as high as 15% to 20% due to the large size of the power device.
The traditional modeling can always define the characteristics of the component only by the process results of the first few times, and because the component is inevitably compensated in the long-time production process after entering the production volume, the test patterns placed on the chip grooves are required to be measured periodically and continuously to know how much real compensation is, and when the real compensation exceeds a certain value, the model is required to be updated.
After the process platen is formally opened, the fab also strengthens or adjusts the existing process, which results in increased performance of the device, but typically does not measure the power device again next time, and thus creates another error accumulation.
The power device itself, when measured, causes thermal effects due to the very large amount of current, which are unavoidable among the measurements of the device, but can cause excessive pessimistic results, as the accumulation of thermal energy can lead to a drop in the device current, which also forms another source of errors in the measurement.
Therefore, aiming at the measurement result of the small-size component for the model, calculating the error between the electric parameter generated by the power device and the electric parameter of the actual power device by using the numerical operation of an interpolation method or an extrapolation method; in addition, in the actual production process, due to factors such as different factory buildings, different equipment and machine stations and the like, compensation between the original measurement is caused, and cannot be observed on the monitoring wafer; in addition, during the process being optimized, additional errors may also occur due to the lack of recalibration of the power device; finally, in the measuring process of the power device, the real current is estimated to be excessively pessimistic due to the fact that the thermal effect is too serious; therefore, the conventional power device simulation method cannot accurately simulate the electrical parameters of the power device.
Disclosure of Invention
The embodiment of the application provides a power element simulation method and a device, which can improve the accuracy of electric parameter simulation of a power element.
In a first aspect, an embodiment of the present application provides a power element simulation method, including:
obtaining a rectangular device model and rectangular device model parameters;
Superposing the rectangular device model to construct a power device;
Correlating the rectangular device model parameters with the power devices;
and simulating the power device according to the rectangular device model parameters.
In a possible implementation manner of the first aspect, the rectangular device modules are stacked in a parallel manner.
Illustratively, m rectangular device models are connected to obtain the power devices.
It should be appreciated that the manner in which the rectangular device modules are stacked as described above is only an alternative embodiment, and one possible implementation of the first aspect includes parallel connection.
In a second aspect, an embodiment of the present application provides a power element simulation apparatus, including:
The model acquisition module is used for acquiring a rectangular device model and rectangular device model parameters;
The building module is used for superposing the rectangular device model to build a power device;
The association module is used for associating the rectangular device model parameters with the power devices;
And the simulation module is used for simulating the power device according to the rectangular device model parameters.
In a third aspect, an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the power element emulation method of any one of the first aspects when the computer program is executed.
In a fourth aspect, an embodiment of the present application provides a computer readable storage medium storing a computer program, which when executed by a processor implements the power element simulation method of any one of the first aspects above.
In a fifth aspect, an embodiment of the present application provides a computer program product, which, when run on a terminal device, causes the terminal device to perform the power element emulation method according to any one of the first aspects above.
It will be appreciated that the advantages of the second to fifth aspects may be found in the relevant description of the first aspect, and are not described here again.
Firstly, acquiring a rectangular device model and parameters of the rectangular device model; then, superposing rectangular device models in a parallel mode and/or a serial mode to construct a power device; then, the rectangular device model parameters are related to the power devices; and finally, simulating the power device according to the rectangular device model parameters, thereby avoiding errors generated by calculating the electric parameters of the power device by numerical operation of an interpolation method or an extrapolation method and improving the accuracy of electric parameter simulation of the power device.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic illustration of an extrapolation method of a conventional power element simulation method;
FIG. 2 is a flow chart of a power device simulation method according to an embodiment of the application;
FIG. 3 is a schematic diagram of an arrangement of rectangular device models in a power device according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an arrangement of rectangular device models in a power device according to another embodiment of the present application;
FIG. 5 is a schematic diagram of a power device according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a power device according to another embodiment of the present application;
FIG. 7 is a flow chart of a power device simulation method according to another embodiment of the present application;
FIG. 8 is a schematic diagram of a power device simulation apparatus according to an embodiment of the present application;
FIG. 9 is a schematic diagram of another power device simulation apparatus according to an embodiment of the present application;
FIG. 10 is a schematic diagram of a power device simulation apparatus building module according to an embodiment of the present application;
Fig. 11 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in the present description and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
The power element simulation method provided by the embodiment of the application can be applied to electronic equipment such as mobile phones, tablet computers, wearable equipment, vehicle-mounted equipment, augmented reality (augmented reality, AR)/Virtual Reality (VR) equipment, notebook computers, ultra-mobile personal computer (UMPC), netbooks, personal digital assistants (personal DIGITAL ASSISTANT, PDA) and the like, and the embodiment of the application does not limit the specific types of the electronic equipment.
Fig. 2 shows a schematic flow chart of a power element simulation method provided by the present application, which can be applied to the above-mentioned electronic device by way of example and not limitation. The power element simulation method comprises the following steps:
s101: obtaining a rectangular device model and rectangular device model parameters.
Specifically, rectangular device model parameters include rectangular device resistance, rectangular device capacitance, and rectangular device inductance.
S102 superimposes the rectangular device model to construct a power device.
In particular implementations, as shown in fig. 3, adjacent rectangular device models in a power device may be arranged in sequence. As shown in fig. 4, adjacent rectangular device models in the power device may be sequentially arranged or mirror-symmetrical; when adjacent rectangular device models in the power device are mirror symmetry, the adjacent rectangular device models share the positive electrode power supply end or the negative electrode power supply end.
It should be noted that, in the step S102, the rectangular device models are stacked in parallel to construct the power device, and in this case, the step S102 includes:
A2. taking an integer of a quotient of the gate width of the power device divided by the width of the rectangular device model to obtain a second width coefficient m;
B2. the m rectangular device models are connected to obtain power devices.
Specifically, the sources of the m rectangular device model may be first commonly connected; then commonly connecting the grid electrodes of the m rectangular device model; and finally, commonly connecting the drains of the m rectangular device models. The obtained power device is shown in fig. 5 or fig. 6.
The m rectangular device models are connected in parallel to obtain the power device, so that a power device model with a large grid width is built, and the power device with a large current is built.
S103: rectangular device model parameters are associated with power devices. Alternatively, rectangular device model parameters may be associated with the power devices by circuit simulation software.
S104: and simulating the power device according to the rectangular device model parameters.
Specifically, electrical parameters of the power device may be calculated from rectangular device model parameters.
The step S104 specifically includes: calculating the resistance of the power device according to a parallel resistance calculation formula and the resistance of the rectangular device; calculating the capacitance of the power device according to a parallel capacitance calculation formula and the capacitance of the rectangular device; and calculating the inductance of the power device according to the parallel inductance calculation formula and the inductance of the rectangular device.
Optionally, as shown in fig. 7, step S99 and step 100 may be further included before step S101.
S99: rectangular devices are tested on the wafer's wafer slots to obtain rectangular device parameters.
And manufacturing rectangular devices on the wafer slice grooves according to the size of the rectangular devices, and measuring parameters of the rectangular devices.
S100: the rectangular device parameters are loaded into circuit simulation software to build a rectangular device model.
And loading the rectangular device size into circuit simulation software to model the rectangular device model, and setting parameters of the rectangular device model.
By testing rectangular devices on the wafer slots, rectangular device parameters are accurately measured, and a rectangular device model is built according to the rectangular device parameters, so that the consistency of conversion from a simulation model to a manufacturing process is improved.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.
Corresponding to the power element simulation method of the above embodiment, fig. 6 shows a block diagram of the power element simulation device provided in the embodiment of the present application, and for convenience of explanation, only the portion related to the embodiment of the present application is shown.
Referring to fig. 8, the power element simulation apparatus 30 includes a model acquisition module 310, a construction module 320, an association module 330, and a simulation module 340.
A model acquisition module 310, configured to acquire a rectangular device model and rectangular device model parameters;
a building module 320, configured to superimpose the rectangular device models to build a power device;
An association module 330 for associating rectangular device model parameters with power devices;
And the simulation module 340 is used for simulating the power device according to the rectangular device model parameters.
As shown in fig. 9, the power element simulation device 30 may further include a parameter acquisition module 350 and a model creation module 360.
A parameter obtaining module 350, configured to test a rectangular device on a wafer slot to obtain a rectangular device parameter;
Model building module 360 is used to load rectangular device parameters into circuit simulation software to build a rectangular device model.
The building block 320 is specifically configured to superimpose rectangular device models in parallel to build a power device, as shown in fig. 10, where the building block 320 includes a width factor obtaining block 325 and a power device obtaining block 326.
The width coefficient obtaining module 325 is configured to obtain a second width coefficient m by taking an integer that is a quotient of the power device gate width divided by the rectangular device model width.
The power device acquisition module 326 is configured to connect m rectangular device models in parallel to acquire a power device.
The power device acquisition module 326 is specifically configured to: firstly, the sources of the rectangular device models can be commonly connected; then commonly connecting the grid electrodes of the m rectangular device models; and finally, commonly connecting the drains of the m rectangular device models.
By way of example and not limitation, adjacent rectangular device models in a power device are arranged in sequence or mirror-symmetrical. When adjacent rectangular device models in the power device are in mirror symmetry, the adjacent rectangular device models share a positive power supply end or a negative power supply end.
The simulation module 340 is specifically configured to: and calculating the electrical parameters of the power device according to the rectangular device model parameters.
It should be noted that, because the content of information interaction and execution process between the above devices/units is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
The embodiment of the application also provides electronic equipment, which comprises: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, the processor implementing the steps in any of the various method embodiments described above when the computer program is executed.
The embodiments of the present application also provide a computer readable storage medium storing a computer program, which when executed by a processor implements steps of the above-described respective method embodiments.
Embodiments of the present application provide a computer program product which, when run on an electronic device, causes the electronic device to perform steps that may be carried out in the various method embodiments described above.
Fig. 11 is a schematic structural diagram of a power device simulation apparatus/electronic device according to an embodiment of the present application. As shown in fig. 11, the power element simulation apparatus/electronic device 11 of this embodiment includes: at least one processor 110 (only one processor is shown in fig. 11), a memory 111, and a computer program 112 stored in the memory 111 and executable on the at least one processor 110, the processor 110 implementing the steps in any of the various power element simulation method embodiments described above when executing the computer program 112.
The power device simulation apparatus/electronic device 11 may be a computing device such as a desktop computer, a notebook computer, a palm computer, and a cloud server. The power element emulation device/electronic device may include, but is not limited to, a processor 110, a memory 111. It will be appreciated by those skilled in the art that fig. 11 is merely an example of the power element emulation device/electronic device 11 and is not limiting of the power element emulation device/electronic device 11, and may include more or fewer components than shown, or may combine certain components, or may include different components, such as input-output devices, network access devices, etc.
The Processor 110 may be a central processing unit (Central Processing Unit, CPU), the Processor 110 may also be other general purpose processors, digital signal processors (DIGITAL SIGNAL processors, DSP), application SPECIFIC INTEGRATED Circuit (ASIC), off-the-shelf Programmable gate array (Field-Programmable GATE ARRAY, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 111 may in some embodiments be an internal storage unit of the power element emulation device/electronic device 11, such as a hard disk or a memory of the power element emulation device/electronic device 11. The memory 111 may also be an external storage device of the power element emulation device/electronic device 11 in other embodiments, such as a plug-in hard disk provided on the power element emulation device/electronic device 11, a smart memory card (SMART MEDIA CARD, SMC), a Secure Digital (SD) card, a flash memory card (FLASH CARD), etc. Further, the memory 111 may also include both an internal memory unit and an external memory device of the power element emulation device/electronic device 11. The memory 111 is used to store an operating system, application programs, boot loader (BootLoader), data, and other programs and the like, such as program codes of computer programs and the like. The memory 111 may also be used to temporarily store data that has been output or is to be output.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above-described embodiments, and may be implemented by a computer program to instruct related hardware, and the computer program may be stored in a computer readable storage medium, where the computer program, when executed by a processor, may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, executable files or in some intermediate form, etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a terminal device, a recording medium, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, and a software distribution medium. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/network device and method may be implemented in other manners. For example, the apparatus/network device embodiments described above are merely illustrative, e.g., the division of modules or elements is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (8)
1. A power element simulation method, comprising:
obtaining a rectangular device model and rectangular device model parameters;
Superposing the rectangular device model to construct a power device;
Correlating the rectangular device model parameters with the power devices;
Simulating the power device according to the rectangular device model parameters;
the rectangular device model parameters comprise rectangular device resistance, rectangular device capacitance and rectangular device inductance;
the superimposing the rectangular device model to construct a power device includes:
taking an integer of a quotient of the gate width of the power device divided by the width of the rectangular device model to obtain a second width coefficient m;
connecting m rectangular device models to obtain the power device;
the connecting m rectangular device models to obtain the power device includes:
commonly connecting sources of m rectangular device models;
commonly connecting the grid electrodes of m rectangular device models;
The drains of m rectangular device models are connected together;
The simulation of the power device according to the rectangular device model parameters is specifically as follows: calculating the resistance of the power device according to a parallel resistance calculation formula and the resistance of the rectangular device; calculating the capacitance of the power device according to a parallel capacitance calculation formula and the capacitance of the rectangular device; and calculating the inductance of the power device according to the parallel inductance calculation formula and the inductance of the rectangular device.
2. The power element simulation method of claim 1, wherein adjacent rectangular device models in the power device are sequentially arranged or mirror-symmetrical.
3. The power element simulation method according to claim 2, wherein when adjacent rectangular device models in the power device are mirror symmetry, the adjacent rectangular device models share a positive power supply terminal or a negative power supply terminal.
4. The power element simulation method of claim 1, wherein the acquiring the rectangular device model and the rectangular device model parameters further comprises:
testing rectangular devices on the wafer slots to obtain parameters of the rectangular devices;
and loading the rectangular device parameters into circuit simulation software to establish the rectangular device model.
5. The power element simulation method according to claim 1, wherein the simulating the power element according to the rectangular element model parameter is specifically:
and calculating the electrical parameters of the power device according to the rectangular device model parameters.
6. A power element simulation apparatus, comprising:
The model acquisition module is used for acquiring a rectangular device model and rectangular device model parameters;
the construction module is used for superposing the rectangular device models in a parallel mode and/or a serial mode to construct a power device;
The association module is used for associating the rectangular device model parameters with the power devices;
the simulation module is used for simulating the power device according to the rectangular device model parameters;
the rectangular device model parameters comprise rectangular device resistance, rectangular device capacitance and rectangular device inductance;
The construction module comprises:
The width coefficient acquisition module is used for taking an integer of a quotient of the width of the grid electrode of the power device divided by the width of the model of the rectangular device to acquire a second width coefficient m;
the power device acquisition module is specifically used for: firstly, the sources of m rectangular device models can be connected together; then commonly connecting the grid electrodes of m rectangular device models; finally, the drains of m rectangular device models are connected together;
The simulation module is specifically used for: calculating the resistance of the power device according to a parallel resistance calculation formula and the resistance of the rectangular device; calculating the capacitance of the power device according to a parallel capacitance calculation formula and the capacitance of the rectangular device; and calculating the inductance of the power device according to the parallel inductance calculation formula and the inductance of the rectangular device.
7. An electronic device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the power element emulation method according to any one of claims 1 to 5 when executing the computer program.
8. A computer readable storage medium storing a computer program, characterized in that the computer program, when executed by a processor, implements the power element emulation method according to any one of claims 1 to 5.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101221589A (en) * | 2007-09-29 | 2008-07-16 | 埃派克森微电子(上海)有限公司 | Circuit simulation model method |
| CN101807219A (en) * | 2008-02-28 | 2010-08-18 | 台湾积体电路制造股份有限公司 | Method for shape and timing equivalent dimension extraction |
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| WO2011142066A1 (en) * | 2010-05-13 | 2011-11-17 | パナソニック株式会社 | Circuit simulation method and semiconductor integrated circuit |
| JP6360443B2 (en) * | 2015-01-15 | 2018-07-18 | ルネサスエレクトロニクス株式会社 | Circuit simulation apparatus, circuit simulation method, and circuit simulation program |
| DE112018002384T5 (en) * | 2017-05-10 | 2020-01-16 | Rohm Co., Ltd. | Power semiconductor device and manufacturing process for the same |
| KR102504912B1 (en) * | 2018-04-30 | 2023-02-28 | 에스케이하이닉스 주식회사 | Leakage distribution estimating system of semiconductor and analysis method of the same |
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| CN101221589A (en) * | 2007-09-29 | 2008-07-16 | 埃派克森微电子(上海)有限公司 | Circuit simulation model method |
| CN101807219A (en) * | 2008-02-28 | 2010-08-18 | 台湾积体电路制造股份有限公司 | Method for shape and timing equivalent dimension extraction |
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