CN112485709B - Method, device, medium and electronic equipment for detecting abnormality of internal circuit - Google Patents
Method, device, medium and electronic equipment for detecting abnormality of internal circuit Download PDFInfo
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- 230000005856 abnormality Effects 0.000 title claims abstract description 64
- 238000000034 method Methods 0.000 title claims abstract description 51
- 238000001514 detection method Methods 0.000 claims abstract description 55
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 29
- 239000010931 gold Substances 0.000 claims description 21
- 229910052737 gold Inorganic materials 0.000 claims description 21
- 238000003466 welding Methods 0.000 claims description 16
- 238000010586 diagram Methods 0.000 claims description 14
- 230000002159 abnormal effect Effects 0.000 claims description 10
- 230000005540 biological transmission Effects 0.000 claims description 8
- 238000004590 computer program Methods 0.000 claims description 7
- 238000013519 translation Methods 0.000 claims description 7
- 238000013461 design Methods 0.000 claims description 6
- 230000000903 blocking effect Effects 0.000 claims description 3
- 239000002609 medium Substances 0.000 description 13
- 230000006870 function Effects 0.000 description 7
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 239000012120 mounting media Substances 0.000 description 1
- 238000009659 non-destructive testing Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/0066—Radiation pyrometry, e.g. infrared or optical thermometry for hot spots detection
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/0096—Radiation pyrometry, e.g. infrared or optical thermometry for measuring wires, electrical contacts or electronic systems
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
- G01N23/04—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/58—Testing of lines, cables or conductors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
Abstract
The embodiment of the application discloses a method, a device, a medium and electronic equipment for detecting an abnormality of an internal circuit. The method comprises the following steps: acquiring a contour map of a sample, and powering up the sample to acquire an infrared image of the sample; if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map; and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. By executing the scheme, the purpose of accurately positioning the abnormality of the internal circuit of the detection object can be achieved under the condition of no damage.
Description
Technical Field
The embodiment of the application relates to the technical field of electronic technology, in particular to a method, a device, a medium and electronic equipment for detecting abnormality of an internal circuit.
Background
As the current world trend is technological and intelligent, various electronic devices are increasingly used in the field of electronic technology. Devices such as chips, disks, and caches also tend to float due to the dramatic increase in demand. After the electronic device is manufactured, the detection of the internal circuit is a relatively wide technical problem at present.
In some existing detection methods, the open detection result is the most accurate, but the electronic device needs to be disassembled, and the detection mode is destructive and cannot be greatly popularized. In other detection modes, manual detection is mainly adopted by top-level personnel of professional technicians, specifically, for example, each pin of a chip is tested, and the detection mode is not only complex, but also limited by the skill requirements of detection personnel and cannot be widely used. Therefore, a simple and accurate detection method is needed to be developed.
Disclosure of Invention
The embodiment of the application provides a detection method, a device, a medium and electronic equipment for internal circuit abnormality, which can achieve the purpose of accurately positioning the internal circuit abnormality of a detection object under the condition of no damage.
In a first aspect, an embodiment of the present application provides a method for detecting an internal circuit abnormality, where the method includes:
acquiring a contour map of a sample, and powering up the sample to acquire an infrared image of the sample;
if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map;
and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Further, the reference image comprises a wire bonding design drawing, a wire bonding transmission drawing, a spherical drawing and a welding convex diagram.
Further, overlapping the reference image obtained in advance with the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line abnormality in the reference image, including:
if the point of the hot spot in the reference image is obtained to be positioned on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is gold wire short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one gold ball or between two gold balls, determining that the detection result of the circuit abnormality is gold ball short circuit;
if the point position of the hot spot in the reference image is at least one welding convex point or between two welding convex points, the detection result of the abnormal circuit can be determined to be welding convex point short circuit.
Further, the wire bonding transmission diagram is obtained by performing X-ray image acquisition on the sample.
Further, before acquiring the profile of the sample, the method further comprises:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein the profile comprises burning code information;
and acquiring a code burning drawing of the sample, and determining the positions of all the blocks of the contour map in the whole contour map according to the code burning information in the code burning drawing.
Further, before superimposing the reference image acquired in advance with the contour map, the method further includes:
acquiring an initial reference image of the sample;
matching is carried out according to the boundary of the reference image and the boundary of the contour map, and/or matching is carried out according to the characteristic points of the reference image and the characteristic points of the contour map;
and adjusting the size of the reference image according to the matching result so as to adapt to the contour map.
Further, matching the boundary of the reference image with the boundary of the contour map includes:
and determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to the pixel point coordinates of the boundary of the reference image in the reference image and the pixel point coordinates of the boundary of the contour image in the contour image.
Matching the feature points of the reference image with the feature points of the contour map, including:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to pixel point coordinates of the feature points of the reference image in the reference image and pixel point coordinates of the feature points of the contour image in the contour image; wherein, the characteristic points are at least two.
In a second aspect, an embodiment of the present application provides a device for detecting an internal circuit abnormality, where the device includes:
the infrared image acquisition module is used for acquiring a contour map of the sample, powering on the sample and acquiring an infrared image of the sample;
the outline map corresponding module is used for corresponding the hot spot to the outline map if the hot spot exists in the infrared image;
and the point position superposition module is used for superposing the reference image acquired in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
In a third aspect, embodiments of the present application provide a computer-readable storage medium having stored thereon a computer program that, when executed by a processor, implements a method for detecting an internal line abnormality according to embodiments of the present application.
In a fourth aspect, an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and capable of being executed by the processor, where the processor executes the computer program to implement a method for detecting an internal circuit abnormality according to an embodiment of the present application.
According to the technical scheme provided by the embodiment of the application, the outline drawing of the sample is obtained, the sample is electrified, and the infrared image of the sample is obtained; if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map; and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. According to the technical scheme, the purpose of accurately positioning the abnormality of the internal circuit of the detection object can be achieved under the condition of no damage.
Drawings
Fig. 1 is a flowchart of a method for detecting an internal circuit abnormality according to an embodiment of the present application;
fig. 2 is a schematic diagram of an abnormal circuit in a chip according to an embodiment of the present application;
fig. 3 is a device for detecting an abnormality of an internal circuit according to a second embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present application.
Detailed Description
The present application is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present application are shown in the drawings.
Before discussing exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart depicts steps as a sequential process, many of the steps may be implemented in parallel, concurrently, or with other steps. Furthermore, the order of the steps may be rearranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figures. The processes may correspond to methods, functions, procedures, subroutines, and the like.
Example 1
Fig. 1 is a flowchart of a method for detecting an internal circuit abnormality according to an embodiment of the present application, where the embodiment is applicable to a case of nondestructive testing of electronic devices such as a chip, and the method may be performed by an apparatus for detecting an internal circuit abnormality according to the embodiment of the present application, and the apparatus may be implemented by software and/or hardware, and may be integrated in an electronic device.
As shown in fig. 1, the method for detecting an internal circuit abnormality includes:
s110, acquiring a contour map of the sample, and powering on the sample to acquire an infrared image of the sample.
The execution body of the scheme can be an electronic device with an infrared image shooting function or an electronic device connected with the infrared image shooting device.
The profile of the sample can be shot through an infrared lens or a common lens, and it can be understood that the shooting of the profile and the subsequent shooting of the infrared image can be completed through one lens or the lenses arranged at the same position, so that interference caused by parallax can be avoided. In the contour map, the contour of the entire sample may be included, or only a part of the contour may be included, for example, the entire sample may be divided into four parts of upper left, upper right, lower left, and lower right, and photographed. Such a photographing method is often performed for a case where the sample itself is relatively large and cannot be accommodated in one picture. In the captured outline, characters or characters such as a logo on the sample may be displayed.
After the profile of the sample is obtained, the sample may be powered up, and the infrared image of the sample. It will be appreciated that the powering up of the sample may be at a frequency, for example at 1Hz,25Hz, 100Hz, etc. And when the sample is electrified, heat can be generated at the fault position under the condition that the circuit inside the sample has faults, so that hot spots are formed.
The technical scheme can be applied to the abnormality caused by short circuit, and is also applied to the abnormality caused by breakdown of a diode and a triode, and in addition, the technical scheme can be used for detecting the internal heat generated after the power-up of the sample due to the fault.
And S120, if a hot spot exists in the infrared image, the hot spot is corresponding to the contour map.
In the infrared image, if the internal circuit of the sample is normal, hot spots or positions of the hot spots are not different from those of the invalid product. If there is an abnormality in the internal circuit of the sample, such as a short circuit, heat increases in a short time due to the current flowing at the short circuit, and a hot spot is formed at other positions with respect to the sample under the same condition of heat dissipation.
Thus, if a hotspot exists, if it is determined that an internal line is abnormal, the hotspot may be mapped to the profile. In particular, it may correspond to a certain position in the profile.
It will be appreciated that, since the sample will not suddenly generate heat during the power-up process, or the amount of generated heat is insufficient to form a hot spot in a short time, images may be acquired at a preset frequency within 20s,30s or even 1min after the power-up process, and a certain number of images are superimposed to determine an infrared image of the sample, for example, images are acquired at a frequency of 100 times per second after the power-up process, and each adjacent 10 images are subjected to a superimposing process to obtain the infrared image of the sample. Thus, the intensity of the hot spot may accumulate over time. In addition, a preview image of the sample may be acquired in real time, and the preview image may be taken after the hot spot is found to obtain the infrared image.
The hot spots may be mapped into the profile according to the location of the hot spot to create an effect that there is at least one hot spot in the profile.
S130, overlapping the reference image obtained in advance with the outline map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
The reference image may be a design image or an image acquired in real time.
In this scheme, optionally, the reference image includes a wire bonding design drawing, a wire bonding transmission drawing, a spherical drawing, and a solder bump drawing.
The wire bonding design diagram and the wire bonding transmission diagram can be used for determining whether the wire bonding short circuit is caused, and the spherical diagram and the welding convex point diagram can be used for determining whether the wire bonding short circuit is caused and whether the wire bonding short circuit is caused.
In the above scheme, optionally, the wire bonding transmission diagram is obtained by performing X-ray image acquisition on the sample.
The X-ray image may be acquired in advance or may be acquired during the measurement, as long as the sample can be photographed by the X-ray image acquisition apparatus to obtain a corresponding X-ray image.
In a possible embodiment, optionally, overlapping the reference image obtained in advance with the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line abnormality in the reference image, including:
if the point of the hot spot in the reference image is obtained to be positioned on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is gold wire short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one gold ball or between two gold balls, determining that the detection result of the circuit abnormality is gold ball short circuit;
if the point position of the hot spot in the reference image is at least one welding convex point or between two welding convex points, the detection result of the abnormal circuit can be determined to be welding convex point short circuit.
Wherein, by comparing with different reference images, the method can be used for determining the reason of abnormal internal circuit of the sample. With such a setting, it is possible to realize lossless and quick determination of the cause of occurrence of an abnormality.
It will be appreciated that when comparing the reference image with the hot spot on top of the profile, the reference image needs to be matched with the profile to enable the hot spot to be directly compared with the reference image, and to determine where in the reference image a problem arises. Thus, before a problem is determined, each reference image may be matched to the contour map separately, or all reference images may be matched to the contour map simultaneously.
In this embodiment, optionally, before superimposing the reference image acquired in advance with the contour map, the method further includes:
acquiring an initial reference image of the sample;
matching is carried out according to the boundary of the reference image and the boundary of the contour map, and/or matching is carried out according to the characteristic points of the reference image and the characteristic points of the contour map;
and adjusting the size of the reference image according to the matching result so as to adapt to the contour map.
The contour map can display the boundary position of the sample, so that the matching can be performed according to the coordinates of the pixel points of the boundary position in the image and the coordinates of the boundary position of the reference image in the reference image. For example, in the profile, the upper boundary has an ordinate of 10 and the abscissa of 20 to 220, the horizontal length of the upper boundary is 200, and if the lower boundary has an ordinate of 210, the distance between the upper and lower boundaries is 200; if the horizontal length of the upper boundary in the reference image is 300, the distance between the upper boundary and the lower boundary is 300, and the coordinates of the starting point of the upper left corner are (20, 10), the reference image can be directly reduced to 2/3 of the original size by taking the starting point of the upper left corner as the center, and the size can be the same as that of the outline map and matching can be performed. Of course, the adaptation can also be achieved by scaling the profile.
Similarly, the two images are scaled, translated, rotated and the like according to the characteristic points in the two images, so that the aim of matching can be achieved. In addition, matching may be performed by combining the boundary and the feature point in the image.
On the basis of the above technical solution, specifically, matching according to the boundary of the reference image and the boundary of the contour map includes:
and determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to the pixel point coordinates of the boundary of the reference image in the reference image and the pixel point coordinates of the boundary of the contour image in the contour image.
Matching the feature points of the reference image with the feature points of the contour map, including:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to pixel point coordinates of the feature points of the reference image in the reference image and pixel point coordinates of the feature points of the contour image in the contour image; wherein, the characteristic points are at least two.
Wherein, according to the pixel point coordinates, at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment can be realized. Through the arrangement, the purpose of matching the two images can be accurately and rapidly realized, and the positions of hot spots in each reference image can be clearly determined by overlapping after matching, so that the reason of abnormal lines can be conveniently determined.
According to the technical scheme provided by the embodiment of the application, the outline drawing of the sample is obtained, the sample is electrified, and the infrared image of the sample is obtained; if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map; and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. According to the technical scheme, the purpose of accurately positioning the abnormality of the internal circuit of the detection object can be achieved under the condition of no damage.
Based on the above technical solutions, optionally, before acquiring the profile of the sample, the method further includes:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein the profile comprises burning code information;
and acquiring a code burning drawing of the sample, and determining the positions of all the blocks of the contour map in the whole contour map according to the code burning information in the code burning drawing.
In the case where the sample is relatively large and a complete sample contour map cannot be obtained at one time, the method may be used to take partial contour maps of each portion of the sample and obtain an infrared image. After the hot spot is obtained, or before the hot spot is obtained, the incomplete contour map is spliced preferentially to obtain a complete contour image, and the position of the hot spot in the contour map can be determined after the infrared image is spliced and overlapped on the complete contour image. In the process of splicing a plurality of incomplete contour maps, the specific position of splicing can be determined according to the code burning position in the sample contour map. Therefore, the burning code information in the burning code drawing of the sample can be extracted and used as the basis of image stitching. The technical scheme can cope with samples of any size, and avoid the problem that abnormal detection of an internal circuit cannot be carried out due to overlarge samples. Therefore, the application range of the technical scheme can be expanded.
On the basis of the above technical solutions, if the operation of matching with the reference image is completed through the contour map, in order to more clearly observe the position of the hot spot in the reference image, the contour map may be removed, for example, the layer of the contour map is hidden, so that the position of the hot spot in the reference image may be more clearly seen.
Fig. 2 is a schematic diagram of an abnormality of an internal circuit of a chip according to an embodiment of the present application, as shown in fig. 2, if hot spots are respectively located at 1-6 positions in an image, the abnormal situation may be respectively corresponding to the right side, for example, a gold ball-gold ball short circuit is located at 1 position, a gold finger-gold finger short circuit is located at 2 position, a gold wire-gold wire short circuit is located at 3 position, a gold wire short circuit is located at 4 position, a short circuit that the gold wire hits the edge of the chip is located at 5 position, a micro-crack/chip-breaking abnormality is located at 5 positions, for example, a circuit short circuit between layers caused by micro-crack or chip-breaking is located at 6 positions, and it may be determined that a circuit of a PCB substrate is short-circuited.
According to the scheme, the function is directly integrated in the software of the thermal positioning equipment, two vertexes are selected to be rectangular after the line drawing or the X-ray picture is imported, the size is adjusted to be consistent, the superposition function can be realized on the software, and then the failure mode can be primarily judged according to the hot spot position.
In the scheme, after the hot spot extraction, the printing paper can be overlapped with the hot spot, and the printing paper can be used for overlapped drawings of all outlines including a front face code burning drawing, a spherical surface drawing, a bump drawing of a flip-chip bonding product and the like. The drawings can be replaced by X-ray pictures and hot spot superposition without drawings.
Example two
Fig. 3 is a schematic diagram of an internal circuit abnormality detection device according to a second embodiment of the present application, where the internal circuit abnormality detection device may be implemented by software and/or hardware and may be integrated in an electronic device such as an intelligent terminal.
As shown in fig. 3, the apparatus may include:
an infrared image acquisition module 310, configured to acquire a profile of a sample, and power up the sample to acquire an infrared image of the sample;
a contour map correspondence module 320, configured to, if a hot spot exists in the infrared image, correspond the hot spot to the contour map;
and the point location superposition module 330 is configured to superimpose the reference image obtained in advance with the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line abnormality in the reference image.
The internal circuit abnormality detection device provided by the embodiment of the invention can execute the internal circuit abnormality detection method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of executing the internal circuit abnormality detection method.
Example III
A third embodiment of the present application also provides a storage medium containing computer-executable instructions, which when executed by a computer processor, are configured to perform a method for detecting an internal line anomaly, the method comprising:
acquiring a contour map of a sample, and powering up the sample to acquire an infrared image of the sample;
if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map;
and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Storage media refers to any of various types of memory electronic devices or storage electronic devices. The term "storage medium" is intended to include: mounting media such as CD-ROM, floppy disk or tape devices; computer system memory or random access memory such as DRAM, DDR RAM, SRAM, EDO RAM, lanbas (Rambus) RAM, etc.; nonvolatile memory such as flash memory, magnetic media (e.g., hard disk or optical storage); registers or other similar types of memory elements, etc. The storage medium may also include other types of memory or combinations thereof. In addition, the storage medium may be located in a computer system in which the program is executed, or may be located in a different second computer system connected to the computer system through a network (such as the internet). The second computer system may provide program instructions to the computer for execution. The term "storage medium" may include two or more storage media that may reside in different unknowns (e.g., in different computer systems connected by a network). The storage medium may store program instructions (e.g., embodied as a computer program) executable by one or more processors.
Of course, the storage medium containing the computer executable instructions provided in the embodiments of the present application is not limited to the internal circuit abnormality detection operation described above, and may also perform the related operations in the internal circuit abnormality detection method provided in any embodiment of the present application.
Example IV
The fourth embodiment of the present application provides an electronic device, in which the internal circuit abnormality detection device provided in the embodiments of the present application may be integrated, where the electronic device may be configured in a system, or may be a device that performs some or all of the functions in the system. Fig. 4 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present application. As shown in fig. 4, the present embodiment provides an electronic device 400, which includes: one or more processors 420; the storage device 410 is configured to store one or more programs, where the one or more programs are executed by the one or more processors 420, so that the one or more processors 420 implement the method for detecting an internal circuit abnormality provided in the embodiment of the present application, and the method includes:
acquiring a contour map of a sample, and powering up the sample to acquire an infrared image of the sample;
if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map;
and overlapping the reference image obtained in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Of course, those skilled in the art will understand that the processor 420 further implements the technical solution of the internal circuit abnormality detection method provided in any embodiment of the present application.
The electronic device 400 shown in fig. 4 is merely an example and should not be construed as limiting the functionality and scope of use of embodiments of the present application.
As shown in fig. 4, the electronic device 400 includes a processor 420, a storage device 410, an input device 430, and an output device 440; the number of processors 420 in the electronic device may be one or more, one processor 420 being taken as an example in fig. 4; the processor 420, the storage device 410, the input device 430, and the output device 440 in the electronic device may be connected by a bus or other means, as exemplified by connection via a bus 450 in fig. 4.
The storage device 410 is a computer readable storage medium, and can be used to store a software program, a computer executable program, and a module unit, such as program instructions corresponding to the method for detecting an internal circuit abnormality in the embodiment of the present application.
The storage device 410 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for functions; the storage data area may store data created according to the use of the terminal, etc. In addition, the storage 410 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some examples, storage device 410 may further include memory located remotely from processor 420, which may be connected via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 430 may be used to receive input numeric, character information, or voice information, and to generate key signal inputs related to user settings and function control of the electronic device. The output device 440 may include an electronic device such as a display screen, a speaker, etc.
The electronic equipment provided by the embodiment of the application can achieve the purpose of accurately positioning the abnormality of the internal circuit of the detection object under the condition of no damage.
The internal circuit abnormality detection device, the medium and the electronic equipment provided in the above embodiments can execute the internal circuit abnormality detection method provided in any embodiment of the present application, and have the corresponding functional modules and beneficial effects of executing the method. Technical details not described in detail in the above embodiments may be referred to the method for detecting an internal circuit abnormality provided in any embodiment of the present application.
Note that the above is only a preferred embodiment of the present application and the technical principle applied. Those skilled in the art will appreciate that the present application is not limited to the particular embodiments described herein, but is capable of numerous obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the present application. Therefore, while the present application has been described in connection with the above embodiments, the present application is not limited to the above embodiments, but may include many other equivalent embodiments without departing from the spirit of the present application, the scope of which is defined by the scope of the appended claims.
Claims (7)
1. A method for detecting an internal circuit anomaly, the method comprising:
acquiring a contour map of a sample, and powering up the sample to acquire an infrared image of the sample;
if a hot spot exists in the infrared image, the hot spot is corresponding to the outline map;
overlapping a reference image acquired in advance with the contour map to obtain the point position of the hot spot in the reference image so as to determine a detection result of circuit abnormality in the reference image;
the reference image comprises a wire bonding design drawing, a wire bonding transmission drawing, a spherical drawing and a welding convex diagram;
the method for determining the detection result of the circuit abnormality in the reference image comprises the following steps of:
if the point of the hot spot in the reference image is obtained to be positioned on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is gold wire short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one gold ball or between two gold balls, determining that the detection result of the circuit abnormality is gold ball short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one welding convex point or between two welding convex points, determining that the detection result of the abnormal circuit is short circuit of the welding convex points;
wherein, before overlapping the reference image acquired in advance with the contour map, the method further comprises:
acquiring an initial reference image of the sample;
matching is carried out according to the boundary of the reference image and the boundary of the contour map, and/or matching is carried out according to the characteristic points of the reference image and the characteristic points of the contour map;
and adjusting the size of the reference image according to the matching result so as to adapt to the contour map.
2. The method of claim 1, wherein the wire-bond transmission map is obtained by X-ray image acquisition of the sample.
3. The method of claim 1, wherein prior to acquiring the profile of the sample, the method further comprises:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein the profile comprises burning code information;
and acquiring a code burning drawing of the sample, and determining the positions of all the blocks of the contour map in the whole contour map according to the code burning information in the code burning drawing.
4. The method of claim 1, wherein matching the boundary of the reference image with the boundary of the contour map comprises:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to pixel point coordinates of the boundary of the reference image in the reference image and pixel point coordinates of the boundary of the contour image in the contour image;
matching the feature points of the reference image with the feature points of the contour map, including:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment for the reference image according to pixel point coordinates of the feature points of the reference image in the reference image and pixel point coordinates of the feature points of the contour image in the contour image; wherein, the characteristic points are at least two.
5. An internal circuit abnormality detection device, comprising:
the infrared image acquisition module is used for acquiring a contour map of the sample, powering on the sample and acquiring an infrared image of the sample;
the outline map corresponding module is used for corresponding the hot spot to the outline map if the hot spot exists in the infrared image;
the point position superposition module is used for superposing a reference image acquired in advance with the profile map to obtain the point position of the hot spot in the reference image so as to determine a detection result of circuit abnormality in the reference image;
the reference image comprises a wire bonding design drawing, a wire bonding transmission drawing, a spherical drawing and a welding convex diagram;
the method for determining the detection result of the circuit abnormality in the reference image comprises the following steps of:
if the point of the hot spot in the reference image is obtained to be positioned on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is gold wire short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one gold ball or between two gold balls, determining that the detection result of the circuit abnormality is gold ball short circuit;
if the point position of the hot spot in the reference image is obtained to be on at least one welding convex point or between two welding convex points, determining that the detection result of the abnormal circuit is short circuit of the welding convex points;
wherein, before overlapping the reference image acquired in advance with the contour map, the method further comprises:
acquiring an initial reference image of the sample;
matching is carried out according to the boundary of the reference image and the boundary of the contour map, and/or matching is carried out according to the characteristic points of the reference image and the characteristic points of the contour map;
and adjusting the size of the reference image according to the matching result so as to adapt to the contour map.
6. A computer-readable storage medium, on which a computer program is stored, characterized in that the program, when executed by a processor, implements the method for detecting an internal circuit abnormality according to any one of claims 1 to 4.
7. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of detecting an internal circuit anomaly as claimed in any one of claims 1 to 4 when the computer program is executed by the processor.
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| CN113486622B (en) * | 2021-06-29 | 2023-02-28 | 海光信息技术股份有限公司 | Chip failure analysis method and device, electronic equipment and storage medium |
| CN113484363B (en) * | 2021-06-29 | 2023-05-23 | 重庆长安新能源汽车科技有限公司 | Test device and method for simulating internal heating of controller |
| CN113628176A (en) * | 2021-07-28 | 2021-11-09 | 生益电子股份有限公司 | Conductive medium detection method, device, equipment and storage medium of PCB |
| CN114061765A (en) * | 2021-10-29 | 2022-02-18 | 歌尔股份有限公司 | Device glue path detection method, control device and glue dispensing device |
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