CN112485709A - Method, device, medium and electronic equipment for detecting internal circuit abnormality - Google Patents
Method, device, medium and electronic equipment for detecting internal circuit abnormality Download PDFInfo
- Publication number
- CN112485709A CN112485709A CN202011239194.2A CN202011239194A CN112485709A CN 112485709 A CN112485709 A CN 112485709A CN 202011239194 A CN202011239194 A CN 202011239194A CN 112485709 A CN112485709 A CN 112485709A
- Authority
- CN
- China
- Prior art keywords
- reference image
- contour map
- sample
- hot spot
- map
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 54
- 230000005856 abnormality Effects 0.000 title claims abstract description 49
- 238000001514 detection method Methods 0.000 claims abstract description 42
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 23
- 239000010931 gold Substances 0.000 claims description 18
- 229910052737 gold Inorganic materials 0.000 claims description 18
- 238000003466 welding Methods 0.000 claims description 14
- 238000004590 computer program Methods 0.000 claims description 9
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000013519 translation Methods 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims 1
- 239000002609 medium Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 11
- 230000006870 function Effects 0.000 description 8
- 238000013461 design Methods 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 206010063385 Intellectualisation Diseases 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 239000012120 mounting media Substances 0.000 description 1
- 238000009659 non-destructive testing Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/0066—Radiation pyrometry, e.g. infrared or optical thermometry for hot spots detection
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/0096—Radiation pyrometry, e.g. infrared or optical thermometry for measuring wires, electrical contacts or electronic systems
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/02—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
- G01N23/04—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/58—Testing of lines, cables or conductors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
Abstract
The embodiment of the application discloses a method, a device, a medium and electronic equipment for detecting internal circuit abnormity. The method comprises the following steps: acquiring a profile of a sample, and electrifying the sample to acquire an infrared image of the sample; if the infrared image has a hot spot, corresponding the hot spot to the contour map; and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. By executing the scheme, the purpose of accurately positioning the internal circuit abnormity of the detection object can be achieved under the lossless condition.
Description
Technical Field
The embodiment of the application relates to the technical field of electronic technology, in particular to a method, a device, a medium and electronic equipment for detecting internal circuit abnormity.
Background
Due to the current world trend of science and technology and intellectualization, various electronic devices are more and more widely used in the field of electronic technology. Devices such as chips, disks, and caches, tend to be floating due to the dramatic increase in demand. After the electronic device is manufactured, the detection of the internal circuit thereof is a relatively wide technical problem at present.
In some existing detection methods, the most accurate detection result belongs to an open type, but an electronic device needs to be disassembled, and the detection method is destructive and cannot be popularized greatly. In other detection methods, manual detection is mainly performed by top-level personnel of professionals, and specifically, for example, each pin of a chip is tested, which is not only complicated, but also limited by the technical requirements of the detection personnel, and cannot be widely used. Therefore, a simple and accurate detection method is urgently needed to be developed.
Disclosure of Invention
The embodiment of the application provides a method, a device, a medium and an electronic device for detecting an internal circuit abnormality, which can achieve the purpose of accurately positioning the internal circuit abnormality of a detection object under the condition of no damage.
In a first aspect, an embodiment of the present application provides a method for detecting an internal circuit abnormality, where the method includes:
acquiring a profile of a sample, and electrifying the sample to acquire an infrared image of the sample;
if the infrared image has a hot spot, corresponding the hot spot to the contour map;
and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Further, the reference image comprises a routing design drawing, a routing transmission drawing, a spherical drawing and a welding convex drawing.
Further, superimposing a pre-acquired reference image with the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line anomaly in the reference image, including:
if the obtained point position of the hotspot in the reference image is on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is a gold wire short circuit;
if the obtained point position of the hot point in the reference image is on at least one gold ball or between two gold balls, determining that the detection result of the line abnormity is a gold ball short circuit;
if the obtained point position of the hot spot in the reference image is on at least one welding salient point or between two welding salient points, the detection result of the circuit abnormity can be determined as short circuit of the welding salient points.
Further, the routing transmission image is obtained by acquiring an X-ray image of the sample.
Further, before obtaining the profile of the sample, the method further comprises:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein, the outline comprises code burning information;
and acquiring a code burning drawing of the sample, and determining the position of each block of the contour map in the whole contour map according to code burning information in the code burning drawing.
Further, before superimposing the pre-acquired reference image with the contour map, the method further includes:
acquiring an initial reference image of the sample;
matching according to the boundary of the reference image and the boundary of the contour map, and/or matching according to the characteristic point of the reference image and the characteristic point of the contour map;
and adjusting the size of the reference image according to the matching result so as to be matched with the contour map.
Further, matching according to the boundary of the reference image and the boundary of the contour map includes:
and determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the boundary of the reference image in the reference image and the pixel point coordinates of the boundary of the contour map in the contour map.
Matching the feature points of the reference image with the feature points of the contour map according to the feature points of the reference image, and the method comprises the following steps:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the characteristic points of the reference image in the reference image and the pixel point coordinates of the characteristic points of the contour map in the contour map; wherein the number of the feature points is at least two.
In a second aspect, an embodiment of the present application provides an apparatus for detecting an internal circuit abnormality, where the apparatus includes:
the infrared image acquisition module is used for acquiring a contour map of the sample, and electrifying the sample to acquire an infrared image of the sample;
the profile map corresponding module is used for corresponding the hot spot to the profile map if the hot spot exists in the infrared image;
and the point location superposition module is used for superposing a pre-acquired reference image and the contour map to obtain the point location of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
In a third aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the computer program implements the method for detecting an internal circuit abnormality according to the present application.
In a fourth aspect, an embodiment of the present application provides an electronic device, which includes a memory, a processor, and a computer program stored on the memory and executable by the processor, where the processor executes the computer program to implement the method for detecting an internal circuit abnormality according to the embodiment of the present application.
According to the technical scheme provided by the embodiment of the application, the contour map of the sample is obtained, the sample is powered on, and the infrared image of the sample is obtained; if the infrared image has a hot spot, corresponding the hot spot to the contour map; and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. The technical scheme provided by the application can achieve the purpose of accurately positioning the internal circuit abnormality of the detection object under the lossless condition.
Drawings
Fig. 1 is a flowchart of a method for detecting an internal circuit abnormality according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an abnormal circuit inside a chip according to an embodiment of the present disclosure;
fig. 3 is a detection apparatus for internal circuit abnormality according to the second embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present application.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures.
Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the steps as a sequential process, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps may be rearranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.
Example one
Fig. 1 is a flowchart of a method for detecting an internal circuit abnormality according to an embodiment of the present application, where the present embodiment is applicable to a case of nondestructive testing of an electronic device such as a chip, and the method can be executed by an apparatus for detecting an internal circuit abnormality according to an embodiment of the present application, and the apparatus can be implemented by software and/or hardware and can be integrated in an electronic device.
As shown in fig. 1, the method for detecting an abnormality of an internal line includes:
and S110, acquiring a contour map of the sample, and electrifying the sample to acquire an infrared image of the sample.
The executing body of the scheme can be an electronic device with an infrared image shooting function or an electronic device connected with the infrared image shooting device.
The outline of the sample can be shot through an infrared lens, or can be shot through a common lens, and it can be understood that the shooting of the outline and the subsequent shooting of the infrared image can be completed through one lens, or completed through the lenses arranged at the same position, so that the interference caused by parallax can be avoided. In the contour map, the contour of the entire sample may be included, or only a part of the contour may be included, for example, the entire sample is divided into four parts, i.e., upper left, upper right, lower left, and lower right, and the images are taken separately. Such a photographing mode is often performed in a case where the sample itself is large and cannot be contained in one picture. In the photographed outline, characters or characters such as a code on the sample can be displayed.
After the contour map of the sample is obtained, the sample can be powered up and thus an infrared image of the sample. It will be appreciated that the sample may be powered up at a frequency, for example at 1Hz, 25Hz, or 100Hz, etc. When the sample is electrified, heat can be generated at the fault position to form a hot spot under the condition that a line inside the sample has a fault.
This scheme can be applicable to because the short circuit causes unusually, also is applicable to the unusualness that diode, triode puncture caused simultaneously, in addition, as long as sample is inside because the trouble is exothermic after the power-on, all can detect through this technical scheme.
And S120, if the infrared image has a hot spot, corresponding the hot spot to the contour map.
Wherein, because the infrared image can be distinguished to the image, so in the infrared image, if the sample internal line is normal, can not appear the hot spot or the hot spot position is different with the failure article. If there is an abnormality in the internal circuit of the sample, such as a short circuit, heat increases in a short time due to the flow of current in the short-circuited portion, and a hot spot is formed in another position of the sample in the same case of heat dissipation.
Therefore, if a hot spot exists, the fact that an abnormality exists in the internal line is determined, and the hot spot can be corresponding to the contour map. Specifically, a position in the outline may be corresponded to.
As can be understood herein, since the sample does not suddenly generate heat during the power-on process, or the amount of heat generated is not enough to form a hot spot in a short time, the images may be collected at a preset frequency within 20s, 30s or even 1min after the power-on process, and a certain number of images are superimposed to determine the infrared image of the sample, for example, the images are collected at a frequency of 100 times per second after the power-on process, and 10 adjacent images are superimposed to obtain the infrared image of the sample. Thus, the intensity of the hot spot accumulates over time. Besides, a preview image of the sample can be acquired in real time, and the preview image is intercepted after the hot spot is found so as to obtain an infrared image.
The hot spots can be mapped into the contour map according to the positions of the hot spots to form the effect that at least one hot spot exists in the contour map.
And S130, superposing a pre-acquired reference image and the contour map to obtain a point position of the hot spot in the reference image so as to determine a detection result of the line abnormality in the reference image.
The reference image may be a design image or an image acquired in real time.
In this embodiment, optionally, the reference image includes a routing design drawing, a routing transmission drawing, a spherical drawing, and a welding bump drawing.
The routing design diagram and the routing transmission diagram can be used for determining whether the routing short circuit occurs, and the spherical diagram and the welding bump diagram can be used for determining whether the gold ball short circuit occurs and the welding bump short circuit occurs respectively.
In the above scheme, optionally, the routing transmission diagram is obtained by acquiring an X-ray image of the sample.
The X-ray images may be acquired in advance or during the measurement, as long as the sample can be photographed by the X-ray image acquisition device to obtain the corresponding X-ray image.
In a feasible embodiment, optionally, the step of superimposing a pre-obtained reference image and the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line anomaly in the reference image includes:
if the obtained point position of the hotspot in the reference image is on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is a gold wire short circuit;
if the obtained point position of the hot point in the reference image is on at least one gold ball or between two gold balls, determining that the detection result of the line abnormity is a gold ball short circuit;
if the obtained point position of the hot spot in the reference image is on at least one welding salient point or between two welding salient points, the detection result of the circuit abnormity can be determined as short circuit of the welding salient points.
Wherein, the comparison with different reference images can be used for determining the position of the cause of the abnormal circuit in the sample. By such an arrangement, it is possible to achieve lossless and quick determination of the cause of the occurrence of an abnormality.
It can be understood that when comparing the reference image with the hot spot on the outline map, the reference image needs to be matched with the outline map to directly compare the hot spot with the reference image and determine where in the reference image the problem occurs. Therefore, before the problem is determined, each reference image can be matched with the contour map respectively, or all the reference images can be matched with the contour map at the same time.
In this embodiment, optionally, before superimposing the pre-acquired reference image with the contour map, the method further includes:
acquiring an initial reference image of the sample;
matching according to the boundary of the reference image and the boundary of the contour map, and/or matching according to the characteristic point of the reference image and the characteristic point of the contour map;
and adjusting the size of the reference image according to the matching result so as to be matched with the contour map.
The contour map can display the boundary position of the sample, so that matching can be performed according to the coordinates of the pixel points of the boundary position in the image and the coordinates of the boundary position of the reference image in the reference image. For example, in the contour diagram, the ordinate of the upper boundary is 10, the abscissa is 20 to 220, the horizontal length of the upper boundary can be known to be 200, and if the ordinate of the lower boundary is 210, the distance between the upper and lower boundaries can be determined to be 200; if the horizontal length of the upper boundary in the reference image is 300, the distance between the upper boundary and the lower boundary is 300, and the coordinate of the starting point of the upper left corner is (20,10), the reference image can be directly reduced to 2/3 by taking the starting point of the upper left corner as the center, and the size of the reference image can be the same as that of the outline image, and matching can be performed. Of course, the adaptation can also be achieved by scaling the contour map.
Similarly, according to the feature points in the two images, the two images are scaled, translated, even rotated, and the like, so that the matching purpose can be achieved. In addition, matching may be performed by combining the boundary and the feature point in the image.
On the basis of the above technical solution, specifically, matching the boundary of the reference image with the boundary of the contour map includes:
and determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the boundary of the reference image in the reference image and the pixel point coordinates of the boundary of the contour map in the contour map.
Matching the feature points of the reference image with the feature points of the contour map according to the feature points of the reference image, and the method comprises the following steps:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the characteristic points of the reference image in the reference image and the pixel point coordinates of the characteristic points of the contour map in the contour map; wherein the number of the feature points is at least two.
Wherein, according to the pixel point coordinate, can realize at least one in size adjustment, direction adjustment, angle adjustment and translation adjustment. Through the arrangement, the purpose of matching the two images can be accurately and quickly realized, and the positions of the hot spots in the reference images can be determined by overlapping after matching, so that the reason of the line abnormity can be conveniently determined.
According to the technical scheme provided by the embodiment of the application, the contour map of the sample is obtained, the sample is powered on, and the infrared image of the sample is obtained; if the infrared image has a hot spot, corresponding the hot spot to the contour map; and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image. The technical scheme provided by the application can achieve the purpose of accurately positioning the internal circuit abnormality of the detection object under the lossless condition.
On the basis of the above technical solutions, optionally, before obtaining the contour map of the sample, the method further includes:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein, the outline comprises code burning information;
and acquiring a code burning drawing of the sample, and determining the position of each block of the contour map in the whole contour map according to code burning information in the code burning drawing.
The method can be used for shooting incomplete contour maps of all parts of a sample and acquiring infrared images under the condition that the sample is large and cannot obtain a complete sample contour map at one time. After the hot spot is obtained or before the hot spot is obtained, the incomplete contour maps are preferably spliced to obtain a complete contour image, and the position of the hot spot in the contour map can be determined by splicing and overlapping the infrared images. In the process of splicing a plurality of incomplete contour maps, the specific position of splicing can be determined according to the code burning position in the sample contour map. Therefore, the code burning information in the code burning drawing of the sample can be extracted and used as the basis for image splicing. This technical scheme sets up like this, can deal with the sample of arbitrary size, avoids because too big and can't carry out the problem that the interior circuit detects unusually of sample. Therefore, the application range of the technical scheme can be expanded.
On the basis of the above technical solutions, if the matching operation with the reference image is completed through the profile map, in order to observe the position of the hot spot in the reference image more clearly, the profile map may be removed, for example, the layer of the profile map is hidden, so that the position of the hot spot in the reference image can be observed more clearly.
Fig. 2 is a schematic diagram of a chip internal circuit abnormality provided in an embodiment of the present application, and as shown in fig. 2, if a hot spot is respectively located at each of positions 1 to 6 in an image, the hot spot may respectively correspond to an abnormal situation on the right side, where, for example, at position 1, the hot spot is a gold ball-gold ball short circuit, at position 2, the hot spot is a gold finger-gold finger short circuit, at position 3, the hot spot is a gold wire-gold wire short circuit, at position 4, the gold wire touches a short circuit at an edge of the chip, at position 5, the hot spot is a micro-crack/flip abnormality, such as a line short circuit between layers due to micro-cracks or flip, and, if at position 6, the hot spot may be determined as a PCB substrate line short circuit.
According to the scheme, the function is directly integrated in the software of the thermal positioning equipment, two vertexes are selected to be rectangles after the wiring diagram or the X-ray photo is imported, the sizes of the vertexes are adjusted to be consistent, the superposition function can be achieved on the software, and then the failure mode can be preliminarily judged according to the position of the hot point.
In the scheme, after the hot spot is extracted, the routing drawing and the hot spot can be superposed, and the superposed drawing can also comprise drawings with all outlines such as front-side code burning drawing paper, a spherical drawing, a convex-point drawing of a flip-chip welding product and the like. The drawing can be replaced by superimposing the X-ray picture and the hot spot under the condition of no drawing.
Example two
Fig. 3 is a device for detecting an internal circuit abnormality according to the second embodiment of the present application, where the device may be implemented by software and/or hardware, and may be integrated in an electronic device such as an intelligent terminal.
As shown in fig. 3, the apparatus may include:
the infrared image acquisition module 310 is configured to acquire a profile of a sample, power up the sample, and acquire an infrared image of the sample;
a profile map corresponding module 320, configured to, if a hot spot exists in the infrared image, correspond the hot spot to the profile map;
and the point location superposing module 330 is configured to superpose a pre-obtained reference image and the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of the line anomaly in the reference image.
The internal circuit abnormality detection device provided by the embodiment of the invention can execute the internal circuit abnormality detection method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of executing the internal circuit abnormality detection method.
EXAMPLE III
A third embodiment of the present application further provides a storage medium containing computer-executable instructions, which when executed by a computer processor, are configured to perform a method for detecting an internal circuit abnormality, where the method includes:
acquiring a profile of a sample, and electrifying the sample to acquire an infrared image of the sample;
if the infrared image has a hot spot, corresponding the hot spot to the contour map;
and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Storage media refers to any of various types of memory electronics or storage electronics. The term "storage medium" is intended to include: mounting media such as CD-ROM, floppy disk, or tape devices; computer system memory or random access memory such as DRAM, DDR RAM, SRAM, EDO RAM, Lanbas (Rambus) RAM, etc.; non-volatile memory such as flash memory, magnetic media (e.g., hard disk or optical storage); registers or other similar types of memory elements, etc. The storage medium may also include other types of memory or combinations thereof. In addition, the storage medium may be located in the computer system in which the program is executed, or may be located in a different second computer system connected to the computer system through a network (such as the internet). The second computer system may provide the program instructions to the computer for execution. The term "storage medium" may include two or more storage media that may reside in different unknowns (e.g., in different computer systems connected by a network). The storage medium may store program instructions (e.g., embodied as a computer program) that are executable by one or more processors.
Of course, the storage medium provided in the embodiments of the present application contains computer-executable instructions, and the computer-executable instructions are not limited to the operation of detecting an internal circuit abnormality as described above, and may also perform related operations in the method of detecting an internal circuit abnormality as provided in any embodiment of the present application.
Example four
The fourth embodiment of the present application provides an electronic device, where the device for detecting an internal circuit abnormality provided in the fourth embodiment of the present application may be integrated into the electronic device, and the electronic device may be configured in a system or may be a device that performs part or all of functions in the system. Fig. 4 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present application. As shown in fig. 4, the present embodiment provides an electronic device 400, which includes: one or more processors 420; the storage device 410 is configured to store one or more programs, and when the one or more programs are executed by the one or more processors 420, the one or more processors 420 implement the method for detecting an internal circuit exception according to the embodiment of the present application, where the method includes:
acquiring a profile of a sample, and electrifying the sample to acquire an infrared image of the sample;
if the infrared image has a hot spot, corresponding the hot spot to the contour map;
and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
Of course, those skilled in the art can understand that the processor 420 also implements the technical solution of the method for detecting an internal line anomaly provided in any embodiment of the present application.
The electronic device 400 shown in fig. 4 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 4, the electronic device 400 includes a processor 420, a storage device 410, an input device 430, and an output device 440; the number of the processors 420 in the electronic device may be one or more, and one processor 420 is taken as an example in fig. 4; the processor 420, the storage device 410, the input device 430, and the output device 440 in the electronic apparatus may be connected by a bus or other means, and are exemplified by a bus 450 in fig. 4.
The storage device 410 is a computer-readable storage medium, and can be used to store software programs, computer-executable programs, and module units, such as program instructions corresponding to the method for detecting an internal circuit abnormality in the embodiment of the present application.
The storage device 410 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the storage 410 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, storage 410 may further include memory located remotely from processor 420, which may be connected via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input means 430 may be used to receive input numbers, character information, or voice information, and to generate key signal inputs related to user settings and function control of the electronic device. The output device 440 may include a display screen, speakers, or other electronic equipment.
The electronic equipment provided by the embodiment of the application can achieve the purpose of accurately positioning the internal circuit abnormality of the detection object under the lossless condition.
The internal circuit abnormality detection device, medium, and electronic device provided in the above embodiments may execute the internal circuit abnormality detection method provided in any embodiment of the present application, and have functional modules and advantageous effects corresponding to the execution of the method. For the technical details not described in detail in the above embodiments, reference may be made to the method for detecting an abnormality of an internal line provided in any embodiment of the present application.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present application and the technical principles employed. It will be understood by those skilled in the art that the present application is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the application. Therefore, although the present application has been described in more detail with reference to the above embodiments, the present application is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present application, and the scope of the present application is determined by the scope of the appended claims.
Claims (10)
1. A method for detecting an abnormality in an internal circuit, the method comprising:
acquiring a profile of a sample, and electrifying the sample to acquire an infrared image of the sample;
if the infrared image has a hot spot, corresponding the hot spot to the contour map;
and superposing a pre-acquired reference image and the contour map to obtain the point position of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
2. The method of claim 1, wherein the reference image comprises a wire bond layout, a wire bond transmission map, a sphere map, and a solder bump map.
3. The method according to claim 2, wherein superimposing a pre-acquired reference image with the contour map to obtain a point location of the hot spot in the reference image, so as to determine a detection result of a line anomaly in the reference image, comprises:
if the obtained point position of the hotspot in the reference image is on at least one gold wire or between two gold wires, determining that the detection result of the circuit abnormality is a gold wire short circuit;
if the obtained point position of the hot point in the reference image is on at least one gold ball or between two gold balls, determining that the detection result of the line abnormity is a gold ball short circuit;
if the obtained point position of the hot spot in the reference image is on at least one welding salient point or between two welding salient points, the detection result of the circuit abnormity can be determined as short circuit of the welding salient points.
4. The method of claim 2, wherein the wire bond transmission map is obtained by taking an X-ray image of the sample.
5. The method of claim 1, wherein prior to obtaining the profile map of the sample, the method further comprises:
if the contour map of the sample is larger than the visible boundary, the contour map is obtained in a blocking mode; wherein, the outline comprises code burning information;
and acquiring a code burning drawing of the sample, and determining the position of each block of the contour map in the whole contour map according to code burning information in the code burning drawing.
6. The method of claim 1, wherein prior to superimposing a pre-acquired reference image with the contour map, the method further comprises:
acquiring an initial reference image of the sample;
matching according to the boundary of the reference image and the boundary of the contour map, and/or matching according to the characteristic point of the reference image and the characteristic point of the contour map;
and adjusting the size of the reference image according to the matching result so as to be matched with the contour map.
7. The method of claim 6, wherein matching the boundary of the reference image with the boundary of the contour map comprises:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the boundary of the reference image in the reference image and the pixel point coordinates of the boundary of the contour map in the contour map;
matching the feature points of the reference image with the feature points of the contour map according to the feature points of the reference image, and the method comprises the following steps:
determining at least one of size adjustment, direction adjustment, angle adjustment and translation adjustment of the reference image according to the pixel point coordinates of the characteristic points of the reference image in the reference image and the pixel point coordinates of the characteristic points of the contour map in the contour map; wherein the number of the feature points is at least two.
8. An apparatus for detecting an abnormality in an internal circuit, the apparatus comprising:
the infrared image acquisition module is used for acquiring a contour map of the sample, and electrifying the sample to acquire an infrared image of the sample;
the profile map corresponding module is used for corresponding the hot spot to the profile map if the hot spot exists in the infrared image;
and the point location superposition module is used for superposing a pre-acquired reference image and the contour map to obtain the point location of the hot spot in the reference image so as to determine the detection result of the line abnormality in the reference image.
9. A computer-readable storage medium on which a computer program is stored, the program, when executed by a processor, implementing the method for detecting an internal line abnormality according to any one of claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method for detecting an internal line anomaly according to any one of claims 1 to 7 when executing the computer program.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011239194.2A CN112485709B (en) | 2020-11-09 | 2020-11-09 | Method, device, medium and electronic equipment for detecting abnormality of internal circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011239194.2A CN112485709B (en) | 2020-11-09 | 2020-11-09 | Method, device, medium and electronic equipment for detecting abnormality of internal circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN112485709A true CN112485709A (en) | 2021-03-12 |
CN112485709B CN112485709B (en) | 2024-03-29 |
Family
ID=74929116
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011239194.2A Active CN112485709B (en) | 2020-11-09 | 2020-11-09 | Method, device, medium and electronic equipment for detecting abnormality of internal circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112485709B (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113486622A (en) * | 2021-06-29 | 2021-10-08 | 海光信息技术股份有限公司 | Chip failure analysis method and device, electronic equipment and storage medium |
CN113484363A (en) * | 2021-06-29 | 2021-10-08 | 重庆长安新能源汽车科技有限公司 | Test device and method for simulating internal heating of controller |
CN113628176A (en) * | 2021-07-28 | 2021-11-09 | 生益电子股份有限公司 | Conductive medium detection method, device, equipment and storage medium of PCB |
CN114061765A (en) * | 2021-10-29 | 2022-02-18 | 歌尔股份有限公司 | Device glue path detection method, control device and glue dispensing device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5150423A (en) * | 1990-07-10 | 1992-09-22 | Dainippon Screen Mfg. Co. Ltd. | Method of and device for inspecting pattern of printed circuit board |
CN108693462A (en) * | 2018-06-13 | 2018-10-23 | 奇酷互联网络科技(深圳)有限公司 | Circuit board detecting method, system, readable storage medium storing program for executing, equipment and circuit board |
CN108918526A (en) * | 2018-04-10 | 2018-11-30 | 华南理工大学 | A kind of chips defect detection method of flexibility IC package base plate line |
CN109916927A (en) * | 2019-02-28 | 2019-06-21 | 合刃科技(深圳)有限公司 | Defect inspection method, system and device in a kind of battery |
CN110598795A (en) * | 2019-09-17 | 2019-12-20 | 展讯通信(上海)有限公司 | Image difference detection method and device, storage medium and terminal |
-
2020
- 2020-11-09 CN CN202011239194.2A patent/CN112485709B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5150423A (en) * | 1990-07-10 | 1992-09-22 | Dainippon Screen Mfg. Co. Ltd. | Method of and device for inspecting pattern of printed circuit board |
CN108918526A (en) * | 2018-04-10 | 2018-11-30 | 华南理工大学 | A kind of chips defect detection method of flexibility IC package base plate line |
CN108693462A (en) * | 2018-06-13 | 2018-10-23 | 奇酷互联网络科技(深圳)有限公司 | Circuit board detecting method, system, readable storage medium storing program for executing, equipment and circuit board |
CN109916927A (en) * | 2019-02-28 | 2019-06-21 | 合刃科技(深圳)有限公司 | Defect inspection method, system and device in a kind of battery |
CN110598795A (en) * | 2019-09-17 | 2019-12-20 | 展讯通信(上海)有限公司 | Image difference detection method and device, storage medium and terminal |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113486622A (en) * | 2021-06-29 | 2021-10-08 | 海光信息技术股份有限公司 | Chip failure analysis method and device, electronic equipment and storage medium |
CN113484363A (en) * | 2021-06-29 | 2021-10-08 | 重庆长安新能源汽车科技有限公司 | Test device and method for simulating internal heating of controller |
CN113486622B (en) * | 2021-06-29 | 2023-02-28 | 海光信息技术股份有限公司 | Chip failure analysis method and device, electronic equipment and storage medium |
CN113484363B (en) * | 2021-06-29 | 2023-05-23 | 重庆长安新能源汽车科技有限公司 | Test device and method for simulating internal heating of controller |
CN113628176A (en) * | 2021-07-28 | 2021-11-09 | 生益电子股份有限公司 | Conductive medium detection method, device, equipment and storage medium of PCB |
CN114061765A (en) * | 2021-10-29 | 2022-02-18 | 歌尔股份有限公司 | Device glue path detection method, control device and glue dispensing device |
Also Published As
Publication number | Publication date |
---|---|
CN112485709B (en) | 2024-03-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN112485709B (en) | Method, device, medium and electronic equipment for detecting abnormality of internal circuit | |
TWI686718B (en) | Determining coordinates for an area of interest on a specimen | |
JP6220061B2 (en) | Wafer inspection using free form protection area | |
TW201802770A (en) | System for detecting defects on a wafer | |
JP5010207B2 (en) | Pattern inspection apparatus and semiconductor inspection system | |
JP2004502250A (en) | Image processing system for use with an inspection system | |
WO2004038786A1 (en) | Probe mark reader and probe mark reading method | |
US7409152B2 (en) | Three-dimensional image processing apparatus, optical axis adjusting method, and optical axis adjustment supporting method | |
KR102143675B1 (en) | Context-based inspection for dark field inspection | |
US11380016B2 (en) | Fisheye camera calibration system, method and electronic device | |
CN108648175B (en) | Detection method and device | |
US7085408B1 (en) | Method and system for testing image sensor system-on-chip | |
CN110346704B (en) | Method, device and equipment for determining test file in board test and storage medium | |
JP2019191117A (en) | Image processing device, image processing method, and program | |
CN111105351B (en) | Video sequence image splicing method and device | |
US20140313349A1 (en) | Image processing device and image processing method | |
JP6115639B2 (en) | Information processing apparatus, inspection range calculation method, and program | |
WO2019080061A1 (en) | Camera device-based occlusion detection and repair device, and occlusion detection and repair method therefor | |
KR20210007701A (en) | Calibration Method for Real-Time Spherical 3D 360 Imaging and Apparatus Therefor | |
CN115426350A (en) | Image uploading method, image uploading device, electronic equipment and storage medium | |
JP2663135B2 (en) | Integrated circuit test equipment | |
CN110736911B (en) | Flying probe testing method, flying probe testing device, flying probe testing apparatus, and storage medium | |
JP2005045194A (en) | Probe-mark reader and probe-mark reading method | |
JP2022030615A (en) | Tint correction system and tint correction method | |
JP6511410B2 (en) | Inspection apparatus for solar panel, inspection method and inspection program |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |