CN112447691A - 半导体装置及半导体装置的制造方法 - Google Patents

半导体装置及半导体装置的制造方法 Download PDF

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CN112447691A
CN112447691A CN202010596841.9A CN202010596841A CN112447691A CN 112447691 A CN112447691 A CN 112447691A CN 202010596841 A CN202010596841 A CN 202010596841A CN 112447691 A CN112447691 A CN 112447691A
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semiconductor device
substrate
side portion
terminals
main
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传田俊男
田中才工
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Abstract

本发明提供半导体装置及半导体装置的制造方法，降低制造成本而进行特性改善。半导体装置具备主端子，其一端部分别接合于元件区内的电路图案，另一端部从金属基底基板的一个侧部向金属基底基板的外侧延伸。而且，半导体装置具备：控制端子，其配置于控制区域且包含控制布线部，控制区域邻接于金属基底基板的与接合有主端子的一个侧部对置的另一个侧部；密封部件，其密封金属基底基板的主面和控制区域。这样的半导体装置在配置有第一、第二半导体元件的电路图案直接接合有主端子。因此，与利用键合引线将它们之间接合的情况相比，能够降低电阻。

Description

半导体装置及半导体装置的制造方法
技术领域
本发明涉及一种半导体装置及半导体装置的制造方法。
背景技术
近年来，半导体装置包含半导体元件和实现该半导体元件的驱动控制等的控制IC(Integrated Circuit：集成电路)。半导体元件例如是IGBT(Insulated Gate BipolarTransistor：绝缘栅双极型晶体管)、功率MOSFET(Metal Oxide Semiconductor FieldEffect Transistor：金属氧化物半导体场效应晶体管)等。这样的半导体装置具有设置有半导体元件的基板和收纳该基板的壳体，并且被密封树脂密封。壳体嵌入成形有电连接于半导体元件的主电极的主端子以及电连接于控制IC的控制端子。另外，在壳体的配置有控制端子的区域设置有控制IC。
现有技术文献
专利文献
专利文献1：日本特开2014-146704号公报
发明内容
技术问题
但是，在上述半导体装置中，需要用于将主端子及控制端子与壳体一体成形的成形工序以及在这样的壳体粘接基板的粘接工序。而且，还需要通过键合引线将设置有半导体元件的电路图案与一体成形于壳体的主端子电连接的工序。由此，在制造半导体装置时，需要大量的工序和部件，制造成本高昂。另外，还谋求进一步改善电气特性、热特性。
本发明是鉴于该情况而做出的，其目的在于，提供一种制造成本被降低且进行了特性改善的半导体装置及半导体装置的制造方法。
技术方案
根据本发明的一观点，提供一种半导体装置，其具有：多个半导体元件；基板，其具有绝缘层和形成于所述绝缘层上的多个电路图案，并且在设定于主面的元件区内的所述多个电路图案分别设置有所述多个半导体元件；多个主端子，其一端部分别接合于所述元件区内的所述多个电路图案，另一端部从所述基板的第一侧部向所述基板的外侧延伸；多个控制端子，其配置于控制区域且包含控制布线部，所述控制区域邻接于所述基板的与所述第一侧部对置的第二侧部；密封部件，其密封所述基板的所述主面和所述控制区域。
另外，根据本发明的一观点，提供一种半导体装置的制造方法，其包括：准备工序，准备具有绝缘层和形成于所述绝缘层上的多个电路图案的基板、多个主端子、多个控制布线；配置工序，在设定于所述基板的主面的元件区内的所述多个电路图案，以使所述多个主端子的另一端部从所述基板的第一侧部向所述基板额外侧延伸的方式配置所述多个主端子的一端部，在邻接于所述基板的与所述第一侧部对置的第二侧部的控制区域配置包含有所述控制布线部的所述多个控制布线；接合工序，将配置于所述基板的所述多个电路图案的所述多个主端子的所述一端部进行接合；以及密封工序，利用密封部件来密封所述基板的所述主面和所述控制区域。
技术效果
根据公开的技术，能够降低制造成本，并且进行特性改善。
附图说明
图1是说明实施方式的半导体装置的外观的图。
图2是实施方式的半导体装置的侧视剖面图。
图3是实施方式的半导体装置的俯视剖面图。
图4是表示实施方式的半导体装置的制造方法的流程图。
图5是用于说明实施方式的半导体装置的制造方法所包含的外部连接端子的接合工序的图。
图6是用于说明实施方式的半导体装置的制造方法所包含的悬吊端子的接合工序的图。
图7是用于说明实施方式的半导体装置的制造方法的半导体元件、电子部件的接合工序以及利用键合引线的连接工序的图。
图8是用于说明实施方式的半导体装置的制造方法所包含的密封工序的图。
符号说明
10 半导体装置
21a 第一半导体元件
21b 第二半导体元件
22 金属基底基板
22a 元件区
23 绝缘层
24a、24b、24c、24d 电路图案
24e、24f、24g 固接图案
25 散热板
26 键合引线
30、31、32、33 控制端子
30a 控制区域
34 控制布线部
40、41a、41b、41c、41d 主端子
41a1、42a1、43a1 接合部
41a2、42a2、43a2 关联部
41a3 端子部
42、43、44 悬吊端子
42a3、43a3 悬吊部
50 电子部件
60 密封部件
80 成形模具
81 上部模具
82 下部模具
83 流路
84 腔室
具体实施方式
以下，参照附图，对实施方式进行说明。应予说明，在以下说明中，“正面”及“上表面”表示图2的半导体装置10中的朝向上侧的面。同样地，“上”表示图2的半导体装置10中的上侧的方向。“背面”及“下表面”表示图2的半导体装置10中的朝向下侧的面。同样地，“下”表示图2的半导体装置10中的下侧的方向。根据需要，在其他附图中也表示相同的方向性。“正面”、“上表面”、“上”、“背面”、“下表面”、“下”、“侧面”只不过是便于确定相对位置关系的表现，不限定本发明的技术思想。例如，“上”及“下”不必须指相对于地面的铅直方向。也就是说，“上”及“下”的方向不限于重力方向。
利用图1～图3对实施方式的半导体装置进行说明。图1是说明实施方式的半导体装置的外观的图。应予说明，图1的(A)是半导体装置10的(从图1的(B)的上侧或下侧观察的)侧视图，图1的(B)是半导体装置10的俯视图。图2是实施方式的半导体装置的侧视剖面图。另外，图3是实施方式的半导体装置的俯视剖面图。应予说明，图2是图3的单点划线X-X处的剖面图，图3是图2的单点划线X-X处的剖面图。另外，图3是对应于图1的俯视图的图。
首先，如图1所示，半导体装置10利用密封部件60将整个结构密封而呈立体形状。应予说明，半导体装置10的密封部件60可以是立方体状且在角部具有曲率。另外，半导体装置10从密封部件60的长边的两侧面分别延伸出多个控制端子30及多个主端子40。应予说明，在本实施方式中，在没有特别区别控制端子及主端子的情况下，作为控制端子30及主端子40而进行说明。
这样的半导体装置10的图2及图3所示的结构被密封部件60密封。即，半导体装置10具有6组第一半导体元件21a及第二半导体元件21b、金属基底基板22、控制端子30(包含控制端子31～33)、主端子40(包含主端子41a～41d)、电子部件50。另外，半导体装置10利用键合引线26将控制端子30、电子部件50、第一半导体元件21a、第二半导体元件21b、主端子40之间适当地连接。应予说明，在图3中，省略连接于电子部件50的键合引线的图示。并且，半导体装置10的这样的结构被密封部件60密封。应予说明，键合引线26由导电性优异的铝、铜等金属、或者至少包含这些金属中的一种的合金等构成。另外，这些键合引线26的直径优选为100μm以上且1mm以下。
第一半导体元件21a包含例如IGBT、功率MOSFET等开关元件。在第一半导体元件21a是IGBT的情况下，在背面具备集电极作为主电极，在正面具备栅极及具备发射极作为主电极。在第一半导体元件21a为功率MOSFET的情况下，在背面具备漏极作为主电极，在正面具备栅极及具备源极作为主电极。上述第一半导体元件21a的背面通过焊料(省略图示)而接合在金属基底基板22的电路图案24a、24b、24c、24d上。第二半导体元件21b包含例如SBD(Schottky Barrier Diode：肖特基势垒二极管)、FWD(Free Wheeling Diode：续流二极管)等二极管。这样的第二半导体元件21b在背面具备输出电极(阴极)作为主电极，在正面具备输入电极(阳极)作为主电极。上述第二半导体元件21b的背面通过焊料(省略图示)而接合在电路图案24a、24b、24c、24d上。应予说明，代替第一半导体元件21a及第二半导体元件21b，也可以使用同时具有IGBT和FWD的功能的RC(Reverse-Conducting，逆导)-IGBT。另外，在图3中，仅仅示出了设置有6组第一半导体元件21a及第二半导体元件21b的情况。不限于6组，能够设置与半导体装置10的规格等对应的组数。
金属基底基板22具有绝缘层23、形成于绝缘层23上的电路图案24a、24b、24c、24d、固接图案24e、24f、24g、以及形成于绝缘层23的背面的散热板25。绝缘层23由环氧树脂、混合有无机物填料的环氧树脂、聚酰亚胺、或者聚四氟乙烯中的任一者构成。应予说明，绝缘层23的厚度优选为0.09mm以上且0.15mm以下。电路图案24a、24b、24c、24d及固接图案24e、24f、24g由导电性优异的铜或铜合金等金属构成。应予说明，图2及图3的电路图案24a、24b、24c、24d及固接图案24e、24f、24g的形状是一个例子。这样的电路图案24a、24b、24c、24d及固接图案24e、24f、24g是通过对形成于绝缘层23的一个面的导电性的板或箔进行蚀刻而生成的，或者是通过将导电性的板贴合于绝缘层23的一个面而生成的。应予说明，电路图案24a、24b、24c、24d及固接图案24e、24f、24g的厚度优选为0.10mm以上且1.00mm以下，更优选为0.20mm以上且0.50mm以下。另外，如图2及图3所示，电路图案24a、24b、24c、24d形成在金属基底基板22的主面的元件区22a。电路图案24a、24b、24c、24d通过焊料(省略图示)而分别接合有第一半导体元件21a及第二半导体元件21b。应予说明，电路图案24a、24b、24c、24d的形状、配置位置及个数、第一半导体元件21a及第二半导体元件21b的配置位置仅是一个例子，不限于图2及图3，可以根据设计、规格等进行适当的设定。另外，在固接图案24e、24f、24g仅固接有后述的悬吊端子42、43、44，没有与其他结构电连接。应予说明，固接图案24e、24f、24g的形状及个数也不限于图2及图3所示，可以根据设计、规格等而进行适当的设定。但是，固接图案24e、24f、24g优选形成在金属基底基板22的接合有后述的主端子40的一个侧部(第一侧部)、或者与一个侧部对置的另一个侧部(第二侧部)。固接图案24e、24f、24g还优选形成于金属基底基板22的角部。
散热板25由导热性优异的例如铝、铁、银、铜、或者至少包含它们中的一种的合金构成。另外，为了提高耐腐蚀性，例如可以利用电镀处理等将镍等材料形成在散热板的表面。具体而言，除了镍以外，还有镍-磷合金、镍-硼合金等。还能够经由焊锡或银焊料等在该散热板25的背面安装冷却器(省略图示)来提高散热性。该情况下的冷却器由例如导热性优异的铝、铁、银、铜、或者至少包含它们中的一种的合金等构成。另外，作为冷却器，能够适用散热片或者由多个散热片构成的散热器、以及利用水冷的冷却装置等。另外，散热板可以与这样的冷却器一体化。在该情况下，由导热性优异的铝、铁、银、铜、或者至少包含它们中的一种的合金构成。并且，为了提高耐腐蚀性，例如可以利用电镀处理等将镍等材料形成在与冷却器一体化了的散热板的表面。具体而言，除了镍以外，还有镍-磷合金、镍-硼合金等。应予说明，散热板25的厚度优选为0.1mm以上且2.0mm以下。
多个主端子40的一端部设置在金属基底基板22的图3中右侧，另一端部从半导体装置10的图3中右侧的侧面(第一侧面)向外侧延伸。多个主端子40中的主端子41b、41a、41c、41d分别接合于金属基底基板22的电路图案24a、24b、24c、24d。另外，主端子41a具备接合部41a1、关联部41a2和端子部41a3。接合部41a1相对于金属基底基板22的正面呈平行而与电路图案24b接合。关联部41a2呈倾斜而将接合部41a1与端子部41a3一体地连接。端子部41a3与关联部41a2的倾斜相应而离开金属基底基板22的正面并且相对于该正面平行地从金属基底基板22向外部延伸。应予说明，虽然省略图示，但是主端子41b、41c、41d也成为与主端子41a相同的结构。
悬吊端子42、43、44的一端部分别与已述的固接图案24e、24f、24g接合，另一端部朝向金属基底基板22的外侧。悬吊端子42的另一端部从半导体装置10的图3中上侧的侧面(第三侧面)露出，悬吊端子43的另一端部从半导体装置10的图3中下侧的侧面(第四侧面)露出，悬吊端子44的另一端部从半导体装置10的图3中右侧的侧面(第一侧面)露出。应予说明，如后所述，悬吊端子42、43、44被去除从半导体装置10延伸出来的部分，各悬吊端子的另一端部没有从半导体装置10的侧面延伸出来。另外，如后述的图6所示，悬吊端子42、43具备接合部42a1、43a1、关联部42a2、43a2、悬吊部42a3、43a3。悬吊端子44虽然省略了图示，但是也成为与悬吊端子42、43相同的结构。
多个控制端子30(包含控制端子31、32、33)设置在控制区域30a，所述控制区域30a邻接于金属基底基板22的与接合有多个主端子40的一个侧部对置的另一个侧部。该控制区域30a位于比金属基底基板22的正面更高的位置。控制端子30从半导体装置10的图3中左侧的侧面(第二侧面)向外侧延伸。多个控制端子30还包含控制布线部34。控制布线部34配置在控制区域30a，电子部件50隔着焊料(省略图示)设置于控制布线部34。控制布线部34位于与控制端子30的从侧面向外侧延伸的部分相同的高度。控制布线部34位于比主端子40的接合于电路图案24a、24b、24c、24d的部位以及悬吊端子42、43、44的接合于固接图案24e、24f、24g的部位更高的位置。另外，控制端子30、主端子41a、41b、41c、41d的端子部41a3(主端子41b、41c、41d的端子部省略图示)、悬吊端子42、43、44的悬吊部42a3、43a3(悬吊端子44的悬吊部省略图示)位于相同的高度。
这样的多个主端子40、悬吊端子42、43、44及控制端子30(包含控制端子31、32、33)由导电性优异的铜或者铜合金等金属构成。还可以被镍或镍合金等金属覆盖。
所需要的个数的电子部件50经由焊料(省略图示)分别接合于控制布线部34。为了使半导体装置起到所希望的功能，电子部件50适当地使用控制IC、热敏电阻、电容器、电阻等。密封部件60密封上述所说明的结构。这样的密封部件60包含马来酰亚胺改性环氧树脂、马来酰亚胺改性酚醛树脂、马来酰亚胺树脂等热固化性树脂以及含于热固化性树脂的填充材料。作为其具体例，有环氧树脂，在环氧树脂中包含氧化硅、氧化铝、氮化硼或窒化铝等填充材料作为填料。
接下来，利用图4～图8对这样的半导体装置10的制造方法进行说明。图4是表示实施方式的半导体装置的制造方法的流程图。图5是用于说明包含于实施方式的半导体装置的制造方法的外部连接端子的接合工序的图，图6是用于说明包含于实施方式的半导体装置的制造方法的悬吊端子的接合工序的图。应予说明，图5及图6是与图3中的单点划线X-X及单点划线Y-Y的位置对应的剖面图。图7是用于说明实施方式的半导体装置的制造方法的半导体元件、电子部件的接合工序以及利用键合引线的连接工序的图，图8是用于说明包含于实施方式的半导体装置的制造方法的密封工序的图。应予说明，图7及图8是与图3中的单点划线X-X的位置对应的剖面图。
首先，准备第一半导体元件21a、第二半导体元件21b、金属基底基板22、由系杆将多个控制端子30和多个主端子40以及悬吊端子42、43、44相连而成的引线框架(省略图示)、电子部件50、密封部件60的原料等半导体装置10的构成部件(步骤S1)。接下来，将上述引线框架放置于金属基底基板22(步骤S2)。此时，例如，如图5所示，引线框架所包含的控制端子30(在图5中表示控制端子31、32、33)的控制布线部34位于控制区域30a。同时，引线框架所包含的主端子41a(主端子41b、41c、41d也同样)的接合部41a1(主端子41b、41c、41d的接合部省略图示)位于金属基底基板22的电路图案24b(电路图案24a、24c、24d)。应予说明，此时，使用预定的工具等(省略图示)，以使得控制端子30及控制布线部34维持在位于比金属基底基板22的主面更高的位置的控制区域30a。
接下来，如图5所示，利用超声波接合对放置在金属基底基板22的电路图案24b的引线框架所包含的主端子41a的接合部41a1(虚线的箭头方向)进行接合。同样地，也利用超声波接合对放置在金属基底基板22的电路图案24a、24c、24d的引线框架所包含的主端子41b、41c、41d进行接合。另外，同时，如图6所示，利用超声波接合对放置在金属基底基板22的固接图案24e、24f的引线框架所包含的悬吊端子42、43的接合部42a1、43a1(虚线的箭头方向)进行接合。同样地，也利用超声波接合对放置在金属基底基板22的固接图案24g的引线框架所包含的悬吊端子44进行接合(步骤S3)。由此，金属基底基板22的4条边中的3条边利用主端子41a、41b、41c、41d及悬吊端子42、43、44而下吊。由此，在以后的工序中金属基底基板22保持水平。另外，如上所述地，金属基底基板22的电路图案24a、24b、24c、24d及固接图案24e、24f、24g的厚度优选为0.10mm以上且1.00mm以下，更优选为0.20mm以上且0.50mm以下。这大约是绝缘层23的厚度的10倍以上。因此，即使对绝缘层23上的电路图案24a、24b、24c、24d及固接图案24e、24f、24g进行超声波接合，也能够可靠地传导超声波振动，能够稳定地接合主端子40及控制端子30。
接下来，如图7所示，将第一半导体元件21a及第二半导体元件21b经由焊料而分别接合于电路图案24b。同样地，将第一半导体元件21a及第二半导体元件21b经由焊料而分别接合于电路图案24a、24c、24d。另外，将电子部件50经由焊料而接合于控制布线部34(步骤S4)。接下来，如图7所示，利用键合引线26将控制端子30、电子部件50、第一半导体元件21a、第二半导体元件21b、主端子40(在图7中为主端子41a)之间适当地电连接(步骤S5)。
接下来，利用成形模具80的上部模具81和下部模具82将如此构成的图7所示的结构夹在中间。于是，如图8所示，在由上部模具81和下部模具82构成的腔室84中收纳金属基底基板22、引线框架的多个控制端子30、多个主端子40以及悬吊端子42、43、44。接下来，从下部模具82的流路83注入密封部件60的原料来填充腔室84内。由此，利用密封部件60来密封金属基底基板22、引线框架的多个控制端子30、多个主端子40以及悬吊端子42、43、44。此时，金属基底基板22以利用主端子41a、41b、41c、41d及悬吊端子42、43、44将金属基底基板22维持为水平的方式进行密封。在成形后，分离上部模具81及下部模具82，并取出半导体装置10。最后，去除密封部件60的毛边、引线框架的系杆、悬吊端子42、43、44从半导体装置10延伸出来的部分等不要的部位。由此获得图1～图3所示的半导体装置10(步骤S6)。
上述半导体装置10具备：第一半导体元件21a、第二半导体元件21b；金属基底基板22，其具有绝缘层23以及形成于绝缘层23上的电路图案24a、24b、24c、24d，并且在设定于主面的元件区22a内的电路图案24a、24b、24c、24d分别设置第一半导体元件21a、第二半导体元件21b。另外，半导体装置10具备主端子41b、41a、41c、41d，所述主端子41b、41a、41c、41d的一端部分别接合于元件区22a内的电路图案24a、24b、24c、24d，所述主端子41b、41a、41c、41d的另一端部从金属基底基板22的一个侧部向金属基底基板22的外侧延伸。而且，半导体装置10具备：控制端子30，其配置在控制区域30a，所述控制区域30a邻接于金属基底基板22的与接合有主端子41b、41a、41c、41d的一个侧部对置的另一个侧部；以及密封部件60，其密封金属基底基板22的主面与控制区域30a。
这样的半导体装置10将主端子41b、41a、41c、41d直接接合于配置有第一半导体元件21a、第二半导体元件21b的电路图案24a、24b、24c、24d。因此，若与利用键合引线将它们之间接合的情况相比，则能够降低电阻。另外，半导体装置10使用金属基底基板22。因此，半导体装置10能够高效地从散热板25散发来自第一半导体元件21a及第二半导体元件21b的发热，能够抑制温度上升。另外，配置有控制端子30所包含的控制布线部34的控制区域30a位于比金属基底基板22的元件区22a更高的位置。因此，能够抑制由各区域产生的噪声所带来的影响，能够稳定地驱动半导体装置10。因此，能够谋求改善半导体装置10的特性。并且，半导体装置10不使用一体地成形有控制端子30及主端子41b、41a、41c、41d等的壳体。因此，不需要成形这样的壳体的工序和在壳体粘接金属基底基板22的工序。因此，能够简化半导体装置10的制造工序，降低制造成本。

Claims (15)

1.一种半导体装置，其特征在于，具有：
多个半导体元件；
基板，其具有绝缘层和形成于所述绝缘层上的多个电路图案，并且在设定于主面的元件区内的所述多个电路图案分别设置有所述多个半导体元件；
多个主端子，其一端部分别接合于所述元件区内的所述多个电路图案，并且另一端部从所述基板的第一侧部向所述基板的外侧延伸；
多个控制端子，其配置于控制区域且包含控制布线部，所述控制区域邻接于所述基板的与所述第一侧部对置的第二侧部；以及
密封部件，其密封所述基板的所述主面和所述控制区域。
2.如权利要求1所述的半导体装置，其特征在于，
所述多个主端子从所述密封部件的与所述第一侧部对应的第一侧面延伸出，并且所述多个控制端子从所述密封部件的与所述第二侧部对应的第二侧面延伸出。
3.如权利要求2所述的半导体装置，其特征在于，
在所述基板的所述绝缘层上还形成有固接图案，
所述半导体装置还具有一端部固接于所述固接图案并且被所述密封部件密封的悬吊端子。
4.如权利要求3所述的半导体装置，其特征在于，
所述固接图案形成于所述基板的所述主面中的所述第二侧部。
5.如权利要求4所述的半导体装置，其特征在于，
所述固接图案还形成于所述基板的所述主面的角部。
6.如权利要求5所述的半导体装置，其特征在于，
所述一端部固接于所述固接图案的所述悬吊端子从距所述固接图案最近的、所述第一侧部与所述第二侧部之间的第三侧部和第四侧部中的任一侧部向所述基板的外侧延伸。
7.如权利要求6所述的半导体装置，其特征在于，
所述悬吊端子被所述密封部件密封，所述悬吊端子的另一端部从所述密封部件的分别与所述第三侧部或所述第四侧部对应的第三侧面或第四侧面露出。
8.如权利要求1所述的半导体装置，其特征在于，
所述控制区域位于比所述基板的所述主面更高的位置。
9.如权利要求1所述的半导体装置，其特征在于，
在所述控制布线部上配置有电子部件。
10.如权利要求1所述的半导体装置，其特征在于，
所述绝缘层由环氧树脂、混合有无机物填料的环氧树脂、聚酰亚胺、以及聚四氟乙烯中的任一方构成。
11.一种半导体装置的制造方法，其特征在于，包括：
准备工序，准备具有绝缘层和形成于所述绝缘层上的多个电路图案的基板、多个主端子、多个控制端子；
配置工序，在设定于所述基板的主面的元件区内的所述多个电路图案，以使所述多个主端子的另一端部从所述基板的第一侧部向所述基板的外侧延伸的方式配置所述多个主端子的一端部，并在邻接于所述基板的与所述第一侧部对置的第二侧部的控制区域配置包含有控制布线部的所述多个控制端子；
接合工序，将配置于所述基板的所述多个电路图案的所述多个主端子的所述一端部进行接合；以及
密封工序，利用密封部件来密封所述基板的所述主面和所述控制区域。
12.如权利要求11所述的半导体装置的制造方法，其特征在于，
在所述准备工序中，还准备在所述绝缘层形成有所述多个电路图案和固接图案的所述基板、以及悬吊端子，
在所述配置工序中，在所述固接图案配置所述悬吊端子的一端部，
在所述接合工序中，将所述悬吊端子的一端部接合于所述固接图案。
13.如权利要求12所述的半导体装置的制造方法，其特征在于，
所述固接图案形成在所述基板的所述主面中的所述第二侧部。
14.如权利要求13所述的半导体装置的制造方法，其特征在于，
所述固接图案还形成在所述基板的所述主面的角部。
15.如权利要求11或12所述的半导体装置的制造方法，其特征在于，
在所述接合工序中，利用超声波接合对所述基板进行接合。
CN202010596841.9A 2019-08-28 2020-06-28 半导体装置及半导体装置的制造方法 Pending CN112447691A (zh)

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