CN112435998A - Thermal stress management engine of GaN HEMT device - Google Patents

Thermal stress management engine of GaN HEMT device Download PDF

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Publication number
CN112435998A
CN112435998A CN202011470914.6A CN202011470914A CN112435998A CN 112435998 A CN112435998 A CN 112435998A CN 202011470914 A CN202011470914 A CN 202011470914A CN 112435998 A CN112435998 A CN 112435998A
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thermal stress
gan hemt
pcb
hemt device
technology
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雷建明
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Nanjing Vocational University of Industry Technology NUIT
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Nanjing Vocational University of Industry Technology NUIT
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3672—Foil-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a thermal stress management engine of a GaN HEMT device, which relates to the field of circuit thermal management, and achieves the purposes of reducing the high-temperature thermal stress of the device in PCB application and improving the working reliability of the device through various technologies. The core is that a thermal stress electric control technology of a frequency hopping working mode and average power control is adopted, so that the heating value is reduced. The graphene reinforced copper alloy rapid heat conduction technology and the three-dimensional heat separation technology adopting the vertical sub-board layout are adopted to assist in enhancing the heat dissipation performance. And the thermal stress balance technology adopting the heat source uniform dispersion layout, the thermal stress offset technology adopting the front and back heat source symmetrical layout and the thermal stress release technology adopting the single-side hole and array bottom hole layout are adopted to reduce or balance the thermal stress, thereby further reducing the thermal deformation of the PCB.

Description

Thermal stress management engine of GaN HEMT device
Technical Field
The invention relates to the field of circuit thermal management, in particular to a thermal stress management engine of a GaN HEMT device.
Background
Frequency hopping patterns in conventional silicon-based circuits are typically used to reduce light-load functionality or reduce EMI interference during light loads. In addition, in the traditional common PCB circuit layout, the GaN HEMT device is mainly arranged together compactly by shortening the distance and connection and reducing the size. Plus GaN HEMT devices tend to be mostly aligned on one side of the PCB board. These causes cause the heat generation of the whole circuit to be large, and most importantly, the heat is not evenly distributed and is not easy to dissipate.
GaN (gallium nitride), a representative third generation semiconductor, is distinguished by high frequency characteristics and can provide power densities in excess of 20W/mm. For more effective control of parasitic parameters, patch forms are often employed. Due to the high power density and high temperature tolerance characteristics of the GaN device, the size of the GaN device is much smaller than that of a silicon-based device, the power density is at least 2-10 times higher, and the working temperature is usually 10 margins higher. However, the small-size chip package, the increased high-temperature working upper limit, and the difference in thermal expansion coefficient between GaN and glass fiber PCB make the thermal stress problem of the GaN device after being assembled on the PCB very troublesome. The PCB deformation generated at high temperature can generate thermal stress on the device, strong polarization exists in the GaN device, and the thermal stress generated by the PCB deformation can generate strong inverse piezoelectric effect in the device, so that the device has serious reliability problems of current collapse, increased dynamic resistance, threshold drift and the like.
The thermal stress generated by the GaN HEMT device is generated from two parts, one part is interlayer stress generated by the deformation of a body material caused by high temperature, and the other part is mechanical stress applied to the device by the bending of a PCB caused by high temperature.
To improve the thermal stress problem, many conventional technologies based on silicon-based devices have been proposed, and the application numbers: the patent of CN105140122A adopts a method of deep hole etching of substrate, which can release stress, but is easy to cause the substrate to crack; application No.: CN104080311A utilizes the high thermal conductivity of low melting point metal to dissipate heat, but will increase the overall volume of the device; application No.: CN104162745A was drilled with laser technology, which is suitable for micro-holes, but large holes and welted irregular holes were not. In addition, these methods provide solutions for only a single semiconductor device, and in fact, most high frequency circuit boards have a large number of semiconductor devices, and these methods do not manage thermal stress of the entire PCB well in practical applications.
Disclosure of Invention
The invention aims to provide a thermal stress management engine of a GaN HEMT device, which can reduce the high-temperature thermal stress of the device in PCB application and improve the working reliability of the device through various technologies. The core is that a thermal stress electric control technology of a frequency hopping working mode and average power control is adopted, so that the heating value is reduced. The graphene reinforced copper alloy rapid heat conduction technology and the three-dimensional heat separation technology adopting the vertical sub-board layout are adopted to assist in enhancing the heat dissipation performance. And the thermal stress balance technology adopting the heat source uniform dispersion layout, the thermal stress offset technology adopting the front and back heat source symmetrical layout and the thermal stress release technology adopting the single-side hole and array bottom hole layout are adopted to reduce or balance the thermal stress, thereby further reducing the thermal deformation of the PCB.
A thermal stress management engine of a GaN HEMT device uses a thermal stress electric control technology, adopts a frequency hopping mode and output average power control, wherein the frequency hopping mode enables the GaN HEMT device to work in a frequency hopping mode in a full-load to light-load range, and comprises the following specific steps:
a stops m periods after working for n periods, and reciprocates in a circulating way every n + m periods, the duty ratio of n working periods is D, and the effective working duty ratio after frequency hopping is Deff= D (n)/(n + m) from DeffThe actual output average power in n + m periods can be obtained;
and b, the heat transfer of the GaN HEMT device in the circuit occurs in n high-frequency working cycles, and the GaN HEMT device is in a heat dissipation state under a low-frequency working state.
Preferably, a rapid heat conduction technology is used, a double-layer copper spreading mode of spreading copper by top heat dissipation and spreading copper by bottom heat dissipation is adopted for rapid heat dissipation, and graphene reinforced copper alloy is adopted for copper spreading.
Preferably, the GaN HEMT devices are arranged on the PCB in a staggered manner with strong heat exchange by using a thermal stress balance technology.
Preferably, the GaN HEMT device is symmetrically arranged on the PCB according to the front and back sides by using a thermal stress counteracting technology, so that the thermal stresses generated by the front and back sides of the PCB are counteracted mutually.
Preferably, a three-dimensional thermal separation technology is used, the plurality of GaN HEMT devices are mounted on the PCB daughter board, the PCB daughter board is fixedly connected to the PCB main board, and the number of the GaN HEMT devices on the PCB daughter board is less than or equal to 12.
Preferably, a thermal stress release technology is used, a single-side hole is formed in the PCB on the source-drain side of the GaN HEMT device, meanwhile, a micropore is formed in the PCB at the mounting position of each patch GaN HEMT device, and the micropores and the GaN HEMT devices are arrayed in a staggered mode.
Preferably, the diameter of the unilateral hole is more than or equal to 0.5mm, and the diameter of the micropore is less than or equal to 0.3 mm.
The invention has the advantages that: through a plurality of technologies, the high-temperature thermal stress of the device in the application of the PCB is reduced, and the working reliability of the device is improved. The core is that a thermal stress electric control technology of a frequency hopping working mode and average power control is adopted, so that the heating value is reduced. The graphene reinforced copper alloy rapid heat conduction technology and the three-dimensional heat separation technology adopting the vertical sub-board layout are adopted to assist in enhancing the heat dissipation performance. And the thermal stress balance technology adopting the heat source uniform dispersion layout, the thermal stress offset technology adopting the front and back heat source symmetrical layout and the thermal stress release technology adopting the single-side hole and array bottom hole layout are adopted to reduce or balance the thermal stress, thereby further reducing the thermal deformation of the PCB.
Drawings
FIG. 1 is a schematic diagram of the general design of the present invention;
FIG. 2 is a diagram illustrating the operation of the frequency hopping mode and the output average power control technique of the present invention;
FIG. 3 is a schematic representation of the working principle of the three-dimensional thermal separation technique of the present invention;
FIG. 4 is a schematic representation of the operating principle of the thermal stress balancing technique of the present invention;
FIG. 5 is a schematic diagram of a fork arrangement of a thermal stress balancing technique of the present invention;
FIG. 6 is a schematic representation of the working principle of the thermal stress cancellation technique of the present invention;
FIG. 7 is a schematic representation of the working principle of the thermal stress relief technique of the present invention;
the heat dissipation device comprises a PCB (printed circuit board) main board 1, a PCB sub-board 2, a GaN HEMT device 3, a fixing point 4, a radiator 5, a top layer heat dissipation copper paving 6, a bottom layer heat dissipation copper paving 7 and a single-side hole 8.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.
As shown in fig. 1 to 7, a thermal stress management engine of a GaN HEMT device uses a thermal stress electrical control technique, and adopts a frequency hopping mode and an output average power control, wherein the frequency hopping mode is to make the GaN HEMT device 3 work in a frequency hopping mode in a full range from full load to light load, and specifically includes the following steps:
a stops m periods after working for n periods, and reciprocates in a circulating way every n + m periods, the duty ratio of n working periods is D, and the effective working duty ratio after frequency hopping is Deff= D (n)/(n + m) from DeffThe actual output average power in n + m periods can be obtained;
in the circuit b, the heat transfer of the GaN HEMT device 3 occurs in n high-frequency working cycles, and the GaN HEMT device 3 is in a heat dissipation state under a low-frequency working state.
And a rapid heat conduction technology is used, a double-layer copper paving layer comprising top-layer heat dissipation copper paving 6 and bottom-layer heat dissipation copper paving 7 is adopted for rapid heat dissipation, and graphene reinforced copper alloy is adopted for copper paving.
And the GaN HEMT devices 3 are arranged on the PCB in a staggered manner with strong heat exchange by using a thermal stress balance technology.
And (3) using a thermal stress offset technology to symmetrically install the GaN HEMT device 3 on the PCB according to the front and back sides, so that the thermal stress generated by the front and back sides of the PCB is offset.
A plurality of GaN HEMT devices 3 are installed on a PCB daughter board 2 by using a three-dimensional thermal separation technology, the PCB daughter board 2 is fixedly connected to a PCB main board 1, and the number of the GaN HEMT devices 3 on the PCB daughter board 2 is less than or equal to 12.
By using a thermal stress release technology, a single-side hole 8 is formed in the PCB at the source-drain side of the GaN HEMT device 3, and a micropore is formed in the PCB at the mounting position of each patch GaN HEMT device 3, and the micropores and the GaN HEMT devices 3 are arrayed in a staggered manner.
The diameter of the single-side hole 8 is more than or equal to 0.5mm, and the diameter of the micropore is less than or equal to 0.3 mm.
The specific implementation mode and principle are as follows:
frequency hopping mode and output average power control technique: frequency hopping patterns in conventional silicon-based circuits are typically used to reduce light-load functionality or reduce EMI interference during light loads. Different from the traditional mode, the invention uses the frequency hopping mode to ensure that the GaN HEMT device 3 works in the frequency hopping mode in the full range from full load to light load, has different purposes, and aims to prolong the time of turning off the GaN HEMT device 3, namely the time of radiating the GaN HEMT device 3, while realizing high-frequency energy transfer. The working principle is shown in fig. 2 and described in detail as follows:
stopping m periods at n periods of operation, cycling back and forth every n + m periods in such a way that the duty cycle D of the n periods of operation is 80%, the effective duty cycle D after frequency hopping beingeff= 80% (# n)/(n + m) from DeffThe actual output average power over n + m periods can be obtained.
The energy transfer of the magnetic elements in the circuit occurs in n high-frequency cycles, so the size of the magnetic elements can still be small, and the average output power is determined by n + m cycles, that is, the GaN HEMT device 3 works in a high-frequency state and a low-frequency state, and the low-frequency working state can prolong the heat dissipation time of the device.
The rapid heat conduction technology comprises the following steps: the graphene reinforced copper alloy is laid at the bottom of the surface mount GaN HEMT device 3 to replace the traditional copper laying, so that the high thermal conductivity of the graphene reinforced copper alloy is utilized, and the good elasticity of the graphene is utilized to reduce the thermal stress.
Three-dimensional thermal separation technology: as shown in fig. 3, a single GaN HEMT device 3 or a small number of GaN HEMT devices 3 are arranged on the PCB sub-board 2 and then connected to the PCB main board 1, and the thermal resistance between the PCB main board 1 and the PCB sub-board 2 is large, so that the deformation of the large board caused by the heat generation of the devices is greatly reduced. The PCB daughter board 2 is small in size, and can be forcibly fixed on the radiator at the fixing point 4 by means of screws and the like, so that the PCB daughter board 2 is not deformed or the deformation amount is extremely small.
Thermal stress balance technology: according to the PCB supported by the GaN HEMT device 3, the layout is reasonable, so that the thermal capacity is uniformly distributed, and the common layout mainly shortens the distance, connects and reduces the size and is compactly placed together. The thermal stress balance technology of the invention enables the GaN HEMT device 3 to be arranged in a staggered mode with strong heat exchange, thereby shortening the connection, increasing the heat dissipation effect and reducing the generation of thermal stress, as shown in figures 4 and 5.
Thermal stress cancellation techniques: the thermal stress caused by the high temperature causes the PCB board of the GaN HEMT device 3 to deform. According to the thermal stress offset technology, the GaN HEMT device 3 is symmetrically arranged according to the front and the back, so that the thermal stress generated by the front and the back of the PCB is offset, and the deformation of the PCB is reduced, as shown in FIG. 6.
Thermal stress release technology: as shown in fig. 7, a place where the GaN HEMT device 3 passes a large current is generally a source-drain side, which most easily generates a large amount of heat, so that a large deformation of the PCB is locally caused, and the device generates a thermal stress, therefore, a large-sized single-sided hole 8 is formed near the source-drain side, which can greatly release the local thermal stress, and the diameter of the large-sized single-sided hole 8 is generally 0.5mm or more. And simultaneously, array type micropores are arranged at the bottom of the patch G GaN HEMT device 3, and the micropore array is also arranged in a staggered mode. The existence of micropore array can be fast with the heat that PCB top layer device produced to conduct the PCB bottom by the copper of irritating in the hole to can carry out quick heat dissipation through top layer and bottom bilayer shop copper. The array of micro-holes are typically 0.3mm and less in individual diameter to prevent solder paste after soldering of the device from flowing to the bottom of the PCB through the micro-holes at high temperature. The thermal stress release technology avoids the loss of the PCB caused by irregular punching through the ordered punching, and simultaneously releases the thermal stress due to air flow.
Based on the above, the invention achieves the purposes of reducing the high-temperature thermal stress of the device in the PCB application and improving the working reliability of the device through various technologies. The core is that a thermal stress electric control technology of a frequency hopping working mode and average power control is adopted, so that the heating value is reduced. The graphene reinforced copper alloy rapid heat conduction technology and the three-dimensional heat separation technology adopting the vertical sub-board layout are adopted to assist in enhancing the heat dissipation performance. And the thermal stress balance technology adopting the heat source uniform dispersion layout, the thermal stress offset technology adopting the front and back heat source symmetrical layout and the thermal stress release technology adopting the single-side hole and array bottom hole layout are adopted to reduce or balance the thermal stress, thereby further reducing the thermal deformation of the PCB.
It will be appreciated by those skilled in the art that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed above are therefore to be considered in all respects as illustrative and not restrictive. All changes which come within the scope of or equivalence to the invention are intended to be embraced therein.

Claims (7)

1. A thermal stress management engine of a GaN HEMT device is characterized in that a thermal stress electric control technology is used, a frequency hopping mode and output average power control are adopted, the frequency hopping mode enables the GaN HEMT device (3) to work in a frequency hopping mode in a full-load to light-load range, and the thermal stress management engine specifically comprises the following steps:
(a) stopping m periods after working n periods, and circularly reciprocating every n + m periods in such a way that the duty ratio of the n working periods is D, and the effective working duty ratio after frequency hopping is Deff= D (n)/(n + m) from DeffThe actual output average power in n + m periods can be obtained;
(b) in the circuit, heat transfer of the GaN HEMT device (3) occurs in n high-frequency working periods, and the GaN HEMT device (3) is in a heat dissipation state under a low-frequency working state.
2. The thermal stress management engine of a GaN HEMT device according to claim 1, wherein: by using a rapid heat conduction technology, the rapid heat dissipation is carried out by adopting a double-layer copper spreading mode of spreading copper (6) for top heat dissipation and spreading copper (7) for bottom heat dissipation, and the copper spreading mode adopts graphene reinforced copper alloy.
3. The thermal stress management engine of a GaN HEMT device according to claim 1, wherein: and the GaN HEMT devices (3) are arranged on the PCB in a staggered mode with strong heat exchange by using a thermal stress balance technology.
4. The thermal stress management engine of a GaN HEMT device according to claim 1, wherein: and (3) using a thermal stress offset technology to symmetrically install the GaN HEMT device (3) on the PCB according to the front and back sides so as to offset the thermal stress generated by the front and back sides of the PCB.
5. The thermal stress management engine of a GaN HEMT device according to claim 1, wherein: a plurality of GaN HEMT devices (3) are installed on a PCB daughter board (2) by using a three-dimensional thermal separation technology, the PCB daughter board (2) is fixedly connected to a PCB main board (1), and the number of the GaN HEMT devices (3) on the PCB daughter board (2) is less than or equal to 12.
6. The thermal stress management engine of a GaN HEMT device according to claim 1, wherein: by using a thermal stress release technology, a single-side hole (8) is formed in a PCB on the source-drain side of the GaN HEMT device (3), meanwhile, a micropore is formed in the PCB at the mounting position of each patch GaN HEMT device (3), and the micropores and the GaN HEMT devices (3) are arrayed in a staggered mode.
7. The thermal stress management engine of a GaN HEMT device according to claim 6, wherein: the diameter of the single-side hole (8) is more than or equal to 0.5mm, and the diameter of the micropore is less than or equal to 0.3 mm.
CN202011470914.6A 2020-12-15 2020-12-15 Thermal stress management engine of GaN HEMT device Pending CN112435998A (en)

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CN111078156A (en) * 2019-12-27 2020-04-28 深圳大普微电子科技有限公司 Flash memory data mapping method, DQ mapping module and storage device

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