CN112397539A - Image sensor and manufacturing method thereof - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14632—Wafer-level processed structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
Abstract
The invention provides an image sensor and a manufacturing method thereof, comprising the following steps: providing a substrate, wherein a plurality of pixel units are distributed on the substrate, and the pixel units are positioned in a first type well region in the substrate; etching the substrate to form an isolation groove between the adjacent pixel units; performing second type ion implantation on the peripheral substrate of the isolation groove, wherein the second type ions and the ions in the first type well region form a PN junction; the isolation layer fills the isolation trench. The Deep Trench Isolation (DTI) and the PN junction isolation formed by ion injection are combined in the isolation between the pixel units, the PN junction is formed in the substrate at the periphery of the isolation trench, carriers generated by defects near the isolation trench are prevented from freely entering the reading region and the photosensitive region, dark current is reduced, good electrical and optical isolation effects are achieved, the area of the isolation region is reduced, and the chip area utilization rate of the image sensor is improved.
Description
Technical Field
The invention belongs to the field of image sensors, and particularly relates to an image sensor and a manufacturing method thereof.
Background
A vertical charge transfer (VPS) image sensor is a three-dimensional image sensor based on a standard flash memory process, and is a semiconductor image sensor based on a floating gate structure array, that is, Pixel units of the image sensor are formed based on a Floating Gate (FG) structure, and continuous detection and imaging of optical signals are realized by converting the intensity of optical signals sensed by each Pixel unit into how many electrons are injected onto a floating gate layer of the Pixel unit. The pixel has the characteristics of high pixel density, small pixel size and the like, and the working principle is that the voltage generated by photo-generated electrons in the photosensitive area is coupled to the floating gate, so that the threshold voltage of a transistor in the reading area is changed, and the image recognition is realized. In practical applications, the vertical charge transfer image sensor has the problems of large dark current and optical crosstalk between pixels.
Disclosure of Invention
It is an object of the present invention to provide an image sensor and a method of fabricating the same that reduces dark current and improves optical crosstalk between pixels of the image sensor.
The invention provides a manufacturing method of an image sensor, which comprises the following steps:
providing a substrate, wherein the substrate is provided with a first surface and a second surface which are opposite; a plurality of pixel units are distributed on the substrate and are positioned in a first type well region in the substrate;
etching the substrate to form an isolation groove between the adjacent pixel units;
performing second-type ion implantation on the peripheral substrate of the isolation trench, wherein the second-type ions and the ions in the first-type well region form a PN junction in the peripheral substrate of the isolation trench;
and forming an isolation layer, wherein the isolation layer fills the isolation groove.
Further, in the ion implantation, with a vertical direction perpendicular to the surface of the substrate as a reference, the tilt angle range of the ion implantation is: 7 to 45 degrees.
Furthermore, in the ion implantation, the implantation energy range of the ions is 5 keV-45 keV, and the implantation dosage range of the ions is 5 multiplied by 1014ions/cm2～1×1016ions/cm2。
Further, before etching the substrate to form the isolation trench, the method further includes:
forming shallow trench isolations, wherein the shallow trench isolations are distributed in the substrate at intervals, and extend from the second surface to the inside of the substrate along the thickness direction of the substrate; the shallow trench isolation is located between the adjacent pixel units and/or between the photosensitive area and the reading area.
And forming the isolation trench after the shallow trench isolation is formed, wherein the isolation trench penetrates through a part of the substrate from the first surface along the thickness direction of the substrate and stops on the shallow trench isolation.
Further, the concentration of the ions of the second type is substantially equal at positions equidistant from the center line of the isolation trench within the region of the substrate around the isolation trench where the ions of the second type are implanted.
The present invention also provides an image sensor comprising:
a substrate having opposing first and second surfaces; a plurality of pixel units are distributed on the substrate and are positioned in a first type well region in the substrate;
an isolation trench extending through at least a portion of the thickness of the substrate, the isolation trench being located between adjacent pixel cells;
an isolation layer filled in the isolation trench;
the PN junction is formed in the peripheral substrate of the isolation groove and is formed by the ions of the second type injected into the peripheral substrate of the isolation groove and the ions in the first type well region.
Further, each pixel unit comprises a photosensitive area and a reading area, and the isolation groove is also positioned between the photosensitive area and the reading area.
Furthermore, shallow trench isolations are distributed in the substrate at intervals, and extend from the second surface to the inside of the substrate along the thickness direction of the substrate; the shallow trench isolation is positioned between the adjacent pixel units and/or between the photosensitive area and the reading area; the isolation trench extends from the first surface into the substrate along the substrate thickness direction, the isolation trench being in isolation communication with the shallow trench.
Further, the concentration of the ions of the second type is substantially equal at positions equidistant from the center line of the isolation trench within the region of the substrate around the isolation trench where the ions of the second type are implanted.
Further, a gate dielectric layer, a floating gate layer, a dielectric lamination and a control gate layer are sequentially laminated on the second surface of the substrate; the part of the floating gate layer right below the photosensitive area and the part of the floating gate layer right below the reading area are integrally arranged, and the part of the control gate layer right below the photosensitive area and the part of the control gate layer right below the reading area are arranged in an isolated mode.
Further, the ion concentration of the second type is basically equal at the position which is equidistant from the central line of the isolation groove in the ion area of the second type implanted in the first type well area of the substrate at the periphery of the isolation groove.
Furthermore, on a cross section perpendicular to the substrate, the width of the cross section of the isolation trench is 0.08-0.3 micrometers.
Further, the second type of ions include N-type P ions, N-type As ions, or P-type B ions;
when the second type of ions are N-type P ions, the implantation depth at the periphery of the isolation trench is
When the second type of ions are N-type As ions, the implantation depth at the periphery of the isolation trench is
When the second type of ions are P type B ions, the implantation depth at the periphery of the isolation trench is
Compared with the prior art, the invention has the following beneficial effects:
the invention provides an image sensor and a manufacturing method thereof, comprising the following steps: providing a substrate, wherein a plurality of pixel units are distributed on the substrate, and the pixel units are positioned in a first type well region in the substrate; etching the substrate to form an isolation groove between the adjacent pixel units; performing second-type ion implantation on the peripheral substrate of the isolation trench, wherein the second-type ions and the ions in the first-type well region form a PN junction in the peripheral substrate of the isolation trench; and forming an isolation layer, wherein the isolation layer fills the isolation groove. The isolation trenches are typically deep and the isolation layer located in the isolation trenches serves as an isolation, referred to as Deep Trench Isolation (DTI). The isolation between the pixel units combines Deep Trench Isolation (DTI) and ion implantation to form PN junction isolation, PN junctions are formed in the peripheral substrate of the isolation trenches, carriers generated by defects near the Deep Trench Isolation (DTI) are prevented from freely entering a reading region and a photosensitive region, dark current is reduced, meanwhile, good electrical and optical isolation effects are achieved, in addition, on the cross section perpendicular to the substrate, the cross section area of an isolation region formed by the PN junctions in the peripheral substrate of the isolation trenches and the isolation layer in the isolation trenches is smaller than that of an isolation region formed only by ion implantation, effective isolation is achieved, meanwhile, the area of the isolation region is reduced, and the chip area utilization rate of the image sensor is improved.
Drawings
FIG. 1 is a schematic flow chart illustrating a method for fabricating an image sensor according to an embodiment of the present invention;
fig. 2 to 5 are schematic diagrams illustrating steps of a method for manufacturing an image sensor according to an embodiment of the invention.
Wherein the reference numbers are as follows:
10-a substrate; 11-a first type well region; 12-an isolation trench; 13-PN junction; 14-an isolation layer; 15-shallow trench isolation; 16-a reading zone; 17-a photosensitive region; 21-a gate dielectric layer; 22-a floating gate layer; 23-a dielectric stack; 24-a control gate layer; 25-a bonding layer; 26-a second region; 27-a first region; 30-slide wafer.
Detailed Description
The embodiment of the invention provides an image sensor and a manufacturing method thereof. The invention is described in further detail below with reference to the figures and specific examples. The advantages and features of the present invention will become more apparent from the following description. It is to be noted, however, that the drawings are designed in a simplified form and are not to scale, but rather are to be construed in an illustrative and descriptive sense only and not for purposes of limitation.
An embodiment of the present invention provides a method for manufacturing an image sensor, as shown in fig. 1, including:
providing a substrate, wherein a plurality of pixel units are distributed on the substrate, and the pixel units are positioned in a first type well region in the substrate;
etching the substrate to form an isolation groove between the adjacent pixel units;
performing second-type ion implantation on the peripheral substrate of the isolation trench, wherein the second-type ions and the ions in the first-type well region form a PN junction in the peripheral substrate of the isolation trench;
and forming an isolation layer, wherein the isolation layer fills the isolation groove.
The image sensor and the method for fabricating the same according to the embodiments of the invention are described in detail below with reference to fig. 2 to 4.
As shown in fig. 2, a substrate 10 is provided, and a plurality of pixel units are distributed on the substrate 10, and the pixel units are located in a first-type well region 11 in the substrate 10. Each of the pixel cells includes a photosensitive region 17 and a read region 16. When light irradiates the upper part of the photosensitive region 17, photo-generated carriers are generated in the photosensitive region 17 and reflected as a potential change on the floating gate layer 22, and the potential change is coupled to the reading region 16, so that the reading current of the reading region 16 is changed, and the intensity of the light is read by the reading region 16.
It should be noted that the boundary of the first-type well region 11 is not necessarily the same boundary as the substrate 10, that is, the first-type well region 11 may be a certain region in the substrate 10, and the range of the first-type well region 11 may not be terminated at the boundary of the substrate 10.
Forming shallow trench isolation 15, the substrate 10 having a first surface f1And a second surface f2The shallow trench isolations 15 are distributed in the substrate 10 at intervals, and the shallow trench isolations 15 are arranged from the second surface f2The shallow trench isolation 15 is located between the adjacent pixel units and/or between the photosensitive area 17 and the reading area 16, and extends into the substrate 10 along the thickness direction of the substrate 10. Illustratively, the material of the shallow trench isolation 15 is, for example, silicon oxide. Alternatively, the photosensitive region 17 and the read region 16 may be isolated by ion implantation.
As shown in fig. 3, the substrate 10 is etched to form an isolation trench 12 between adjacent pixel units. The isolation trench 12 extends from the first surface f1The substrate 10, which penetrates a part of the thickness in the thickness direction of the substrate 10, stops on the shallow trench isolation 15. The isolation is performed in the direction perpendicular to the substrate to prevent optical crosstalk between pixel units. The isolation trench 12 is formed after the shallow trench isolation 15 is formed, and the shallow trench isolation 15 is used as an etching stop structure of the isolation trench 12, so that damage to pixels in the etching process can be prevented. Specifically, the damage of the gate dielectric layer 21 caused by the etching process can be prevented, so that the integrity of the gate dielectric layer 21 is ensured, and the imaging quality is improved.
As shown in fig. 3 and 4, a second type of ion implantation is performed on the peripheral substrate 10 of the isolation trench 12, and the second type of ion forms a PN junction 13 with the ions in the first type well region in the peripheral substrate 10 of the isolation trench 12. In an embodiment, the first-type well region 11 in the substrate 10 is, for example, a P-type well region, and N-type ion implantation is performed on the substrate 10 around the isolation trench 12 to form a PN junction 13. In another embodiment, the first-type well region 11 in the substrate 10 is, for example, an N-type well region, and P-type ion implantation is performed on the substrate 10 around the isolation trench 12 to form a PN junction 13. That is, the first type well region 11 is a P-type well region, and the second type ions are N-type ions; the first type well region 11 is an N-type well region, and the second type ions are P-type ions.
In the ion implantation, the tilt angle α of the ion implantation is, based on the vertical direction perpendicular to the surface of the substrate 10: 7 to 45 degrees. Illustratively, in the ion implantation, the implantation energy of the ions ranges from 5keV to 45keV, and the implantation dose of the ions ranges from 5 x 1014ions/cm2～1×1016ions/cm2. Ion implantation may be achieved by moving the ion implantation source horizontally/vertically and/or rotating the wafer.
The implantation energy range of the ions is preferably 10keV, 20keV, 25keV, 30keV, 35 keV.
The implanted ions are preferably N-type P (phosphorus) ions, and the implantation depth is equal to the circumference of the isolation trench 12
(Angstrom), preferably
The implanted ions are preferably N-type As (arsenic) ions, and the implantation depth is equal to the circumference of the isolation trench 12
(Angstrom), preferably
The implanted ions are preferably P-type B (boron) ions, and the implantation depth is equal to the circumferential implantation depth of the isolation trench 12
(Angstrom), preferably
Since the present embodiment performs the ion implantation process after the isolation trench 12 is formed, a good isolation effect can be achieved by using a small ion implantation strength and depth, and therefore, the depth of the ion implantation in the present embodiment can be regarded as a significant characteristic different from the prior art.
Next, an isolation layer 14 is formed, and the isolation layer 14 fills the isolation trench 12. The isolation layer 14 includes: a metal or silicide, such as tungsten or silicon oxide. The isolation trench 12 is typically deep, and the isolation layer 14 in the isolation trench 12 plays an isolation role, which is called Deep Trench Isolation (DTI). The isolation layer 14 may be formed by chemical vapor deposition, plasma enhanced chemical vapor deposition, or high density plasma chemical vapor deposition. Specifically, the isolation layer 14 fills the isolation trench 12 and covers the first surface f of the substrate 101The isolation layer 14 is planarized by a Chemical Mechanical Polishing (CMP) process, preferably, such that a top surface of the isolation layer 14 and the first surface f of the substrate 10 are substantially planar1Flush.
In the manufacturing method of the image sensor of the embodiment, Deep Trench Isolation (DTI) and ion implantation are combined to form PN junction isolation through isolation between pixel units, PN junctions are formed in the substrate around the isolation trench, carriers generated by defects near the Deep Trench Isolation (DTI) are prevented from freely entering the reading region and the photosensitive region, dark current is reduced, and meanwhile, the image sensor has good electrical and optical isolation effects.
Compared with the method for forming the isolation region by simply injecting ions, in the method for manufacturing the image sensor, the Deep Trench Isolation (DTI) and the PN junction isolation formed by injecting ions are combined by the isolation between the pixel units, the energy required by the ion injection is smaller, the area of the PN junction formed around the substrate of the isolation trench can be changed by adjusting the ion injection angle and the energy, and the isolation layer is filled in the isolation trench after the ion injection is completed, so that the pixels are well optically isolated. In addition, in the embodiment, ion implantation is performed on the side wall of the isolation trench 12 to form a PN junction with the well region of the pixel itself, and the original structure of the pixel is utilized, so that the process is simplified.
As shown in fig. 4, the present invention also provides an image sensor including:
a substrate 10, the substrate 10 having opposing first and second surfaces; a plurality of pixel units are distributed on the substrate and are positioned in a first type well region 11 in the substrate;
an isolation trench 12, the isolation trench 12 penetrating at least a portion of the thickness of the substrate 10, the isolation trench 12 being located between adjacent pixel cells;
an isolation layer 14, wherein the isolation layer 14 is filled in the isolation trench 12;
a PN junction 13, wherein the PN junction 13 is formed in the peripheral substrate 10 of the isolation trench 12.
Specifically, each of the pixel cells includes a photosensitive region 17 and a read region 16. The substrate 10 has a first surface f opposite to it1And a second surface f2. Shallow Trench Isolations (STI)15 are distributed at intervals in the substrate 10, and the shallow trench isolations 15 are arranged from the second surface f2The shallow trench isolation 15 is located between the adjacent pixel units and/or between the photosensitive area 17 and the reading area 16, and extends into the substrate 10 along the thickness direction of the substrate 10. Illustratively, the material of the shallow trench isolation 15 is, for example, silicon oxide. The isolation trench 12 extends from the first surface f1Extending into the substrate 10 along the thickness direction of the substrate, the isolation trench 12 is communicated with the shallow trench isolation 15 and is vertical to the shallow trench isolationThe isolation is performed in the direction perpendicular to the substrate to prevent optical crosstalk between pixel units.
Fig. 5 shows a partial schematic view of the isolation trench 12 and the PN junction 13, without the isolation layer 14 for clarity of the view. As shown in fig. 5, the center line (symmetry axis) of the isolation trench 12 is AA', and the PN junction 13 is a circular ring or a square ring in a plan view. The concentration of the second type ions at equal distances from the center line AA' of the isolation trench 12 is substantially equal in the region of the substrate around the isolation trench 12 where the second type ions are implanted. For example, a line segment BB 'perpendicular to the substrate direction in the PN junction 13 is distant from the center line AA' by r; line segment BB 'is substantially equal in concentration to the second type of ions around the entire annulus formed by the circle about centerline AA'. It should be properly understood that substantially equal means that the ion concentration can be substantially equal because the same or similar process conditions are used, although absolute equality under the same conditions cannot be achieved in any process in commercial production. In addition, if the second type of ion implantation is performed before the isolation trench 12 is formed, the technical effect cannot be achieved because the ion implantation gradually attenuates as the thickness of the substrate increases, and the uniformity of the ion implantation in the present embodiment cannot be achieved even by using a plurality of ion implantations. The uniformity and consistency of ion implantation in this embodiment also provides improved uniformity of device performance, as well as improved isolation.
Alternatively, the isolation trench 12 may extend through the substrate 10, and the isolation trench 12 is located between adjacent pixel units to directly separate two pixels, without the shallow trench isolation 15 between the two pixels.
The isolation trench 12 may be formed after the shallow trench isolation 15 is formed, and the shallow trench isolation 15 is used as an etching stop structure of the isolation trench 12, so that damage to a pixel in an etching process can be prevented. Specifically, the damage of the gate dielectric layer 21 caused by the etching process can be prevented, so that the integrity of the gate dielectric layer 21 is ensured, and the imaging quality is improved.
The first surface f1For the imageThe surface of the sensor receiving the incident light, the second surface f of the substrate 102A gate dielectric layer 21, a floating gate layer 22, a dielectric stack 23 and a control gate layer 24 are sequentially stacked on one side. To facilitate the processing operations, the image sensor may be bonded to the wafer 30 via a bonding layer 25. Wafer 30 may be a carrier wafer with temporary bonding serving as a support. Wafer 30 may also be a device wafer, such as a logic wafer.
The substrate 10 is, for example, a silicon substrate; specifically, the material may be selected from single crystal silicon, polycrystalline silicon, amorphous silicon, silicon germanium compound, Silicon On Insulator (SOI), or the like. The material of the gate dielectric layer 21 may be an oxide, such as silicon dioxide. The floating gate layer 22 and the control gate layer 24 may be made of polysilicon. The dielectric stack 23 may be a stack of silicon oxide-silicon Nitride-silicon oxide (ONO). Circuit structures may also be included on the control gate layer 24, such as stacked dielectric layers in which interconnect vias may be disposed and wiring layers in which metal lines, contact pads (Pad), and the like may be disposed, which may be located between the control gate layer 24 and the bonding layer 25, not shown.
In each pixel unit, the areas of the floating gate layer 22 respectively corresponding to the parts right below the photosensitive area 17 and the reading area 16 are connected and integrally arranged; when light irradiates the upper part of the photosensitive region 17, photo-generated carriers are generated in the photosensitive region 17 and reflected as a potential change on the floating gate layer 22, and the potential change is coupled to the reading region 16, so that the reading current of the reading region 16 is changed, and the intensity of the light is read out by the reading region. The read region 16 may be connected to pixel circuits for sensing voltage changes caused by the charges stored in the read region 16. The pixel circuit includes, for example, a reset transistor, a sense transistor, an address transistor, and the like. With the pixel circuit, on the one hand, a reset data value is written to the image sensor pixel to reset the read-out area, and on the other hand, data is read out from the image sensor pixel by the pixel circuit, the data corresponding to a part of the captured image.
Each of the pixel cells includes a photosensitive region 17 and a read region 16. The floating gate layer 22 and the control gate layer 24 have first regions 27 corresponding to the photosensitive regions 17, and the floating gate layer 22 and the control gate layer 24 have second regions 26 corresponding to the read regions 16.
The floating gate layer 22 and the control gate layer 24 have regions corresponding to the photosensitive region 17 and the readout region 16, respectively, which refer to functional and/or positional correspondences; specifically, the photosensitive region 17 and the first region 27 are structures belonging to the same photoelectric conversion transistor. The first region 27 is located directly below the photosensitive region 17 (first surface f)1At the upper and second surfaces f2In the lower orientation) the second region 26 is located directly below the read zone 16.
In one embodiment, the photosensitive region 17 includes a photosensitive element (e.g., a photodiode PD), and the photosensitive element of the photosensitive region 17 generates photo-generated carriers under the action of light. In another embodiment, in the photosensitive region 17, a first photodiode and a second photodiode are stacked and distributed along the thickness direction of the substrate 10, and the first photodiode is located above the second photodiode. In the photosensitive region 17, vertical charge transfer regions are distributed on one side of the first photodiode and the second photodiode which are distributed in a stacked manner and close to the shallow trench isolation 15. The read region 16 is connected to pixel circuitry for sensing charge-induced voltage changes in the read region.
It is understood that the image sensor provided by the embodiment of the present invention may be a VPS structure based on a flash memory process. In a VPS structure based on a flash memory process, the photosensitive region 17 and the read region 16 are separated by a Shallow Trench Isolation (STI) 15. The part of the floating gate layer 22 right below the photosensitive region 17 and the part right below the reading region 16 are integrally arranged, and the part of the control gate layer 24 right below the photosensitive region 17 and the part right below the reading region 16 are arranged in an isolated mode. The floating gate layer 22 regions respectively corresponding to the light sensing region 17 and the reading region 16 are integrally arranged, so that the light sensing region 17 can generate a voltage coupling effect on the reading region 16 when generating a photon-generated carrier by irradiation of incident light; the control gate layers 24 respectively corresponding to the light sensing region 17 and the reading region 16 are isolated from each other to be respectively applied with voltages to realize gate control.
The first surface f1The image sensor thus prepared has a Back Side Illumination (BSI) structure for a surface of the image sensor receiving incident light. Understandably, with the first surface f1As the surface for receiving incident light, the influence of structures such as a circuit structure, a control gate layer 24, a dielectric lamination 23, a floating gate layer 22, a gate dielectric layer 21 and the like on the incident light is avoided, and the photon receiving quantity is improved.
The image sensor manufactured by the embodiment of the invention comprises an array of image sensor pixel units. A pixel cell in an image sensor may include a photosensitive element such as a photodiode that converts incident light into electrons. The image sensor may have any number of pixels (e.g., hundreds or thousands or more). A typical image sensor may, for example, have millions of pixels (e.g., mega pixels). In high-end devices, the image sensor may have tens of millions of pixels.
In summary, the image sensor and the manufacturing method thereof provided by the invention include: providing a substrate, wherein a plurality of pixel units are distributed on the substrate, and the pixel units are positioned in a first type well region in the substrate; etching the substrate to form an isolation groove between the adjacent pixel units; performing second-type ion implantation on the peripheral substrate of the isolation trench, wherein the second-type ions and the ions in the first-type well region form a PN junction in the peripheral substrate of the isolation trench; and forming an isolation layer, wherein the isolation layer fills the isolation groove. The isolation trenches are typically deep and the isolation layer located in the isolation trenches serves as an isolation, referred to as Deep Trench Isolation (DTI). The isolation between the pixel units combines Deep Trench Isolation (DTI) and ion implantation to form PN junction isolation, PN junctions are formed in the peripheral substrate of the isolation trenches, carriers generated by defects near the Deep Trench Isolation (DTI) are prevented from freely entering a reading region and a photosensitive region, dark current is reduced, meanwhile, good electrical and optical isolation effects are achieved, in addition, on the cross section perpendicular to the substrate, the cross section area of an isolation region formed by the PN junctions in the peripheral substrate of the isolation trenches and the isolation layer in the isolation trenches is smaller than that of an isolation region formed only by ion implantation, effective isolation is achieved, meanwhile, the area of the isolation region is reduced, and the chip area utilization rate of the image sensor is improved.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the device disclosed by the embodiment, the description is relatively simple because the device corresponds to the method disclosed by the embodiment, and the relevant part can be referred to the method part for description.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (14)
1. A method of fabricating an image sensor, comprising:
providing a substrate, wherein the substrate is provided with a first surface and a second surface which are opposite; a plurality of pixel units are distributed on the substrate and are positioned in a first type well region in the substrate;
etching the substrate to form an isolation groove between the adjacent pixel units;
performing second-type ion implantation on the peripheral substrate of the isolation trench, wherein the second-type ions and the ions in the first-type well region form a PN junction in the peripheral substrate of the isolation trench;
and forming an isolation layer, wherein the isolation layer fills the isolation groove.
2. The method according to claim 1, wherein in the ion implantation, based on a vertical direction perpendicular to the surface of the substrate, the tilt angle range of the ion implantation is: 7 to 45 degrees.
3. The method of claim 1, wherein the ion implantation has an implantation energy in a range of 5keV to 45keV and an implantation dose in a range of 5 x 1014ions/cm2～1×1016ions/cm2。
4. The method of claim 1, wherein etching the substrate to form the isolation trench further comprises:
forming shallow trench isolations, wherein the shallow trench isolations are distributed in the substrate at intervals, and extend from the second surface to the inside of the substrate along the thickness direction of the substrate; the shallow trench isolation is located between the adjacent pixel units and/or between the photosensitive area and the reading area.
5. The method of claim 4, wherein the isolation trench is formed after the shallow trench isolation is formed, wherein the isolation trench stops on the shallow trench isolation from the first surface through a portion of a thickness of the substrate in a thickness direction of the substrate.
6. The method of claim 1, wherein a concentration of the ions of the second type at positions equidistant from a center line of the isolation trench is substantially equal in a region of the substrate around the isolation trench implanted with the ions of the second type.
7. An image sensor, comprising:
a substrate having opposing first and second surfaces; a plurality of pixel units are distributed on the substrate and are positioned in a first type well region in the substrate;
an isolation trench extending through at least a portion of the thickness of the substrate, the isolation trench being located between adjacent pixel cells;
an isolation layer filled in the isolation trench;
the PN junction is formed in the peripheral substrate of the isolation groove and is formed by the ions of the second type injected into the peripheral substrate of the isolation groove and the ions in the first type well region.
8. The image sensor of claim 7, wherein each of the pixel cells includes a photosensitive region and a read region, the isolation trench further being located between the photosensitive region and the read region.
9. The image sensor of claim 7,
shallow trench isolations are distributed in the substrate at intervals, and extend from the second surface to the inside of the substrate along the thickness direction of the substrate; the shallow trench isolation is positioned between the adjacent pixel units and/or between the photosensitive area and the reading area;
the isolation trench extends from the first surface into the substrate along the substrate thickness direction, the isolation trench being in isolation communication with the shallow trench.
10. The image sensor of claim 7, wherein a concentration of ions of the second type is substantially equal at positions equidistant from a centerline of the isolation trench within the region of the substrate implanted with ions of the second type around the isolation trench.
11. The image sensor of claim 8, wherein the second surface of the substrate is sequentially laminated with a gate dielectric layer, a floating gate layer, a dielectric stack and a control gate layer; the part of the floating gate layer right below the photosensitive area and the part of the floating gate layer right below the reading area are integrally arranged, and the part of the control gate layer right below the photosensitive area and the part of the control gate layer right below the reading area are arranged in an isolated mode.
12. The image sensor of claim 10, wherein a concentration of ions of the second type is substantially equal at positions equidistant from a center line of the isolation trench within the region of ions of the second type implanted in the well region of the first type around the periphery of the isolation trench.
13. The image sensor as claimed in claim 7, wherein a cross-sectional width of the isolation trench is 0.08 to 0.3 μm in a cross-section perpendicular to the substrate.
14. The image sensor of claim 7, wherein the second type of ions comprises N-type P ions, N-type As ions, or P-type B ions;
when the second type of ions are N-type P ions, the implantation depth at the periphery of the isolation trench is
When the second type of ions are N-type As ions, the implantation depth at the periphery of the isolation trench is
When the second type of ions are P type B ions, the implantation depth at the periphery of the isolation trench is
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