CN112386800B - Inverse defibrillation pulse generator - Google Patents

Inverse defibrillation pulse generator Download PDF

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CN112386800B
CN112386800B CN202011444031.8A CN202011444031A CN112386800B CN 112386800 B CN112386800 B CN 112386800B CN 202011444031 A CN202011444031 A CN 202011444031A CN 112386800 B CN112386800 B CN 112386800B
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CN112386800A (en
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单纯玉
李萍
仲贝贝
潘凌
汤师婷
李小莲
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Shanghai University of Medicine and Health Sciences
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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/38Applying electric currents by contact electrodes alternating or intermittent currents for producing shock effects
    • A61N1/39Heart defibrillators
    • A61N1/3906Heart defibrillators characterised by the form of the shockwave
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N1/00Electrotherapy; Circuits therefor
    • A61N1/18Applying electric currents by contact electrodes
    • A61N1/32Applying electric currents by contact electrodes alternating or intermittent currents
    • A61N1/38Applying electric currents by contact electrodes alternating or intermittent currents for producing shock effects
    • A61N1/39Heart defibrillators
    • A61N1/3975Power supply

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  • Health & Medical Sciences (AREA)
  • Cardiology (AREA)
  • Heart & Thoracic Surgery (AREA)
  • Engineering & Computer Science (AREA)
  • Biomedical Technology (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Radiology & Medical Imaging (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Animal Behavior & Ethology (AREA)
  • General Health & Medical Sciences (AREA)
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  • Veterinary Medicine (AREA)
  • Electrotherapy Devices (AREA)

Abstract

The invention relates to an inverse defibrillation pulse generator, a low-voltage energy storage module, wherein the low-voltage energy storage module is sequentially connected with a high-frequency converter, a rectifying filter and electrodes, and the number of the high-frequency converters is more than one (when the number of the high-frequency converters is more than or equal to two, the high-frequency converters are arranged in series); the invention directly generates high-voltage high-power defibrillation pulse by utilizing the energy in the energy storage device of the heart defibrillator by utilizing the high-frequency conversion technology, and the defibrillation pulse is output immediately without high-voltage capacitance.

Description

Inverse defibrillation pulse generator
Technical Field
The invention relates to the technical field of medical appliances, in particular to an inversion type defibrillation pulse generator which directly generates high-voltage high-power defibrillation pulses by utilizing high-frequency conversion technology to energy in an energy storage device of a heart defibrillator and instantly outputs the defibrillation pulses without high-voltage capacitance.
Background
Ventricular fibrillation refers to the disordered activation of the ventricles, resulting in the loss of regular orderly activation and relaxation functions of the ventricles, both of which are functional Sudden Cardiac Arrest (SCA). This means that the human heart has stopped pumping blood, a lethal arrhythmia. Ventricular fibrillation is an extremely chaotic manifestation of cardiac electrical activity and is generally difficult to self-terminate. Defibrillation refers to the simultaneous depolarization and then simultaneous repolarization of all myocardial cells by an electrical pulse of a certain energy, thereby inhibiting ectopic excitation, eliminating the reentry pathways, and restoring the heart to sinus rhythm. International standard
GB9706.8-2009 defines a cardiac defibrillator as a medical electrical device for defibrillation of the heart by applying electrical pulses to the skin (external electrodes) or exposed heart (internal electrodes) of a patient by means of electrodes. Jjjf 1149-2014 cardioverter calibration code a cardioverter is described as an instrument that uses its own energy storage device to generate instantaneous high voltage pulses of up to several kilovolts, with controllable energy, which are released through electrodes to the patient to eliminate certain heart rhythm disturbances, and which is the patient's return to normal sinus rhythm.
Clinical studies have demonstrated that electric shock is the only effective method currently in clinical use to terminate ventricular fibrillation. Phase defibrillation is a determining factor for treating ventricular fibrillation, and defibrillation is performed within 1 minute when sudden cardiac arrest occurs, so that the survival rate is 90%; defibrillation survival rate is 70-80% within 3 minutes; the defibrillation survival rate is reduced to about 50% within 5 minutes; defibrillation survival rate is about 30% in 7 minutes; beyond 10 minutes, patients have little chance of survival. Jjjf 1149-2014 calibration specification for cardiac defibrillators requires that the charging time of the manual defibrillators should be no greater than 20s and that the charging time of the automatic defibrillators should be no greater than 35s. This not only misses the golden time of rescuing the patient, but also wastes energy in the battery.
At the end of 1962, bernaud's lahn invented a dc defibrillator and was successfully used in clinic, and this dc defibrillation method has been used until now. The method is that the capacitor is charged by direct current, and then the capacitor is discharged rapidly through the electrode on the chest of the patient after reaching higher voltage. The transthoracic impedance of the human body is about 50 omega, the voltage is 40A of 2KV pulse current intensity, and the pulse power is 80kW for 10ms. Currently, most defibrillators employ this slow charge (20 s) fast discharge (10 ms) method to generate high voltage electrical pulses.
The main disadvantages of this approach include: 1. each defibrillation requires a charge of the capacitor. This not only misses the golden time of rescuing the patient, but also wastes energy in the battery. 2. The release efficiency is low, which refers to the ratio of released energy to stored energy. Most defibrillators have a release efficiency of between 50% and 80% due to the presence of the inductive internal resistance wire resistance.
An inversion type defibrillation pulse generator which directly generates high-voltage high-power defibrillation pulses by utilizing high-frequency conversion technology to energy in an energy storage device of the heart defibrillator and instantly outputs the defibrillation pulses without high-voltage capacitance is needed.
Disclosure of Invention
The invention aims to provide an inversion type defibrillation pulse generator which directly generates high-voltage high-power defibrillation pulses by utilizing the high-frequency conversion technology from energy in an energy storage device of a heart defibrillator and instantly outputs the defibrillation pulses without high-voltage capacitance.
An inverse defibrillation pulse generator comprising:
the low-voltage energy storage module is sequentially connected with a high-frequency converter, a rectifying filter and electrodes, wherein the number of the high-frequency converters is more than one (when the number of the high-frequency converters is more than or equal to two, the high-frequency converters are arranged in series);
the 1 st interface, the 2 nd interface and the 3 rd interface of the high-speed pulse width modulation controller U1 of the high-frequency converter are connected in parallel, the 5 th interface of the U1 is connected in series with a resistor RT and then grounded, the 6 th interface and the 7 th interface of the U1 are connected in parallel and then connected with a capacitor CT and then grounded, the 13 th interface and the 15 th interface of the U1 are connected in parallel and then connected with the 4 th interface of the half-bridge type field effect transistor driver U2, the 14 th interface of the U1 is connected in parallel with the 1 st interface and the 3 rd interface of the U2, the 9 th interface, the 10 th interface and the 12 th interface of the U1 are connected in parallel and then grounded, the 11 th interface of the U1 is connected in parallel with the 1 st interface and the 3 th interface of the half-bridge type field effect transistor driver U3, the 6 th interface and the 7 th interface of the U3 are connected in parallel and then grounded respectively and the emitter of the triode Q4, the collector of the Q4 is connected with a transformer T1, one path is connected with the emitter of the triode Q3, the other path is connected with the capacitor C3, the base of the Q4 is connected with the 8 th interface of the U3, the 12 th interface of the U3, the C3 and the 14 th interface of the U3 are connected in series, the 13 th interface of the U3 is connected with the base of the triode Q3, the collector of the Q3 is connected with 30-60V, the 4 th interface of the U2 and the 4 th interface of the U3 are respectively connected with 15V, the 8 th interface of the U2 is connected with the base of the triode Q2, the emitter of the Q2 is grounded, the collector of the Q2 is connected with the capacitor C2, the other path is connected with the inductor L1, the other path is connected with the emitter of the triode Q1, the 12 th interface of the U2, the C2 and the 14 th interface of the U2 are connected in series, the 13 th interface of the U2 is connected with the base of the Q1, the collector of the Q1 is connected with 30-60V, the other path is connected with the storage capacitor C1 and then grounded, the T1 is respectively connected with the diode D1 and the diode D2, one path is respectively connected with a diode D3 and a diode D4, the D1 and the D3 are connected and then connected with a resistor R1 and a capacitor C4 in parallel, the D2 and the D4 are connected and then connected with the resistor R1 and the capacitor C4 in parallel, one end of the C4 is connected with a 1200V interface, and the other end is grounded;
the rectifying filter is provided with a field effect tube Q1, a field effect tube Q2, a field effect tube Q3 and a field effect tube Q4, a diode D11 and a capacitor CO1 are connected in parallel between the drain electrode and the source electrode of the Q1, a diode D12 and a capacitor CO2 are connected in parallel between the drain electrode and the source electrode of the Q2, a diode D13 and a capacitor CO3 are connected in parallel between the drain electrode and the source electrode of the Q3, a diode D14 and a capacitor CO4 are connected in parallel between the drain electrode and the source electrode of the Q4, the grid electrode of the Q1 is a Q1 interface, the grid electrode of the Q2 is a Q2 interface, the grid electrode of the Q3 is a Q3 interface, the grid electrode of the Q4 is a Q4 interface, the inductor L1 is connected in series between the CO2 and the CO4 and is grounded after being connected in series, the inductor L1 is connected in series between the D13 and the D14, and the inductor T2 is connected in series.
The low-voltage energy storage module is a direct current power supply of 30V to 60V.
The low-voltage energy storage module is sequentially connected with a high-frequency converter, a rectifying filter and electrodes, wherein the number of the high-frequency converters is more than one (when the number of the high-frequency converters is more than or equal to two, the high-frequency converters are arranged in series); the invention directly generates high-voltage high-power defibrillation pulse by utilizing the energy in the energy storage device of the heart defibrillator by utilizing the high-frequency conversion technology, and the defibrillation pulse is output immediately without high-voltage capacitance.
Drawings
FIG. 1 is a schematic diagram of the structure of the present invention;
FIG. 2 is a schematic diagram of a high frequency transformer according to the present invention;
FIG. 3 is a schematic diagram of a rectifying filter according to the present invention;
FIG. 4 is a waveform diagram of the present invention;
in the figure: 1. the low-voltage energy storage module comprises a low-voltage energy storage module, a high-frequency converter, a rectification filter, a low-voltage energy storage module and electrodes, wherein the low-voltage energy storage module comprises a low-voltage energy storage module, a high-frequency energy storage module, a low-.
Detailed Description
The invention is further described below with reference to the drawings and specific examples.
An inverse defibrillation pulse generator comprising:
the low-voltage energy storage module 1, the low-voltage energy storage module 1 is sequentially connected with the high-frequency converter 2, the rectifying filter 3 and the electrode 4, and the number of the high-frequency converters 2 is more than one (when the number is more than or equal to two, the high-frequency converters are arranged in series);
the 1 st interface, the 2 nd interface and the 3 rd interface of the high-speed pulse width modulation controller U1 of the high-frequency converter 2 are connected in parallel, the 5 th interface of the U1 is connected in series with a resistor RT and then grounded, the 6 th interface and the 7 th interface of the U1 are connected in parallel and then connected with a capacitor CT and then grounded, the 13 th interface and the 15 th interface of the U1 are connected in parallel and then connected with the 4 th interface of the half-bridge type field effect transistor driver U2, the 14 th interface of the U1 is connected in parallel with the 1 st interface and the 3 rd interface of the U2, the 9 th interface, the 10 th interface and the 12 th interface of the U1 are connected in parallel and then grounded, the 11 th interface of the U1 is connected in parallel with the 1 st interface and the 3 th interface of the half-bridge type field effect transistor driver U3, the 6 th interface and the 7 th interface of the U3 are connected in parallel and then grounded respectively and the emitter of the triode Q4, the collector of the Q4 is connected with a transformer T1, one path is connected with the emitter of the triode Q3, the other path is connected with the capacitor C3, the base of the Q4 is connected with the 8 th interface of the U3, the 12 th interface of the U3, the C3 and the 14 th interface of the U3 are connected in series, the 13 th interface of the U3 is connected with the base of the triode Q3, the collector of the Q3 is connected with 30-60V, the 4 th interface of the U2 and the 4 th interface of the U3 are respectively connected with 15V, the 8 th interface of the U2 is connected with the base of the triode Q2, the emitter of the Q2 is grounded, the collector of the Q2 is connected with the capacitor C2, the other path is connected with the inductor L1, the other path is connected with the emitter of the triode Q1, the 12 th interface of the U2, the C2 and the 14 th interface of the U2 are connected in series, the 13 th interface of the U2 is connected with the base of the Q1, the collector of the Q1 is connected with 30-60V, the other path is connected with the storage capacitor C1 and then grounded, the T1 is respectively connected with the diode D1 and the diode D2, one path is respectively connected with a diode D3 and a diode D4, the D1 and the D3 are connected and then connected with a resistor R1 and a capacitor C4 in parallel, the D2 and the D4 are connected and then connected with the resistor R1 and the capacitor C4 in parallel, one end of the C4 is connected with a 1200V interface, and the other end is grounded;
the rectifying filter 3 is provided with a field effect tube Q1, a field effect tube Q2, a field effect tube Q3 and a field effect tube Q4, a diode D11 and a capacitor CO1 are connected in parallel between the drain electrode and the source electrode of the Q1, a diode D12 and a capacitor CO2 are connected in parallel between the drain electrode and the source electrode of the Q2, a diode D13 and a capacitor CO3 are connected in parallel between the drain electrode and the source electrode of the Q3, a diode D14 and a capacitor CO4 are connected in parallel between the drain electrode and the source electrode of the Q4, the grid electrode of the Q1 is a Q1 interface, the grid electrode of the Q2 is a Q2 interface, the grid electrode of the Q3 is a Q3 interface, the grid electrode of the Q4 is a Q4 interface, the connection between 0 and 60V interfaces are connected after the CO1 and the CO4 are connected in series, the D11 and the D12 are connected in series and then connected with an inductor L1, the L1 is connected with the D13 and the D14 in series and then connected with the T2.
The low-voltage energy storage module 1 is a direct current power supply of 30V to 60V.
The technical scheme of the invention is as follows:
the low-voltage energy storage module is responsible for providing energy for defibrillation pulse, and the voltage is 30-60V direct current. The high-frequency converter module converts direct current in the low-voltage energy storage module into high-frequency alternating current with the frequency of 100 kHz-500 kHz, and after the direct current is boosted and rectified by the transformer, the single module outputs 1200V,40A and pulses. The n modules are connected in series, and the output voltage can be increased by n times. A schematic diagram of the high frequency converter module is shown in fig. 2.
The output ports OUTA and OUTB of the high-speed Pulse Width Modulation (PWM) controller U1 send two paths of PWM signals with 180-degree phase difference to the input end 1 pin and the input end 3 pin of the U2 and the U3 respectively, and the connection mode is that the OUTA of the U1 is connected with the input end 1 pin and the input end 3 pin of the U2, and the OUTB of the U1 is connected with the input end 1 pin and the input end 3 pin of the U3.
U2 and U3 are half bridge fet drivers L6491D. The peak pull current is 4A, the peak sink current is 4A, the driving speed is up to 800kHz, and the static current is 540 mu A. The L6491D is internally provided with a high-speed comparator which can be used for detecting the magnetic saturation of the transformer.
U2 and triode Q1, Q2 constitute one half bridge arm, and U3 and triode Q3, Q4 constitute another half bridge arm. The two bridge arms are respectively connected with the primary side of the transformer T1 to form the full-bridge converter. The inductance L1 is leakage inductance of the transformer. The transistors Q1, Q2, Q3 and Q4 are NTBLS1D5N08MC power MOSFETs manufactured by Ansen semiconductor company, and can provide high-current high-speed switching. The switching time is less than 50ns. The on-resistance is 1.53mΩ, the drain-source breakdown voltage is 80V, and the pulse current is as high as 4487A. The leadless chip package minimizes electromagnetic interference.
The capacitor C1 is an ultra-low voltage energy storage capacitor, and the capacitors C2 and C3 are filter capacitors for providing power for high-end drivers of U2 and U3. The 1 pin of U1 is connected with the 3 pins of U1. The 2 pin of U1 is used to control the output of the pulse. When the pin 2 is at high level, the output ports OUTA and OUTB of the U1 send PWM signals, and the H-bridge direct current-alternating current conversion circuit outputs pulses. When the pin 2 is at a low level, the output ports OUTA and OUTB of the U1 are at a low level, no PWM signal exists, and the H-bridge direct current-alternating current conversion circuit does not output pulses. Therefore, the operating time of the H-bridge DC-AC conversion circuit converter (i.e., the 2-pin high time of U1) is the defibrillation pulse width.
Diodes D11, D12, D13, D14 are diodes inside field effect transistors Q1, Q2, Q3, Q4, respectively, and capacitors CO1, CO2, CO3, CO4 are output capacitors inside the field effect transistors, respectively. In the structure, a resonant circuit is formed by adopting parasitic output capacitance of the MOSFET and leakage inductance L1 of the switching transformer so as to realize zero voltage at two ends in the MOSFET conduction process.
When the trigger pulse is at low level, Q2 and Q4 are turned on, and the primary winding of the transformer T2 is grounded. When the trigger pulse is at a high level, the output ports OUTA and OUTB of U1 transmit PWM signals with periods 180 ° out of phase.
Is a trigger pulse (T), gate pulses (Q1-Q4), and Voltage (VTP) and current (IP) waveforms across the transformer. When the diagonal switches are simultaneously turned on, power is transferred to the secondary side. If the lower switches in the two bridge arms are simultaneously conducted, the voltage at the two ends of the primary side is zero. Therefore, during this period, no power is transferred to the secondary side.
The operation of the pulse generator may be divided into several different time intervals.
Time interval 1: t0< t < t1
During T0< T < T1, the trigger pulse T is low and the pulse generator does not output a pulse. The output ports OUTA, OUTB of U1 are low, HVG of U2 and U3 are low, LVG is high, the switching transistors Q1 and Q3 are off, and the switching transistors Q2 and Q4 are on, according to the internal characteristics of U2 and U3. After Q2 and Q4 are conducted, OUT of U2 and U3 are communicated with ground, and capacitors C2 and C3 are charged to 15V by internal bootstrap diodes of U2 and U3 for high-side tube driving.
2: t1< t < t2
The output port OUTA of U1 is high and OUTB is low. Q1 is conducted, the primary coil of the Q3 conducting transformer T1 is connected with a power supply VI through an inductor L1, the primary coil of the T1 has voltage, and power is transferred to a secondary side. The pulse width of the PWM signals sent by the output ports OUTA and OUTB of the U1 is changed, namely the time interval 2 is changed, so that the energy transmitted to the secondary side of the transformer is changed, and the effect of adjusting and stabilizing the amplitude of the output pulse is achieved.
Time interval 3: t2< t < t3
At time t=t2, Q1 turns off and the current in the primary side is maintained by inductor L1. The primary current will discharge the output capacitance (CO 1) of switch Q1 to zero potential. Since the voltage of the output capacitor (CO 1) cannot be suddenly changed, zero-voltage turn-off of the Q1 is realized.
Time interval 4: t3< t < t4
Q1 switches on, Q3 switches on, and transformer T1's primary both ends ground connection, and the voltage is zero, avoids the interference that free oscillation caused. At this time, the current in the primary side is maintained by the inductor L1.
The above procedure applies equally to the next half cycle due to the symmetry of the circuit.
The circuit can output 1200V and 40A pulses, and the actual circuit needs 2-3 pulses.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (1)

1. An inverse defibrillation pulse generator, comprising:
the low-voltage energy storage module (1), the low-voltage energy storage module (1) is sequentially connected with a high-frequency converter (2), a rectifying filter (3) and electrodes (4), and when the number of the high-frequency converters (2) is more than one and equal to two, the high-frequency converters are arranged in series;
the 1 st interface, the 2 nd interface and the 3 rd interface of the high-speed pulse width modulation controller U1 of the high-frequency converter (2) are connected in parallel, the 5 th interface of the U1 is connected in series with a resistor RT and then grounded, the 6 th interface and the 7 th interface of the U1 are connected in parallel and then connected with a capacitor CT in series and then grounded, the 13 th interface and the 15 th interface of the U1 are connected in parallel and then connected with the 4 th interface of the half-bridge type field effect transistor driver U2, the 14 th interface of the U1 is connected in parallel with the 1 st interface and the 3 rd interface of the U2, the 9 th interface, the 10 th interface and the 12 th interface of the U1 are connected in parallel and then grounded, the 11 th interface of the U1 is connected in parallel with the 1 st interface and the 3 th interface of the half-bridge type field effect transistor driver U3, the 6 th interface and the 7 th interface of the U3 are connected in parallel and then grounded and respectively connected with the emitter of a triode Q4, the collector of the Q4 is connected with the transformer T1, one path is connected with the emitter of the triode Q3, the other path is connected with the capacitor C3, the base of the Q4 is connected with the 8 th interface of the U3, the 12 th interface of the U3, the C3 and the 14 th interface of the U3 are connected in series, the 13 th interface of the U3 is connected with the base of the triode Q3, the collector of the Q3 is connected with 30-60V, the 4 th interface of the U2 and the 4 th interface of the U3 are respectively connected with 15V, the 8 th interface of the U2 is connected with the base of the triode Q2, the emitter of the Q2 is grounded, the collector of the Q2 is connected with the capacitor C2, the other path is connected with the inductor L1, the other path is connected with the emitter of the triode Q1, the 12 th interface of the U2, the C2 and the 14 th interface of the U2 are connected in series, the 13 th interface of the U2 is connected with the base of the Q1, the collector of the Q1 is connected with 30-60V, the other path is connected with the storage capacitor C1 and then grounded, the T1 is respectively connected with the diode D1 and the diode D2, one path is respectively connected with a diode D3 and a diode D4, the D1 and the D3 are connected and then connected with a resistor R1 and a capacitor C4 in parallel, the D2 and the D4 are connected and then connected with the resistor R1 and the capacitor C4 in parallel, one end of the C4 is connected with a 1200V interface, and the other end is grounded;
the rectifying filter (3) is provided with a field effect tube Q1, a field effect tube Q2, a field effect tube Q3 and a field effect tube Q4, a diode D11 and a capacitor CO1 are connected in parallel between the drain electrode and the source electrode of the Q1, a diode D12 and a capacitor CO2 are connected in parallel between the drain electrode and the source electrode of the Q2, a diode D13 and a capacitor CO3 are connected in parallel between the drain electrode and the source electrode of the Q3, a diode D14 and a capacitor CO4 are connected in parallel between the drain electrode and the source electrode of the Q4, the grid electrode of the Q1 is a Q1 interface, the grid electrode of the Q2 is a Q2 interface, the grid electrode of the Q3 is a Q3 interface, the grid electrode of the Q4 is a Q4 interface, the CO1 and the CO3 are connected in series and then are connected with 0 to 60V interfaces, the CO2 and the CO4 are connected in series and then are grounded, the D11 and the D12 are connected in series and then are connected with an inductor L2, and the D13 and the D14 are connected in series and then are connected with a transformer T2;
the low-voltage energy storage module (1) is a direct current power supply of 30V to 60V.
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