CN112363894A

CN112363894A - Domestic computer fault alarm system

Info

Publication number: CN112363894A
Application number: CN202011238539.2A
Authority: CN
Inventors: 邹武; 程远超; 左瑞; 齐国超; 侯春雷; 周魏; 朱浩
Original assignee: Beijing Institute of Computer Technology and Applications
Current assignee: Beijing Institute of Computer Technology and Applications
Priority date: 2020-11-09
Filing date: 2020-11-09
Publication date: 2021-02-12

Abstract

The invention relates to a domestic computer fault alarm system, which comprises: fault diagnosis and acousto-optic alarm output; the fault diagnosis circuit comprises a CPU, a CPLD or EC, a BIOS, a memory and an acousto-optic alarm circuit comprising an acousto-optic alarm output circuit; the CPU is connected with the CPLD or the EC through the SPI bus and the debugging serial port, the CPLD or the EC is connected with the BIOS through the SPI bus so as to realize the BIOS active measurement in the starting process of the mainboard and realize the diagnosis of the faults of the domestic computer system, the CPLD or the EC receives fault signals sent by the CPU through TTL level debugging serial port signals, the CPLD or the EC has self-defined GPIO control signals and drives the acousto-optic alarm output circuit according to the predefined fault classification; the CPLD or the EC is used for controlling a power-on time sequence and is matched with the power-on time sequence to realize memory training detection diagnosis; and after the memory in the default state passes the training, the external peripheral performs detection diagnosis, and when the initial inspection of the memory and the external peripheral passes, the system starts to perform system guidance to enter the system.

Description

Domestic computer fault alarm system

Technical Field

The invention relates to a fault alarm system of a domestic computer, which can be widely applied to the field of domestic general computers and realizes the functions of BIOS measurement, fault diagnosis, sound-light alarm control and the like.

Background

In the world, information technology revolution is changing day by day, and profound influence is generated on the fields of international politics, economy, culture, military affairs and the like. With the development of domestic information technology and domestic information-oriented industry, domestic computers are an important issue in the field of network information security, and are directly related to national strategic security. The fault alarm control is realized on the domestic computer, the fault reason of the domestic computer can be quickly positioned, and the method has important significance for the development of network information security construction in China.

Disclosure of Invention

The invention relates to a domestic computer fault alarm system which is used for solving the problems in the prior art.

According to the embodiment of the domestic computer fault alarm system, the CPLD or the EC is used for controlling the power-on time sequence and also carrying out detection and diagnosis on the hard disk, the optical drive, the display card and the fan peripheral equipment.

According to the embodiment of the domestic computer fault alarm system, when the peripheral hard disk is detected to be missing or abnormal in work, the BIOS judges the peripheral fault type at first and corresponds to a preset fault type signal, the CPU sends the preset fault signal to the CPLD or the EC through a serial port line signal, and after the CPLD or the EC receives the fault signal, the buzzer and the LED control the acousto-optic alarm output function through the GPIO interface LED out through a logic program in the CPLD.

According to the embodiment of the domestic computer fault alarm system, the output sound-light alarm circuit is an LED indicator lamp and a buzzer.

According to the embodiment of the domestic computer fault alarm system, when the memory has a fault, the LED indicator lamp continuously flickers for 2s, the LED indicator lamp lights for 1s, and the LED indicator lamp lights out at an interval of 3 s; when the hard disk fails, the hard disk continuously flickers for 3s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the display card has a fault, the display card continuously flickers for 4s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the optical drive is in fault, continuously flashing for 5s, lighting for 1s, turning off for 1s, and turning off at an intermediate interval of 3 s; when the fan fails, the flash continues for 6s, 1s lights up, 1s lights out, and the middle interval 3s lights out.

The domestic computer judges the cause of the computer fault by printing information through a CPU serial port without a corresponding fault detection diagnosis mechanism and an alarm measure, is complicated and needs to have professional software and hardware knowledge and judgment capability.

Drawings

FIG. 1 is a schematic block diagram of the hardware components of a fault detection alarm system.

Reference numerals:

1. fault diagnosis circuit

2. Acousto-optic alarm circuit

3.CPU

CPLD or EC

5.BIOS

6. Hard disk

7. Memory device

8. Acousto-optic alarm output circuit

Detailed Description

In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.

The hardware composition block diagram of the domestic computer fault detection alarm system is shown in fig. 1, and the fault detection alarm system is divided into two parts of fault diagnosis and acousto-optic alarm output, wherein a fault diagnosis circuit 1 comprises a CPU 3, a CPLD or EC 4 and a BIOS 5, a memory 6, a hard disk 7 and an acousto-optic alarm circuit 2 comprises an acousto-optic alarm output circuit 8.

The CPU 3 is connected with the CPLD or the EC 4 through the SPI bus and the debugging serial port, and the CPLD or the EC 4 is connected with the BIOS 5 through the SPI bus so as to realize the active measurement of the BIOS 5 in the starting process of the mainboard and realize the diagnosis of the faults of the domestic computer system, the CPLD or the EC 4 receives fault signals sent by the CPU 3 through TTL level debugging serial port signals, the CPLD or the EC 4 has self-defined GPIO control signals, and drives the acousto-optic alarm output circuit according to the predefined fault classification.

The CPLD or the EC 4 is used for controlling the power-on sequence, and a CPU 3, a BIOS 5, the CPLD or the EC 4 are needed to be matched with the functions of realizing memory training detection and diagnosis and detecting and diagnosing peripherals such as a hard disk, an optical drive, a display card, a fan and the like; and after the memory in the default state passes the training, externally connecting the peripheral to perform detection diagnosis, and after the initial inspection of the memory and the peripheral passes, starting the system to perform system guidance by the system and finally entering the system.

Further, when detecting that the peripheral hard disk is missing or works abnormally, the BIOS 5 first determines the peripheral fault type, and then corresponds to a predefined fault type signal, at this time, the CPU 3 sends the predefined fault signal to the CPLD or EC 4 through a serial line signal, and after receiving the fault signal, the CPLD or EC 4 designs the logic program inside the CPLD, and then can realize the sound and light alarm output functions of buzzer, LED control, and the like through the lead-out GPIO interface.

Preferably, the output audible and visual alarm circuit can be an LED indicator light and a buzzer, taking the LED indicator light as an example for alarming, when the memory has a fault, the circuit continuously flickers for 2s, lights for 1s, and lights out at an intermediate interval of 3 s; when the hard disk fails, the hard disk continuously flickers for 3s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the display card has a fault, the display card continuously flickers for 4s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the optical drive is in fault, continuously flashing for 5s, lighting for 1s, turning off for 1s, and turning off at an intermediate interval of 3 s; when the fan fails, the fan continuously flickers for 6s, lights for 1s, lights out for 1s, and lights out for 3s at a middle interval; through the prescribed description, when the domestic computer is in failure, the failure point can be immediately positioned and maintained and processed. The buzzer outputs alarm embodiments similarly, and the number of times of alarm sound of the buzzer is used for positioning the fault reason and the problem.

The CPU on the main board of the domestic computer is connected with the CPLD or EC chip through a standard SPI bus signal and a serial port signal; the SPI signal led out from the BIOS chip and the SPI signal of the CPU are jointly accessed to the CPLD or EC chip on the mainboard, the CPLD or EC is used for controlling the power-on time sequence, the CPU, the BIOS, the CPLD or EC is needed, and the functions of memory training detection and diagnosis and external detection and diagnosis functions of a hard disk, an optical drive, a display card, a fan and the like are realized in a matching way; and after the memory in the default state passes the training, externally connecting the peripheral to perform detection diagnosis, and after the initial inspection of the memory and the peripheral passes, starting the system to perform system guidance by the system and finally entering the system. When detecting that the peripheral hard disk is missing or works abnormally, the BIOS firstly judges the peripheral fault type and then corresponds to a preset fault type signal, at the moment, the CPU sends the preset fault signal to the CPLD or the EC through the TTL serial port signal, and after the CPLD or the EC receives the fault signal, the sound and light alarm output functions of a buzzer, LED control and the like can be realized through the lead-out GPIO interface.

The invention discloses a domestic computer fault detection alarm system, wherein a hardware circuit comprises a CPU, a CPLD or EC and a acousto-optic alarm circuit. The debugging serial port of the CPU is accessed to the CPLD or the EC on the mainboard, the BIOS active measurement in the mainboard starting process can be realized, the diagnosis of the fault of the domestic computer is realized, the CPU judges the fault type and sends the identified fault classification signal to the CPLD or the EC, and the CPLD or the EC drives the acousto-optic alarm output circuit to give an alarm.

The hardware circuit of the fault detection alarm system mainly comprises a CPU, a level conversion chip, a CPLD or EC chip and the like, has standard serial port signals and self-defined GPIO control signals, and is respectively used for realizing fault diagnosis and related fault alarm functions.

The invention realizes the internal memory training fault diagnosis of the domestic computer and the self-checking and fault diagnosis of the hardware peripheral from the software and hardware level, has the fault reason of the positioning body through the alarm information of the acousto-optic alarm output circuit, and is suitable for quick positioning and maintenance under the condition of computer system faults.

In conclusion, the invention can realize the fault detection and diagnosis and the sound-light alarm of the domestic computer, is convenient for the timely maintenance and treatment of computer faults, has good utilization value for the problem that the current domestic computer usually adopts serial port printing information to position the computer faults, and solves the problem that the faults can be judged by means of special tools with higher computer professional level.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims

1. A home-made computer malfunction alert system, comprising: fault diagnosis and acousto-optic alarm output;

the fault diagnosis circuit comprises a CPU, a CPLD or EC, a BIOS, a memory and an acousto-optic alarm circuit comprising an acousto-optic alarm output circuit;

the CPU is connected with the CPLD or the EC through the SPI bus and the debugging serial port, the CPLD or the EC is connected with the BIOS through the SPI bus so as to realize the BIOS active measurement in the starting process of the mainboard and realize the diagnosis of the faults of the domestic computer system, the CPLD or the EC receives fault signals sent by the CPU through TTL level debugging serial port signals, the CPLD or the EC has self-defined GPIO control signals and drives the acousto-optic alarm output circuit according to the predefined fault classification;

the CPLD or the EC is used for controlling a power-on time sequence and is matched with the power-on time sequence to realize memory training detection diagnosis; and after the memory in the default state passes the training, the external peripheral performs detection diagnosis, and when the initial inspection of the memory and the external peripheral passes, the system starts to perform system guidance to enter the system.

2. A domestic computer fault alarm system as claimed in claim 1, wherein the CPLD or EC is used to control the power-on sequence and also to perform detection and diagnosis of the hard disk, optical drive, video card and fan peripherals.

3. A domestic computer fault alarm system as claimed in claim 1, wherein when detecting that the peripheral hard disk is missing or works abnormally, the BIOS first determines the peripheral fault type, and corresponds to a predefined fault type signal, the CPU sends the predefined fault signal to the CPLD or EC through a serial port line signal, and after the CPLD or EC receives the fault signal, the buzzer and LED control the sound and light alarm output function through the GPIO interface by the logic program inside the CPLD.

4. The domestic computer fault alarm system of claim 1, wherein the output audible and visual alarm circuit is an LED indicator light and a buzzer.

5. A domestic computer fault alarm system as claimed in claim 4, wherein when the memory fault occurs, the LED indicator lamp continuously flashes for 2s, 1s lights, and 3s lights at an intermediate interval; when the hard disk fails, the hard disk continuously flickers for 3s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the display card has a fault, the display card continuously flickers for 4s, lights for 1s, lights out for 1s, and lights out at an intermediate interval of 3 s; when the optical drive is in fault, continuously flashing for 5s, lighting for 1s, turning off for 1s, and turning off at an intermediate interval of 3 s; when the fan fails, the flash continues for 6s, 1s lights up, 1s lights out, and the middle interval 3s lights out.