TW202018507A - A host boot detection method and its system - Google Patents

Abstract

A host boot detection system, is electrically connected to a monitoring unit and is adapted to detect a power management module included in a host, and includes a first logic component, a second logic component, and a status display component. The first logic component transmits a power supply command set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply command set. The first logic component generates a detection data according to the power supply command set and the set of power supply status signals. The second logic component generates and outputs a status information to the status display component based on the detection data. The monitoring unit transmits a data request to the second logic component, so that the second logic component converts the detection data into a string information and transmits the string information to the monitoring unit in response to the data request.

Description

Detection method and system of host computer booting

The invention relates to a detection method and system, in particular to a host startup detection method and system that achieves automatic detection during the startup process.

In the prior art, during the startup process of a host, a complex programmable logic device (CPLD) will manage the startup timing of multiple power components in the power module of the host according to a predetermined power supply sequence.

However, the CPLD operates like a black box. When the host cannot be successfully turned on, the inspector simply cannot know which power supply component could not be successfully activated in the boot sequence through the CPLD. The inspector can only check and measure one by one Only the operation of each power component can know which power component has a problem. Therefore, it takes a lot of time to debug. In view of this, it is necessary to find a solution to improve the above problems and expedite the elimination of problems.

Therefore, an object of the present invention is to provide a host boot detection method that automatically detects the power management module of a host during the boot process of the host.

Therefore, the host boot detection method of the present invention is suitable for detecting a power management module included in a host, and is implemented by a host boot detection system including a detection unit electrically connected to a monitoring unit, and A first logic element included in the host and electrically connecting the detection unit and the power management module, the detection unit includes a second logic element and a status display element electrically connected to the second logic element, and the host is powered on for detection The method includes the following steps:

(A) The first logic element transmits a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set and transmits it to the first logic element;

(B) When the first logic element receives the set of power supply status signals, the first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals, and transmits it to the second logic element;

(C) the second logic element generates and outputs a status information to the status display element based on the detection data; and

(D) When the second logic element receives a data request from the monitoring unit, the second logic element converts the detection data into a string of information and sends it to the monitoring unit.

Therefore, another object of the present invention is to provide a host boot detection system that automatically detects the power management module of a host during the boot process of the host.

Therefore, the host boot detection system of the present invention is suitable for detecting a power management module included in a host, and includes a first logic element, a detection unit and a monitoring unit.

The first logic element is included in the host and electrically connected to the power management module, and transmits a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set And the first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals.

The detection unit is electrically connected to the first logic element, and has a second logic element and a status display element electrically connected to the second logic element. The second logic element generates and outputs a state information based on the detection data Status display element.

The monitoring unit is electrically connected to the detection unit, and the monitoring unit sends a data request to the second logic element, so that the second logic element converts the detection data into a string of information in response to the data request and sends it to the monitoring unit.

The effect of the present invention is that: the first logic element automatically collects the power supply status signals of the power supply elements, and converts the signals into the detection data to provide the status display element with real-time display of the current host during the boot process The power supply components have been activated, which is convenient for the testing personnel to find out the problems of the power supply sequence of the power supply components; in addition, when an abnormality is detected, the testing personnel can view further information through the monitoring unit for subsequent debugging .

Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same numbers.

Referring to FIG. 1, an embodiment of the host boot detection method of the present invention is suitable for detecting a power management module 11 and a module to be monitored 12 included in a host 1, and is implemented by a host boot detection system. The host power-on detection system is electrically connected to a monitoring unit 2, the power management module 11 and the to-be-monitored module 12, and includes a detection unit 14 electrically connected to the monitoring unit 2, and a power unit included in the host 1 and electrically The first logic element 13 of the detection unit 14, the power management module 11 and the module to be monitored 12 is connected. In this embodiment, the implementation of the detection unit 14 may be a test circuit board directly inserted on the host 1, or may be a test circuit board electrically connected to the host 1 via a connecting line, and the first A logic element 13 is, for example, a complex programmable logic device (Complex Programmable Logic Device, CPLD for short), but it is not limited thereto.

The power management module 11 includes a plurality of power components 111, 112, 113, 114, and is coupled to a power supply (not shown), and the module to be monitored 12 includes a plurality of components under test 121, 122, 123 . In this embodiment, the first logic element 13 can trigger the power supply to supply power so that the power supply directly or indirectly supplies power to each power element 111/112/113/114, and each power element 111 /112/113/114 is Power Management IC (PMIC). The implementation of these power management chips can be transformers or power converters, but not limited to this. Each power element 111/112/113 /114 can also be a power management unit (Power Management Unit, PMU for short); wherein, the enable pins in the power elements 111, 112, 113, and 114 are different from the general type of the first logic element 13, respectively. The output pins of the General-Purpose Input/Output (hereinafter referred to as GPIO) are electrically connected. The power good pins of the power supply elements 111, 112, 113, and 114 are different from those of the first logic element 13, respectively. GPIO input pins are electrically connected; each power element 111/112/113/114 can receive power directly or indirectly from the power supply, respectively, and can be activated according to a first predetermined sequence during the booting process of the host 1 , And after they are all started normally, the power supply receives power and converts the received power into power (for example, 3.3V, 5V, 12V and 24V, etc.) to provide power for the host 1 to operate ; The waiting test elements 121, 122, 123 are used during the booting of the host 1, after the power supply elements 111, 112, 113, 114 are normally started (that is, normal power supply), according to a second predetermined order Perform initialization and send a set of initialization status signals indicating its initialization status to the first logic element 13, the waiting elements 121, 122, and 123 can be, for example, Baseboard Management Controller (BMC) , Central Processor Unit (CPU) and Platform Controller Hub (PCH), but not limited to this.

The detection unit 14 includes a second logic element 141 and a status display element 142 electrically connected to the second logic element 141. In this embodiment, the second logic element 141 can be a CPLD, and the first logic element 13 and the second logic element 141 can communicate through a GPIO connector and the transmission method is serial transmission, but not This limit.

The monitoring unit 2 includes a control element 21 and a monitoring element 22. In this embodiment, the monitoring unit 2 is, for example, a computer, but not limited to this.

Referring to FIGS. 1 and 2, the following describes in detail the steps of the detection method of the host 1 during the booting process of the host 1 according to the present invention, and uses the first power element 111 with a power supply of 3.3V, 5V, 12V and 24V respectively , The second power element 112, the third power element 113 and the fourth power element 114, and the first element under test 121, the second element under test 122 and the third element under test 123 are BMC, CPU and PCH respectively as an example Description, but not limited to this.

First, in step 30, the first logic element 13 transmits a power supply instruction set to the power management module 11. In this embodiment, the first logic element 13 (in this embodiment, taking CPLD as an example) uses the power supply instruction set to trigger the power supply to supply power, wherein the power supply instruction set has multiple instructions, each instruction Corresponding to a one-bit logic value, the commands are the GPIO output pins of the first logic element 13 electrically connected to the enable pins of the power elements 111, 112, 113, 114 in the first logic element 13 Generated to control the voltage level of the enable pins of the power supply elements 111, 112, 113, 114 from "low" to "high"; it is worth mentioning that at the beginning, when the first logic A GPIO output pin electrically connected to the enable pin of the first power element 111 (hereinafter referred to as the EN pin) in the element 13 controls the voltage level switching of the EN pin of the first power element 111 by sending a command When it reaches "high" (that is, a signal with a logic level of 1), at this moment, the other GPIO output pins of the first logic element 13 that are electrically connected to the EN pins of the power elements 112, 113, and 114 are transmitted correspondingly 'S command keeps the voltage level of the EN pins of the power supply elements 112, 113, 114 at "low" (logic level is 0) until a GPIO input pin of the first logic element 13 After receiving the power good signal from the power good pin of the first power element 111 (hereinafter referred to as the PG pin), it is determined that the voltage level of the PG pin of the first power element 111 has been switched to "High" (logic level is 1), the first logic element 13 then changes the bit logic corresponding to the command transmitted by another GPIO output pin electrically connected to the EN pin of the second power element 112 Value to control the voltage level of the EN pin of the second power element 112 to switch to "high". At this time, the first logic element 13 continues to transmit the voltage level of the EN pin of the first power element 111 The command maintained in the "high" state is to the EN pin of the first power element 111; that is to say, the power elements 111, 112, 113, 114 are in accordance with (power element 111→ Power element 112→Power element 113→Power element 114) This first predetermined sequence is activated. When the first logic element 13 controls one of the power elements 111, 112, 113, 114 to activate, the first The power supply command transmitted from the logic element 13 to the power management module 11 corresponds to the power element 111, 112, 113, 114. The command of the power element 111, 112, 113, 114 is an enable command, and is represented by "1"; when the first logic When the component 13 controls one of the power components 111, 112, 113, 114 not to start, the first logic component 13 transmits the power supply command to the power management module 11 The commands that collectively correspond to the power elements 111, 112, 113, and 114 are disable commands and are represented by "0". For example, if the power supply instruction set is 1000, it means that the first logic element 13 controls the first power element 111 to start; if the power supply instruction set is 1100, it means that the first logic element 13 controls the first power supply The element 111 starts with the second power element 112; if the power supply instruction set is 1110, it means that the first logic element 13 controls the first power element 111, the second power element 112, and the third power element 113 to Start; if the power supply instruction set is 1111, it means that the first logic element 13 controls the first power element 111, the second power element 112, the third power element 113, and the fourth power element 114 to start.

In step 31, the first logic element 13 receives a set of power status signals generated by the power management module 11 in response to the power command set. It is worth mentioning that when the power supply element 111/112/113/114 is successfully activated in response to the instruction of the first logic element 13, the power supply status signal responded by the power supply element 111/112/113/114 is "1" ; When the power element 111/112/113/114 fails and cannot be successfully activated in response to the instruction of the first logic element 13, or has not been activated, the power status signal responded to by the power element 111/112/113/114 is "0". For example, if the set of power supply status signals is 1000, it means that the first power supply element 111 is activated by the instruction of the power supply instruction set; if the power supply instruction set is 1100, it means that the first power supply element 111 and the second power supply The element 112 is activated by the instruction of the power supply instruction set; if the instruction set of the power supply is 1110, it means that the first power element 111, the second power element 112 and the third power element 113 are all instructed by the power instruction set Start; if the power supply instruction set is 1111, it means that the first power element 111, the second power element 112, the third power element 113, and the fourth power element 114 are all activated by the instruction of the power supply instruction set.

In step 32, the first logic element 13 receives the initialization state signal indicating the initialization state of the group transmitted by the module to be monitored 12. It is worth mentioning that the execution sequence of step 31 and step 32 can also be executed simultaneously. In addition, when the device under test 121/122/123 is successfully initialized, the initialization status signal transmitted by the device under test 121/122/123 is "1"; when the device under test 121/122/123 fails and cannot be initialized successfully , Or the initialization status signal sent by the device under test 121/122/123 is "0" when initialization is not yet performed. If the bits of the group of initialization status signals are 100, it means that the first device under test 121 has been initialized, and the second device under test 122 and the third device under test 123 have not been initialized; if the group of initialization states If the bits of the signal are 110, it means that the first device under test 121 and the second device under test 122 have been initialized, and the third device under test 123 has not been initialized; if the bits of the set of initialization status signals If the element is 010, it means that the first element under test 121 has been successfully initialized, an abnormality occurs, the second element under test 122 has been initialized, and the third element under test 123 has not been initialized, and so on, so it will not be repeated here.

In step 33, after the first logic element 13 receives the set of power supply status signals from the power management module 11 and the set of initialization status signals from the to-be-monitored module 12 indicating its initial status, the The first logic element 13 generates a detection data according to the power supply instruction set, the set of power supply status signals and the set of initialization status signals, and transmits it to the second logic element 141.

Next, in step 34, after the second logic element 141 receives the detection data, the second logic element 141 generates and outputs state information to the state display element 142 according to the detection data. In this embodiment, the status display element 142 is a seven-segment display; wherein, the status information indicates the real-time startup status of the power supply elements 111, 112, 113, 114 during the boot process of the host 1 (ie, It has successfully booted up to the start sequence code or component code corresponding to the number of power components in the first predetermined sequence) and the instantaneous initialization status of the waiting test elements 121, 122, 123 (that is, it can be successfully initialized to the current (Indicated by the initial sequence code or component code corresponding to the several components to be tested in the second predetermined sequence) For example, since the power elements 111, 112, 113, 114 are activated according to the first predetermined sequence during the boot process, and the waiting elements 121, 122, 123 are located in the power elements 111, 112, After both 113 and 114 are normally started (that is, normal power supply), they will be initialized according to the second predetermined order. Suppose that the first logic element 13 has now issued the power supply instruction set of 1110, but the power element 113 cannot be used due to an abnormal Normal start, the detection data is 11101100000, the first 4 bits are the power supply instruction set 1110, and the 5th to 8th bits are the power supply status signals of the power supply elements 111, 112, 113, 114, The set of power supply status signals indicates that the power element 111 has been activated, the power element 112 has been activated, the power element 113 has not been activated, the power element 114 has not been activated, and the last three bits are the waiting elements 121, 122, The initialization state signal of 123 indicates that the set of initialization state signals indicates that the device under test 121 is not initialized, the device under test 122 is not initialized, and the device under test 123 is not initialized. Corresponding to the detection data 11101100000, the second logic element 141 will output the unique state information corresponding to the detection data 11101100000. With the state information output by the second logic element 141, the tester can infer based on the unique state information The power supply instruction set 1110 instructs the power supply element 113 to start, but the power supply element 113 has not been started. Therefore, the power supply element 113 may be faulty and needs to be repaired.

In step 35, according to the power supply instruction set and the set of power supply status signals, the first logic element 13 determines whether the power supply element of the power management module 11 that has been activated by the power supply instruction set has been activated. If the determination result is positive, the flow proceeds to step 36. Otherwise, the flow proceeds to step 37.

In this embodiment, since the set of power state signals has multiple bits to indicate whether the corresponding power elements 111, 112, 113, 114 are activated; suppose that if the power instruction set is 1000, then the The first logic element 13 can determine whether the first power element 111 has been activated according to the first bit of the group of power status signals; if the power instruction set is 1100, the first logic element 13 can The first and second bits of the power state signal determine whether the first power element 111 and the second power element 112 have been activated; if the power instruction set is 1110, the first logic element 13 can The first to third bits of the group power supply status signal determine whether the first power element 111, the second power element 112, and the third power element 113 have been activated; if the power instruction set is 1111, the first A logic element 13 can determine whether the first power element 111, the second power element 112, the third power element 113, and the fourth power element 114 have been activated according to the first to fourth bits of the set of power supply status signals . For example, if the power supply instruction set is 1000 and the group of power supply status signals is 1000, it means that the first power element 111 has been activated; if the power supply instruction set is 1100, and the first of the group power supply status signals If the bit is 1 000, it means that the first power element 111 has been activated, and the second power element 112 is abnormal; if the power supply instruction set is 1100, and the first bit of the power supply status signal is 0100, then It means that the first power element 111 has been activated in a first power-on sequence procedure for activating the first power element 111 during the startup process according to the first predetermined sequence, but when the second power element 111 has been activated In a second power-on sequence procedure of the power supply element 112, the first power supply element 111 is abnormal, and the second power supply element 112 has been activated, and so on, which will not be repeated here.

In addition, when the first logic element 13 determines that each power element 111/112/113/114 activated by the power supply instruction set is activated, the value of each bit in the power supply instruction set and the group of power supply status signals The corresponding bit values of will be the same.

Next, in step 36, the first logic element 13 determines whether all the power elements 111, 112, 113, 114 of the power management module 11 are activated. If the result of the determination is yes, the flow proceeds to step 37; if not, it proceeds to step 38.

In step 37, the first logic element maintains the power supply instruction set when step 31 was executed last time, and returns to step 31.

In step 38, the first logic element 13 updates the power supply instruction set according to the first predetermined order so that the updated power supply instruction set indicates the next power supply element in the power management module 11 that meets the first predetermined order Start and return to step 31. In this embodiment, assuming that the power supply instruction set is 1000, the updated power supply instruction set is 1100, and the next power supply element of the first power supply element 111 that is activated by the power supply instruction set is 1000 is为此第一动力设备112。 The second power element 112.

In addition, when a tester wants to further check the test results when the status information displayed on the status display element 142 indicates abnormality, the monitoring unit 2 can be used after the time for the normal power-on procedure of the host 1 to boot up. A control element 21 inputs a data request and sends it to the second logic element 141 of the detection unit 14, so that the second logic element 141 responds to the data request and converts the detection data into a string of information and sends it to This is displayed in the monitoring element 22 of the monitoring unit 2. In the preferred embodiment, the pen string information indicates the power supply state of each power element 111/112/113/114 and the initialization state of each device under test. It is worth mentioning that the inspector can also use the control element 21 to further store the pen string information into a text file for subsequent data analysis and use, and accordingly improve the design defects of the host 1.

In summary, according to the present invention, the first logic element 13 automatically collects the power supply status signals of the power supply elements 111, 112, 113, 114 and the initialization status signals of the waiting test elements 121, 122, 123, and stores the After the signal is converted into the detection data and provided to the status display element 142, the current number of power elements of the host 1 during the boot process has been activated, or when the power elements 111, 112, 113, 114 are normally activated, Display the initialization status of the components under test 121, 122, 123, so that the tester can find out the problems of the power-on components 111, 112, 113, 114 in the power-on sequence, or the components under test 121, 122, 123 Which is not successfully initialized; in addition, when an abnormality is detected, the testing personnel can view further information through the monitoring unit 2 to perform subsequent debugging, so the purpose of the invention can indeed be achieved.

However, the above are only examples of the present invention, and the scope of implementation of the present invention cannot be limited by this, any simple equivalent changes and modifications made according to the scope of the patent application of the present invention and the content of the patent specification are still classified as Within the scope of the invention patent.

1: host 11: power management module 111: first power element 112: second power element 113: third power element 114: fourth power element 12: module to be monitored 121: first element to be tested 122: second Element to be tested 123: third element to be tested 13: first logic element 14: detection unit 141: second logic element 142: status display element 2: monitoring unit 21: control element 22: monitoring elements 30 to 38: steps

Other features and functions of the present invention will be clearly presented in the embodiment with reference to the drawings, in which: FIG. 1 is a block diagram illustrating an embodiment of the host boot detection system of the present invention; and FIG. 2 is a The flowchart exemplifies how the host boot detection system of this embodiment executes a boot detection procedure.

30~38: steps

Claims (10)

A host boot detection method, suitable for detecting a power management module included in a host, is implemented by a host boot detection system, the host boot detection system includes a detection unit electrically connected to a monitoring unit, and a The host is electrically connected to the detection unit and the first logic element of the power management module. The detection unit includes a second logic element and a status display element electrically connected to the second logic element. The boot detection method of the host includes the following Steps: (A) The first logic element transmits a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set and transmits it to the first logic element; (B) When the first logic element receives the set of power supply status signals, the first logic element generates a detection data according to the power supply instruction set and the set of power supply status signals, and transmits it to the second logic element; (C ) The second logic element generates and outputs a status information to the status display element according to the detection data; and (D) When the second logic element receives a data request from the monitoring unit, the second logic element will The detection data is converted into a piece of string information and sent to the monitoring unit. The host boot detection method according to claim 1, wherein the power management module has a plurality of power components, and the power components are started according to a first predetermined sequence during the boot process of the host, in step (A) Afterwards, the host power-on detection method further includes the following steps: (E) The first logic element determines that the power supply element of the power management module is activated by the power supply instruction set according to the power supply instruction set and the set of power supply status signals Whether the power supply element has been activated; and (F) when the first logic element determines that all the power elements activated by the power instruction set are not activated, the first logic element maintains the state of the previous step (A) The power supply instruction set, and return to step (A). According to the host power-on detection method of claim 2, after step (E), the host power-on detection method further includes the following steps: (G) when the first logic element determines that the power supply element is activated by the power instruction set When all are activated, the first logic element determines whether all power elements of the power management module are activated; and (H) When the first logic element determines that all power elements of the power management module are not activated At this time, the first logic element updates the power supply instruction set according to the first predetermined order so that the updated power supply instruction set instructs the next power supply element in the power management module that conforms to the first predetermined order to start and returns Step (A). The host boot detection method according to claim 1, wherein the power management module has a plurality of power components, and in step (D), the pen string information indicates the power supply status of each power component. The host boot detection method according to claim 1, is also suitable for detecting a module to be monitored included in the host and electrically connected to the first logic element, the module to be monitored has a plurality of components to be tested, the The test element is used for initialization according to a second predetermined sequence during the booting process of the host, and transmits a set of initialization status signals indicating its initialization status to the first logic element, wherein: In the step (B) , The first logic element not only receives the set of power supply status signals from the power management module, but also receives the set of initialization status signals from the module to be monitored, when the first logic element receives the set When the power supply status signal and the set of initialization status signals are generated, the first logic element generates a detection data according to the power supply instruction set, the set of power supply status signals and the set of initialization status signals, and transmits it to the second logic element. The host boot detection method according to claim 5, wherein in step (D), the pen string information also indicates the initialization state of each device under test. A host power-on detection system is electrically connected to a monitoring unit and is suitable for detecting a power management module included in a host. The host power-on detection system includes: a first logic element included in the host and electrically connected to the power management module Group, and send a power supply instruction set to the power management module, so that the power management module generates a set of power supply status signals in response to the power supply instruction set, and the first logic element according to the power supply instruction set and the set of power supply The status signal generates a detection data; and a detection unit, electrically connected to the first logic element, and having a second logic element and a state display element electrically connected to the second logic element, the second logic element is based on the detection data , Generate and output a status information on the status display element, when the second logic element receives a data request from the monitoring unit, the second logic element converts the detection data into a string of information and sends it to the monitoring unit. The host boot detection system according to claim 7, wherein the power management module has a plurality of power elements, and the pen string information indicates the power supply status of each power element. The host boot detection system according to claim 7, is also suitable for detecting a module to be monitored included in the host and electrically connected to the first logic element, the module to be monitored has a plurality of components to be tested, the The test element is used for initialization according to a second predetermined sequence during the booting process of the host, and transmits a set of initialization status signals indicating the initialization status to the first logic element, wherein the first logic element not only Receiving the group of power supply status signals from the power management module, and also receiving the group of initialization status signals from the module to be monitored, when the first logic element receives the group of power supply status signals and the group of initialization status During the signal, the first logic element generates a detection data according to the power supply instruction set, the set of power supply status signals and the set of initialization status signals, and transmits it to the second logic element. According to the host power-on detection system described in claim 9, the string information also indicates the initialization status of each device under test.

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