CN112289898B - Preparation method of light-emitting diode epitaxial wafer - Google Patents

Preparation method of light-emitting diode epitaxial wafer Download PDF

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CN112289898B
CN112289898B CN202010986441.9A CN202010986441A CN112289898B CN 112289898 B CN112289898 B CN 112289898B CN 202010986441 A CN202010986441 A CN 202010986441A CN 112289898 B CN112289898 B CN 112289898B
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layer
substrate
epitaxial
flow
purge gas
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CN112289898A (en
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从颖
姚振
梅劲
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

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Abstract

The disclosure provides a preparation method of a light-emitting diode epitaxial wafer, and belongs to the technical field of light-emitting diodes. In the epitaxial growth equipment, a substrate placing groove for placing a substrate is positioned on a first surface of a tray, and a heating wire for heating the tray and the substrate is placed on a second surface of the tray. In the process of growing the epitaxial layer of the substrate in the substrate placing groove, the heating wires can continuously heat the tray and the substrate in the substrate placing groove, meanwhile, the purging airflow is continuously applied to the second surface of the tray and the heating wires, the purging airflow can enable the heat of the heating wires to be more uniformly distributed on the tray, and therefore the heat can be more uniformly transferred to the substrate on the tray. The substrate is heated more uniformly, so that epitaxial layers at all positions on the substrate can grow more uniformly, the crystal quality of the obtained epitaxial layers at all positions on the substrate is more uniform, and the light emitting uniformity of the finally obtained micro light emitting diode is higher.

Description

Preparation method of light-emitting diode epitaxial wafer
Technical Field
The disclosure relates to the technical field of light emitting diodes, and particularly relates to a method for preparing a light emitting diode epitaxial wafer.
Background
A light emitting diode is a semiconductor electronic component that can emit light. As a new type of solid-state illumination light source with high efficiency, environmental protection and green, light emitting diodes are rapidly and widely used in the fields such as traffic signal lamps, interior and exterior lamps of automobiles, urban landscape lighting, mobile phone backlight sources, etc., and it is a continuous pursuit of light emitting diodes to improve the light emitting efficiency of chips.
The light emitting diode epitaxial wafer is used for preparing a light emitting diode basic structure. The micro light emitting diode is prepared in the same way as the light emitting diode, but has a smaller size. The micro light emitting diode epitaxial wafer generally comprises a substrate and an epitaxial layer grown on the substrate, wherein the epitaxial layer at least comprises an n-type GaN layer, a GaN/InGaN multi-quantum well layer and a p-type GaN layer which are sequentially laminated on the substrate.
Due to the limitation of the growth technology, the quality of the epitaxial wafer of the micro light emitting diode obtained by the current growth is not uniform enough, and the light emitting uniformity of the micro light emitting diode obtained by the current growth is still to be improved.
Disclosure of Invention
The embodiment of the disclosure provides a preparation method of a light emitting diode epitaxial wafer, which can improve the light emitting uniformity of a miniature light emitting diode. The technical scheme is as follows:
the embodiment of the disclosure provides a preparation method of a light emitting diode epitaxial wafer, which comprises the following steps:
the preparation method of the light-emitting diode epitaxial wafer comprises the following steps:
providing epitaxial growth equipment, wherein the epitaxial growth equipment at least comprises a tray, a reaction cavity and a heating wire, the side wall of the tray is in sealing fit with the inner wall of the reaction cavity and divides the reaction cavity into a first cavity and a second cavity, the tray is provided with a first surface and a second surface which are parallel and opposite to each other, the first surface is positioned in the first cavity and is provided with a plurality of substrate placing grooves, the second surface is connected with the heating wire, the heating wire is positioned in the second cavity, and the second cavity is used for introducing purging airflow;
placing a substrate in the substrate placing groove;
current is introduced into the heating wires to enable the heating wires to generate heat;
applying a purge gas flow into the second chamber such that heat generated by the heating wire is transferred to the entire tray through the purge gas flow;
and introducing reaction gas into the first chamber, and growing an epitaxial layer on the substrate.
Optionally, the flow rate of the purge gas flow is increased with an increase in growth temperature of the epitaxial layer.
Optionally, the growth temperature of the epitaxial layer is increased by 10-20 ℃ every time, and the flow of the purge gas flow is increased by 2-5 sccm.
Optionally, the flow rate of the purge gas flow increases with an increase in the growth rate of the epitaxial layer.
Optionally, the flow of the purge gas is increased by 1.5-3.5 sccm for each increase of the growth rate of the epitaxial layer by 0.5-2 nm/min.
Optionally, the flow rate of the purge gas flow increases with increasing concentration of doping elements in the epitaxial layer.
Optionally, the flow of the purge gas flow is increased by 1-3 sccm when the concentration of the doping element of the epitaxial layer is increased by 2-4 times.
Optionally, the growing an epitaxial layer on the substrate further includes:
sequentially growing an n-type GaN layer, a GaN/InGaN multi-quantum well layer and a p-type GaN layer on the substrate;
the flow of the purging airflow used when the GaN/InGaN multi-quantum well layer grows is smaller than that used when the p-type GaN layer grows, and the flow of the purging airflow used when the p-type GaN layer grows is smaller than that used when the n-type GaN layer grows.
Optionally, the GaN/InGaN multi-quantum well layer includes InGaN well layers and GaN barrier layers stacked alternately, and a flow rate of the purge gas flow used when the InGaN well layers are grown is smaller than a flow rate of the purge gas flow used when the GaN barrier layers are grown.
Optionally, the growing an epitaxial layer on the substrate further includes:
growing an AlGaN electron barrier layer between the n-type GaN layer and the GaN/InGaN multi-quantum well layer, wherein the flow of the purging gas flow used for growing the AlGaN electron barrier layer is smaller than the flow of the purging gas flow used for growing the n-type GaN layer and is larger than the flow of the purging gas flow used for growing the GaN/InGaN multi-quantum well layer,
the flow rate of the purge gas flow used for growing the AlGaN electron blocking layer is larger than that used for growing the p-type GaN layer.
The beneficial effects brought by the technical scheme provided by the embodiment of the disclosure include:
in the epitaxial growth equipment, a substrate placing groove for placing a substrate is positioned on a first surface of a tray, and a heating wire for heating the tray and the substrate is placed on a second surface of the tray. The in-process of the substrate in the substrate standing groove at the growth epitaxial layer, the heater strip can continuously be tray and the substrate heating in the substrate standing groove, continuously apply the purge air current to the second surface of tray and heater strip simultaneously, the air that is heated by the heater strip can be stirred to the purge air current for the heat in the air that is heated is more even, carries thermal air and also transmits the heat to the tray more evenly, also makes the heat can transmit the substrate on the tray more evenly from this. The substrate is heated more uniformly, so that epitaxial layers at all positions on the substrate can grow more uniformly, the crystal quality of the obtained epitaxial layers at all positions on the substrate is more uniform, and the light emitting uniformity of the finally obtained micro light emitting diode is higher.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic view of an epitaxial growth apparatus provided by the present disclosure;
fig. 2 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure;
fig. 4 is a flowchart of another method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
To facilitate understanding of the present disclosure, fig. 1 is provided herein, and fig. 1 is a schematic view of an epitaxial growth apparatus provided in the present disclosure, and referring to fig. 1, the epitaxial growth apparatus includes at least a tray 100, a reaction chamber 200, and a heating wire 300, a sidewall of the tray 100 is in sealing engagement with an inner wall of the reaction chamber 200 and divides the reaction chamber 200 into a first chamber 2001 and a second chamber 2002, the tray 100 is provided with a first surface 1001 and a second surface 1002 which are parallel and opposite to each other, the first surface 1001 of the tray 100 is located in the first chamber 2001, and the first surface 1001 of the tray 100 is provided with a plurality of substrate placing grooves 1003. The heating wire 300 of the epitaxial growth equipment is placed on the second surface 1002 of the tray 100, the heating wire 300 is located in the second chamber 2002, the second chamber 2002 is provided with a plurality of purge gas flow air inlets 400, the plurality of purge gas flow air inlets 400 are all opposite to the second surface 1002 of the tray 100, the projection of the plurality of purge gas flow air inlets 400 on the second surface 1002 of the tray 100 is uniformly distributed on the second surface 1002 of the tray 100, and the purge gas flow can enter the second chamber 2002 from the purge gas flow air inlets 400 to purge the heating wire 300.
Alternatively, the heating wire 300 may be annular and coaxially connected with the tray 100. It is possible to ensure that the tray 100 is stably heated.
It should be noted that the second chamber 2002 may be annular, and a plurality of purge gas outlets 500 may be actually present in the second chamber 2002, and the plurality of purge gas outlets 500 may ensure a stable flow of the purge gas, and the flow direction of the purge gas is shown by the arrows in fig. 1, and flows from the purge gas outlets 500to the second surface 1002 of the tray 100 perpendicularly.
It should be noted that the flow rate of the air flow flowing out of the purge air flow outlet 500 may be equal to the flow rate of the introduced purge air flow, which may not cause a large influence on the introduction and purge of the purge air flow, the purge air flow outlet 500 may be communicated with a drain outlet of the epitaxial growth equipment, and the outflow air may be discharged together with other residual growth residues.
It should be noted that the size of the opening of the purge gas inlet 400 and the size of the opening of the purge gas outlet 500 can be adjusted according to the actual requirement of the epitaxial layer.
Fig. 2 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and referring to fig. 2, the method for manufacturing an led epitaxial wafer includes:
s101: an epitaxial growth apparatus is provided. The epitaxial growth apparatus may be as shown in fig. 1.
S102: and placing the substrate in a substrate placing groove of the epitaxial growth equipment.
S103: and (3) introducing current into the heating wire to enable the heating wire to generate heat.
S104: applying a purge gas flow into the second chamber such that heat generated by the heating wire is transferred to the entire tray by the purge gas flow.
S105: and introducing reaction gas into the first chamber, and growing an epitaxial layer on the substrate.
For example, the purge gas flow direction may be perpendicular to the second surface of the tray.
Alternatively, in step S104, the flow rate of the purge gas flow is increased as the growth temperature of the epitaxial layer is increased.
In the growth process of the epitaxial layer, different growth temperatures are used when epitaxial films of different materials grow so as to meet the growth requirements of the epitaxial films of different materials and ensure the crystal quality of the epitaxial layer. The heat transfer needs time, the higher the growth temperature of the epitaxial layer is, the more different temperature regions are likely to appear on the substrate, and therefore the purging airflow with the larger flow rate needs to be used for purging at the moment, so that the heat can be uniformly distributed more quickly, the temperature of the tray can be more uniform, and the heat transferred to the substrate is more uniform. When the temperature is lower, the speed of epitaxial material lamination is low, the possibility of uneven areas is low, the time for heat generated at low temperature to be uniformly transferred at relatively high temperature is short, and the growth cost of the epitaxial layer can be reduced while the temperature is uniform due to relatively low flow of the purging airflow.
For example, the growth temperature of the epitaxial layer can be increased by 2-5 sccm for every 10-20 ℃ increase.
The stable regulation and control of the purging airflow can be easily realized, and the growth quality of the obtained epitaxial layer is good.
Illustratively, the flow rate of the purge gas flow may increase as the growth rate of the epitaxial layer increases.
When the growth rate of the epitaxial layer is increased, if the temperature at each position on the substrate is not uniform, the thickness accumulation rate of the epitaxial layer at each position on the substrate is also easy to be different, the thickness in a high-temperature area is quickly accumulated, the thickness accumulation in a low-temperature area is slower, and an uneven area is easy to appear on the surface of the epitaxial layer. Therefore, a larger flow rate of the purge gas is required here to reduce the influence of temperature unevenness on the growth rate of the epitaxial layer. The growth rates of all parts of the epitaxial layer on the substrate are consistent, the crystal quality of the obtained epitaxial layer is more even, and the light emitting uniformity of the obtained light emitting diode is higher.
Illustratively, the flow rate of the purge gas can be increased by 1.5-3.5 sccm for every 0.5-2 nm/min increase in the growth rate of the epitaxial layer.
The stable regulation and control of the purging airflow can be easily realized, and the growth quality of the obtained epitaxial layer is good.
Optionally, the flow rate of the purge gas flow increases as the concentration of the doping element in the epitaxial layer increases.
Doping impurities are used as an additionally added element and are easily distributed unevenly during growth, so that the problem of uneven internal quality of an epitaxial film doped with the impurities is easily caused. If the temperature at each position on the superposed substrate is not uniform, the thickness accumulation rate of the epitaxial layers at each position on the superposed substrate is also easy to be different, and the epitaxial layer doped with impurities is easier to have uneven surface. The large-flow purging airflow can enable the temperature distribution on the substrate to be more uniform, so that impurities and epitaxial materials can uniformly grow together, the influence of nonuniform temperature on the growth of the epitaxial film doped with the impurities is eliminated, and the growth quality of the epitaxial layer is ensured.
For example, the flow rate of the purge gas can be increased by 1-3 sccm for every 2-4 times of the doping element increase of the epitaxial layer.
The stable regulation and control of the purging airflow can be easily realized, and the growth quality of the obtained epitaxial layer is good.
Optionally, the temperature of the purge gas stream is 300-600 ℃.
When the temperature of the blowing air flow is within the range, the blowing air flow can be ensured not to cause great influence on the original temperature of the reaction cavity, and the heating wire is ensured to stably heat the tray.
In the epitaxial growth equipment, a substrate placing groove for placing a substrate is positioned on a first surface of a tray, and a heating wire for heating the tray and the substrate is placed on a second surface of the tray. The in-process of the substrate in the substrate standing groove at the growth epitaxial layer, the heater strip can continuously be tray and the substrate heating in the substrate standing groove, continuously apply the purge air current to the second surface of tray and heater strip simultaneously, the air that is heated by the heater strip can be stirred to the purge air current for the heat in the air that is heated is more even, carries thermal air and also transmits the heat to the tray more evenly, also makes the heat can transmit the substrate on the tray more evenly from this. The substrate is heated more uniformly, so that epitaxial layers at all positions on the substrate can grow more uniformly, the crystal quality of the obtained epitaxial layers at all positions on the substrate is more uniform, and the light emitting uniformity of the finally obtained micro light emitting diode is higher.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an led epitaxial wafer after step S103 is performed, and as shown in fig. 3, the led epitaxial wafer at least includes a substrate 1 and an epitaxial layer 2, and the epitaxial layer 2 includes an n-type GaN layer 21, a GaN/InGaN multi-quantum well layer 22, and a p-type GaN layer 23 sequentially stacked on the substrate 1. The GaN/InGaN multi-quantum well layer 22 includes GaN barrier layers 221 and InGaN well layers 222 alternately stacked.
Fig. 4 is a flowchart of another method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 4, the method for manufacturing an led epitaxial wafer includes:
s201: an epitaxial growth apparatus is provided.
S202: and placing the substrate in a substrate placing groove of the epitaxial growth equipment.
Wherein the substrate may be a sapphire substrate. Easy to realize and manufacture.
Optionally, step S202 may further include: and treating the surface of the substrate for growing the epitaxial layer for 5-6 min in a hydrogen atmosphere.
For example, when the substrate is processed for growing the surface of the epitaxial layer, the temperature of the reaction chamber may be 1000-1100 ℃, and the pressure of the reaction chamber may be 200-500 torr.
S203: a GaN buffer layer is grown on the substrate.
Optionally, the flow rate of the purge gas flow during the growth of the GaN buffer layer can be 120-150 sccm.
The temperature and the rotating speed of the GaN buffer layer during growth are low, the possibility of uneven temperature is low, and therefore the purging airflow in the range can be used for purging, and stable growth of the GaN buffer layer can be guaranteed.
Illustratively, the GaN buffer layer may have a thickness of 15-30 nm.
Optionally, when the GaN buffer layer grows, the total volume of the purge gas flow introduced into the second chamber may be 15-18L. The GaN buffer layer with reasonable thickness and good quality can be obtained.
In another implementation manner provided by the present disclosure, when the GaN buffer layer is grown, the total volume of the purge gas flow introduced into the second chamber may also be 15-16L. The cost can be effectively controlled while the GaN buffer layer with reasonable thickness and better quality can be obtained.
For example, the growth temperature of the GaN buffer layer can be 530-560 ℃, and the growth pressure can be controlled at 200-500 torr. The obtained GaN buffer layer has better quality.
S204: and growing an undoped GaN layer on the GaN buffer layer.
Optionally, the flow rate of the purge gas flow during the growth of the undoped GaN layer can be 600-800 sccm.
The non-doped GaN layer is used as a filling layer, the thickness is thick, the growth temperature is high, the purging airflow with large flow in the range is required to be used, the non-doped GaN layer can be ensured to grow stably, the non-doped GaN layer with good quality is obtained, and a good growth foundation is provided for a subsequent epitaxial film.
Optionally, when the undoped GaN layer grows, the total volume of the purge gas flow introduced into the second chamber may be 25 to 30L. The GaN buffer layer with reasonable thickness and good quality can be obtained.
In another implementation manner provided by the present disclosure, when the undoped GaN layer is grown, the total volume of the purge gas flow introduced into the second chamber may also be 25 to 28L. The cost can be effectively controlled while the non-doped GaN layer with reasonable thickness and better quality can be obtained.
Illustratively, the thickness of the undoped GaN layer can be 2-3.5 um.
Illustratively, the growth temperature of the non-doped GaN layer can be 1000-1100 ℃, and the growth pressure is controlled at 200-600 torr. The obtained undoped GaN layer has better quality.
S205: and growing an n-type GaN layer on the undoped GaN layer.
Optionally, the flow rate of the purge gas flow during the growth of the n-type GaN layer can be 450-600 sccm.
The n-type GaN layer is used as a growth foundation, the growth temperature is high, and more n-type doping elements are contained, so that in order to ensure the growth quality of the n-type GaN layer, the purging gas flow with larger flow is required to be used for purging.
Illustratively, when the n-type GaN layer is grown, the total volume of the purge gas flow introduced into the second chamber may be 20-25L. An n-type GaN layer with reasonable thickness and good quality can be obtained.
In another implementation manner provided by the present disclosure, when the n-type GaN layer is grown, the total volume of the purge gas flow introduced into the second chamber may also be 20-23L. The cost can be effectively controlled while the n-type GaN layer with reasonable thickness and better quality can be obtained.
Alternatively, the growth temperature of the n-type GaN layer may be 1000 to 1100 ℃, and the growth pressure of the n-type GaN layer may be 200 to 600 Torr.
Optionally, the thickness of the n-type GaN layer can be 2-3 um.
S206: and growing a GaN/InGaN multi-quantum well layer on the n-type GaN layer.
Optionally, the GaN/InGaN multi-quantum well layer includes InGaN well layers and GaN barrier layers stacked alternately, and a flow rate of purge gas used when the InGaN well layer is grown is smaller than a flow rate of purge gas used when the GaN barrier layers are grown.
The growth thickness and the growth temperature of the GaN barrier layer are both larger than those of the InGaN well layer, so that the GaN barrier layer needs to be blown by blowing air flow with larger flow during growth, the GaN barrier layer is ensured to grow in a more stable temperature environment, and the possibility that the surface of the GaN barrier layer with larger thickness is in an uneven area is reduced.
For example, the flow rate of the purge gas flow during growth of the GaN barrier layer may be 250-450 sccm, and the flow rate of the purge gas flow during growth of the InGaN well layer may be 200-350 sccm.
The purging airflow in the range is adopted for purging, so that the obtained multi-quantum well layer has good quality, and the preparation cost of the multi-quantum well is not too high.
Optionally, when the GaN barrier layer grows, the total volume of the purging airflow introduced into the second chamber can be 18-21L; when the InGaN well layer grows, the total volume of the purging airflow introduced into the second chamber can be 16-20L. The GaN buffer layer with reasonable thickness and good quality can be obtained.
In another implementation manner provided by the present disclosure, the total volume of the purge gas flow introduced into the second chamber may be 18-20L; when the InGaN well layer grows, the total volume of the purging airflow introduced into the second chamber can be 16-18L. The cost can be effectively controlled while the non-doped GaN layer with reasonable thickness and better quality can be obtained.
Optionally, the thickness of the InGaN well layer can be 2-3 nm, and the thickness of the GaN barrier layer can be 9-20 nm.
Optionally, in the GaN/InGaN multi-quantum well layer, the growth temperature of the InGaN well layer and the growth temperature of the InGaN well layer may be 760 to 780 ℃, and the growth temperature of the GaN barrier layer, and the growth temperature of the third GaN barrier layer may be 860 to 890 ℃. The GaN/InGaN multi-quantum well layer grown under the condition has good quality, and the light emitting efficiency of the light emitting diode can be ensured.
S207: and growing an AlGaN electron barrier layer on the GaN/InGaN multi-quantum well layer.
Optionally, the flow rate of the purge gas flow during the growth of the AlGaN electron blocking layer can be 350-500 sccm.
The AlGaN electron blocking layer needs relatively high temperature and high rotating speed for growing, so that high-flow purging airflow is used for ensuring uniform temperature. And Al atoms in the AlGaN electron barrier layer have larger adhesion force during growth, and are easy to accumulate and grow in different areas during growth on the GaN/InGaN multi-quantum well layer, so that a larger flow of purge gas flow in the range is needed, and the influence of temperature unevenness on the growth of the AlGaN electron barrier layer is reduced. And the crystal quality of the finally obtained AlGaN electron blocking layer is improved.
Alternatively, the flow rate of the purge gas used for growing the AlGaN electron blocking layer may be smaller than that used for growing the p-type GaN layer.
The AlGaN electron blocking layer with better quality can be obtained, and the cost required by the growth of the AlGaN electron blocking layer is reduced.
Optionally, when the AlGaN electron blocking layer grows, the total volume of the purge gas flow introduced into the second chamber may be 20 to 23L. The AlGaN electron blocking layer with reasonable thickness and better quality can be obtained.
In another implementation manner provided by the present disclosure, when the AlGaN electron blocking layer is grown, the total volume of the purge gas flow introduced into the second chamber may also be 20 to 22L. The AlGaN electron blocking layer with reasonable thickness and better quality can be obtained, and the cost can be effectively controlled.
Illustratively, in the AlGaN electron blocking layer, the composition range of Al is 0.15-0.25. The effect of blocking electrons is better.
The growth thickness of the AlGaN electron blocking layer can be 30-50 nm.
The growth temperature of the AlGaN electron blocking layer can be 930-970 ℃, and the growth pressure of the AlGaN electron blocking layer can be 100 Torr. The quality of the electron blocking layer grown under the condition is good, and the improvement of the luminous efficiency of the light-emitting diode is facilitated.
S208: and growing a p-type GaN layer on the AlGaN electron blocking layer.
Optionally, the flow rate of the purge gas flow used when the p-type GaN layer is grown may be greater than the flow rate of the purge gas flow used when the GaN/InGaN multi-quantum well layer is grown, and the flow rate of the purge gas flow used when the p-type GaN layer is grown is less than the flow rate of the purge gas flow used when the n-type GaN layer is grown.
The growth of the epitaxial layer is nearly finished when the p-type GaN layer grows, but the temperature of the p-type GaN layer is relatively higher and slightly lower than that of the n-type GaN layer when the p-type GaN layer grows, so that the flow rate of the purge gas flow which is higher than that of the GaN/InGaN multi-quantum well layer and lower than that of the n-type GaN layer can be used. In order to avoid the decomposition of In element at high temperature, the GaN/InGaN multi-quantum well layer is generally grown at a lower temperature and at a relatively slow growth rate, so that the purging is performed by using a smaller flow rate of the purging gas.
Illustratively, the flow rate of the purge gas used in growing the p-type GaN layer may be 300-500.
The flow rate of the purge gas flow used for growing the p-type GaN layer is in the above range, and the p-type GaN layer with good quality can be obtained.
Alternatively, the growth pressure of the p-type GaN layer may be 200 to 600Torr, and the growth temperature of the p-type GaN layer may be 940 to 980 ℃.
Optionally, when the p-type GaN layer is grown, the total volume of the purge gas flow introduced into the second chamber may be 18-22L. The AlGaN electron blocking layer with reasonable thickness and better quality can be obtained.
In another implementation manner provided by the present disclosure, when the AlGaN electron blocking layer is grown, the total volume of the purge gas flow introduced into the second chamber may also be 18 to 21L. The AlGaN electron blocking layer with reasonable thickness and better quality can be obtained, and the cost can be effectively controlled.
It should be noted that, in the method for manufacturing the light emitting diode epitaxial wafer shown in fig. 3, compared with the method for manufacturing the light emitting diode shown in fig. 1, the structure of the epitaxial layer and the flow rate of the purge gas flow used in the growth process of the epitaxial layer are further described, and a more detailed method for growing the light emitting diode epitaxial wafer is provided.
After step S208 is performed, referring to fig. 5, fig. 5 is a schematic structural diagram of another light emitting diode epitaxial wafer according to the embodiment of the present disclosure, and referring to fig. 5, the light emitting diode epitaxial wafer includes a substrate 1 and an epitaxial layer 2, where the epitaxial layer 2 includes a GaN buffer layer 24, an undoped GaN layer 25, an n-type GaN layer 21, a GaN/InGaN multi-quantum well layer 22, an electron blocking layer 26, and a p-type GaN layer 23, which are sequentially stacked on the substrate.
The structure of the light emitting diode epitaxial wafer in fig. 5 is that, compared with the structure of the light emitting diode shown in fig. 3, a GaN buffer layer 24 and a non-doped GaN layer 25 which are sequentially stacked for alleviating lattice mismatch are added between the substrate and the n-type GaN layer 21; an AlGaN electron blocking layer 26 for blocking electron overflow is added between the GaN/InGaN multi-quantum well layer 22 and the p-type GaN layer 23. The crystal quality is better compared with the crystal quality of the epitaxial wafer of the light-emitting diode provided in the figure 3.
In other implementations provided in this common disclosure, other epitaxial thin film structures may be added to the structure of the light emitting diode shown in fig. 3, which is not limited by the present disclosure.
In this embodiment, a Veeco K465i or C4 orrbmosh (Metal Organic Chemical Vapor Deposition) apparatus is used to realize the growth method of the LED. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant.
Although the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure.

Claims (8)

1. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing epitaxial growth equipment, wherein the epitaxial growth equipment at least comprises a tray, a reaction cavity and a heating wire, the side wall of the tray is in sealing fit with the inner wall of the reaction cavity and divides the reaction cavity into a first cavity and a second cavity, the tray is provided with a first surface and a second surface which are parallel and opposite to each other, the first surface is positioned in the first cavity and is provided with a plurality of substrate placing grooves, the second surface is connected with the heating wire, the heating wire is positioned in the second cavity, and the second cavity is used for introducing purging airflow;
placing a substrate in the substrate placing groove;
current is introduced into the heating wires to enable the heating wires to generate heat;
applying a purge gas flow into the second chamber such that heat generated by the heating wire is transferred to the entire tray through the purge gas flow;
and introducing reaction gas into the first chamber, growing an epitaxial layer on the substrate, wherein the flow of the purging gas flow is increased along with the increase of the growth temperature of the epitaxial layer, and the flow of the purging gas flow is increased by 2-5 sccm when the growth temperature of the epitaxial layer is increased by 10-20 ℃.
2. The method of claim 1, wherein the flow rate of the purge gas flow increases as the growth rate of the epitaxial layer increases.
3. The method as set forth in claim 2, wherein the flow rate of the purge gas is increased by 1.5 to 3.5sccm for each 0.5 to 2nm/min increase in the growth rate of the epitaxial layer.
4. The method of claim 1, wherein the flow rate of the purge gas flow increases as the concentration of the dopant element in the epitaxial layer increases.
5. The method as claimed in claim 4, wherein the flow rate of the purge gas is increased by 1 to 3sccm for every 2 to 4 times increase of the concentration of the doping element in the epitaxial layer.
6. The method of claim 1, wherein growing an epitaxial layer on the substrate further comprises:
sequentially growing an n-type GaN layer, a GaN/InGaN multi-quantum well layer and a p-type GaN layer on the substrate;
the flow of the purging airflow used when the GaN/InGaN multi-quantum well layer grows is smaller than that used when the p-type GaN layer grows, and the flow of the purging airflow used when the p-type GaN layer grows is smaller than that used when the n-type GaN layer grows.
7. The preparation method according to claim 6, wherein the GaN/InGaN multi-quantum well layer comprises InGaN well layers and GaN barrier layers which are alternately stacked, and the flow rate of the purge gas flow used when the InGaN well layers are grown is smaller than the flow rate of the purge gas flow used when the GaN barrier layers are grown.
8. The method of claim 6, wherein growing an epitaxial layer on the substrate further comprises:
growing an AlGaN electron barrier layer between the n-type GaN layer and the GaN/InGaN multi-quantum well layer, wherein the flow of the purging gas flow used for growing the AlGaN electron barrier layer is smaller than the flow of the purging gas flow used for growing the n-type GaN layer and is larger than the flow of the purging gas flow used for growing the GaN/InGaN multi-quantum well layer,
the flow rate of the purge gas flow used for growing the AlGaN electron blocking layer is larger than that used for growing the p-type GaN layer.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008311500A (en) * 2007-06-15 2008-12-25 Hitachi Cable Ltd Epitaxial wafer for light emitting element, and its manufacturing method
CN103137444A (en) * 2011-11-29 2013-06-05 上海华虹Nec电子有限公司 Method for improving evenness of thickness of germanium-silicon membrane
CN203760505U (en) * 2014-03-24 2014-08-06 上海卓霖信息科技有限公司 Preparing apparatus for non-polar blue light LED epitaxial wafers for LAO substrates

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002371361A (en) * 2001-06-18 2002-12-26 Japan Pionics Co Ltd Apparatus and method for vapor phase epitaxy

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008311500A (en) * 2007-06-15 2008-12-25 Hitachi Cable Ltd Epitaxial wafer for light emitting element, and its manufacturing method
CN103137444A (en) * 2011-11-29 2013-06-05 上海华虹Nec电子有限公司 Method for improving evenness of thickness of germanium-silicon membrane
CN203760505U (en) * 2014-03-24 2014-08-06 上海卓霖信息科技有限公司 Preparing apparatus for non-polar blue light LED epitaxial wafers for LAO substrates

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