CN112164650A - 一种倒梯型槽刻蚀工艺方法 - Google Patents

一种倒梯型槽刻蚀工艺方法 Download PDF

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CN112164650A
CN112164650A CN202011034226.5A CN202011034226A CN112164650A CN 112164650 A CN112164650 A CN 112164650A CN 202011034226 A CN202011034226 A CN 202011034226A CN 112164650 A CN112164650 A CN 112164650A
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张飞
雷应毅
鲁红玲
杨鹏翮
侯斌
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Xian Microelectronics Technology Institute
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Abstract

本发明公开了一种倒梯型槽刻蚀工艺方法，属于微电子制作工艺领域。一种倒梯型槽刻蚀工艺方法，包括：1)对硅衬底材料进行氧化，形成氧化层，在氧化层上涂布光阻按照设计版图进行光刻；2)在光刻区域采用RIE刻蚀的方法去除氧化层，直至暴露出硅衬底；3)采用感应耦合等离子刻蚀机，对硅衬底进行分步骤刻蚀，采用C4F8和SF6交替刻蚀，刻蚀完成得到具有预设深度的硅槽；之后采用SF6和O2刻蚀的方法对硅槽进行刻蚀，刻蚀完成得到倒梯型硅槽；4)刻蚀完成之后，采用湿法去除光阻和氧化层，得到硅器件。本发明的工艺方法，可以得到不同硅槽深度的倒梯型槽，满足不同的工艺需求。

Description

一种倒梯型槽刻蚀工艺方法
技术领域
本发明属于微电子制作工艺领域，具体为一种倒梯型槽刻蚀工艺方法。
背景技术
目前，干法刻蚀硅衬底材料的硅槽一般采用SF6和氯基组合的刻蚀方法，刻蚀的深度一般较浅在2um以内；然而采用C4F8和SF6交替刻蚀的方法得出的较深的硅槽又不能形成倒梯型槽的形貌，不能满足实际的工艺需求。
发明内容
本发明的目的在于提供一种倒梯型槽刻蚀工艺方法，有效解决目前硅槽刻蚀中倒梯型形貌形成的问题。
为达到上述目的，本发明采用以下技术方案予以实现：
一种倒梯型槽刻蚀工艺方法，包括以下步骤：
与现有技术相比，本发明具有以下有益效果：
一种倒梯型槽刻蚀工艺方法，包括以下步骤：
1)对硅衬底材料进行氧化，形成氧化层，在氧化层上涂布光阻按照设计版图进行光刻；
2)在光刻区域采用RIE刻蚀的方法去除氧化层，直至暴露出硅衬底；
3)采用感应耦合等离子刻蚀机，对硅衬底进行分步骤刻蚀，采用C4F8和SF6交替刻蚀，刻蚀完成得到具有预设深度的硅槽；
3)采用感应耦合等离子刻蚀机，对硅衬底进行分步骤刻蚀，采用C4F8和SF6交替刻蚀，刻蚀完成得到具有预设深度的硅槽；
刻蚀条件为：压力为25～40mT，温度为20℃，RF1的功率为2000～2500W，RF2的功率为25W，C4F8的流量为200sccm，SF6的流量为250sccm，两者交替进行，每次刻蚀2.5-4s；
之后采用SF6和O2刻蚀的方法对硅槽进行刻蚀，刻蚀完成得到倒梯型硅槽；
刻蚀条件为：压力为30mT，温度为20℃，SF6的流量为150sccm，O2的流量为80sccm，RF1的功率为1400W，RF2的功率为80W，时间为15s；
4)刻蚀完成之后，采用湿法去除光阻和氧化层，得到硅器件。
进一步的，所述倒梯型硅槽的顶部尺寸大于底部尺寸。
进一步的，步骤1)中氧化层厚度为100～600nm。
进一步的，步骤4)中湿法去除光阻操作为：
在浓H2SO6：H2O2体积比为3：1的混合液中，混合液温度为145℃，浸泡10min。
进一步的，步骤4)中湿法去除氧化层的操作为：
在7：1体积比的H2O和HF水溶液中，水溶液温度为42℃，浸泡5min。
与现有技术相比，本发明的有益效果为：
本发明的倒梯型槽刻蚀工艺方法，可以得到不同硅槽深度的倒梯型槽，满足不同的工艺需求；该工艺方法理论简单易于理解，不同的工艺技术人员可以根据不同的设备及工艺条件进行调整，遵循此方法均可以得到满足工艺要求的结果，适用范围广泛。
附图说明
图1为本发明所示的一种倒梯型槽刻蚀的流程步骤图；
图2为第一步刻蚀之后的图形；
图3为第二步刻蚀之后的图形。
具体实施方式
为了使本技术领域的人员更好地理解本发明方案，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述；以下实施例仅仅是本发明一部分的实施例，而不是全部的实施例，不用来限制本发明的范围。
参见图1，本发明一种倒梯型槽刻蚀工艺方法包括以下步骤：
1)对硅衬底材料上进行氧化，在硅衬底上形成一层SiO2，在SiO2层上涂布光阻PR，按照设计版图进行光刻；
2)在光刻区域采用干法刻蚀的方法去除氧化层，露出下面的硅衬底；
3)采用感应耦合等离子刻蚀机，对上述2)中裸露出的硅衬底进行两步刻蚀，刻蚀气体包括C4F8、SF6和O2；
4)刻蚀完成之后，采用湿法法去除光阻和氧化层，得到硅器件，所得硅器件具有上述倒梯形的硅槽形貌；
下面结合附图对本发明做进一步详细描述：采用此工艺方法完成了一种倒梯型槽的刻蚀，具体如下：
步骤一.C4F8和SF6刻蚀工艺及结果
本步是刻蚀中的第一步，主要是刻蚀出满足工艺需求的硅槽深度，本发明对不同的深度均可调节；本次试验仅研究硅槽的形貌，试验结果如图2所示，可以看出其结果并不是倒梯形，试验数据见表1：
表1 C4F8和SF6刻蚀参数表
Press(mT) SF<sub>6</sub>(sccm) C<sub>4</sub>F<sub>8</sub>(sccm) RF1(W) RF2(W) Time(s)
40 0 200 2000 25 2.5-4
25 250 0 2500 25 3.7
步骤二.SF6和O2刻蚀工艺及结果
本步是刻蚀中的第二步，主要是刻蚀出满足工艺需求倒梯形硅槽，，试验结果如图3所示，可以看出其结果是倒梯形，试验数据见表2：
表2 SF6和O2刻蚀参数表
Press(mT) SF<sub>6</sub>(sccm) O<sub>2</sub>(sccm) RF1(W) RF2(W) Time(s)
30 150 80 1400 80 15
以上所述仅仅是一种硅槽深度、宽度的试验结果，并未对试验中各种可能的特征要求进行全面的组合；针对具体的设备和工艺要求，工艺技术人员可以作出各种各样的组合，然而这些在理论上均是可行的。
以上内容仅为说明本发明的技术思想，不能以此限定本发明的保护范围，凡是按照本发明提出的技术思想，在技术方案基础上所做的任何改动，均落入本发明权利要求书的保护范围之内。

Claims (5)

1.一种倒梯型槽刻蚀工艺方法，其特征在于，包括以下步骤：
1)对硅衬底材料进行氧化，形成氧化层，在氧化层上涂布光阻按照设计版图进行光刻；
2)在光刻区域采用RIE刻蚀的方法去除氧化层，直至暴露出硅衬底；
3)采用感应耦合等离子刻蚀机，对硅衬底进行分步骤刻蚀，采用C4F8和SF6交替刻蚀，刻蚀完成得到具有预设深度的硅槽；
刻蚀条件为：压力为25～40mT，温度为20℃，RF1的功率为2000～2500W，RF2的功率为25W，C4F8的流量为200sccm，SF6的流量为250sccm，C4F8和SF6交替进行刻蚀，每次刻蚀2.5-4s；
之后采用SF6和O2刻蚀的方法对硅槽进行刻蚀，刻蚀完成得到倒梯型硅槽；
刻蚀条件为：压力为30mT，温度为20℃，SF6的流量为150sccm，O2的流量为80sccm，RF1的功率为1400W，RF2的功率为80W，时间为15s；
4)刻蚀完成之后，采用湿法去除光阻和氧化层，得到硅器件。
2.根据权利要求1所述的一种倒梯型槽刻蚀工艺方法，其特征在于，所述倒梯型硅槽的顶部尺寸大于底部尺寸。
3.根据权利要求1所述的一种倒梯型槽刻蚀工艺方法，其特征在于，步骤1)中氧化层厚度为100～600nm。
4.根据权利要求1所述的倒梯型槽刻蚀工艺方法，其特征在于，步骤4)中湿法去除光阻操作为：
在浓H2SO6：H2O2体积比为3：1的混合液中，混合液温度为145℃，浸泡10min。
5.根据权利要求1所述的倒梯型槽刻蚀工艺方法，其特征在于，步骤4)中湿法去除氧化层的操作为：
在7：1体积比的H2O和HF水溶液中，水溶液温度为42℃，浸泡5min。
CN202011034226.5A 2020-09-27 2020-09-27 一种倒梯型槽刻蚀工艺方法 Pending CN112164650A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113013034A (zh) * 2021-02-07 2021-06-22 西安微电子技术研究所 一种沟槽肖特基二极管及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007110006A (ja) * 2005-10-17 2007-04-26 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
CN104671193A (zh) * 2013-12-03 2015-06-03 北京北方微电子基地设备工艺研究中心有限责任公司 深硅刻蚀方法
CN109326519A (zh) * 2018-09-11 2019-02-12 西安微电子技术研究所 一种倾角硅槽刻蚀工艺

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007110006A (ja) * 2005-10-17 2007-04-26 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
CN104671193A (zh) * 2013-12-03 2015-06-03 北京北方微电子基地设备工艺研究中心有限责任公司 深硅刻蚀方法
CN109326519A (zh) * 2018-09-11 2019-02-12 西安微电子技术研究所 一种倾角硅槽刻蚀工艺

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113013034A (zh) * 2021-02-07 2021-06-22 西安微电子技术研究所 一种沟槽肖特基二极管及其制作方法
CN113013034B (zh) * 2021-02-07 2023-08-15 西安微电子技术研究所 一种沟槽肖特基二极管及其制作方法

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