CN112146771A - Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method - Google Patents

Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method Download PDF

Info

Publication number
CN112146771A
CN112146771A CN202010951513.6A CN202010951513A CN112146771A CN 112146771 A CN112146771 A CN 112146771A CN 202010951513 A CN202010951513 A CN 202010951513A CN 112146771 A CN112146771 A CN 112146771A
Authority
CN
China
Prior art keywords
signal
piezoelectric
chip microcomputer
array
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010951513.6A
Other languages
Chinese (zh)
Inventor
朱程
葛斌
王焕焕
柴文娴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changzhou Yuanjing Electronic Technology Co ltd
Original Assignee
Changzhou Yuanjing Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changzhou Yuanjing Electronic Technology Co ltd filed Critical Changzhou Yuanjing Electronic Technology Co ltd
Priority to CN202010951513.6A priority Critical patent/CN112146771A/en
Publication of CN112146771A publication Critical patent/CN112146771A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/12Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
    • G01J5/14Electrical features thereof
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/12Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
    • G01J2005/123Thermoelectric array

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)

Abstract

The invention relates to a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, and belongs to the technical field of circuit control. A circuit capable of scanning each piezoelectric thermopile signal in an array in sequence, amplifying the signal by no less than 500 times in sequence, and converting the signal into a digital signal for output; the device comprises an array scanning part, an amplifying part and a singlechip A/D conversion control part, wherein the amplified analog signal has low noise, low offset voltage and high amplification factor; the control mode of the single chip microcomputer is simple; converting the analog signal by using at least 12 bits of A/D (analog to digital) with the temperature resolution being more than or equal to 0.1 ℃; the whole circuit has low power loss and small volume and is easy to integrate into mems.

Description

Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method
Technical Field
The invention relates to a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, and belongs to the technical field of circuit control.
Background
At present, in order to construct a temperature measurement piezoelectric thermopile sensor array, the thermopile sensor array needs to integrate a scanning and control circuit, and because the space on a sensor chip is limited, the scanning control circuit with simple logic structure, small volume, easy integration and low power consumption is needed to read and convert signals of each thermopile in the thermopile array.
In view of the above-mentioned drawbacks, the present designer is actively making research and innovation to create a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, so that the piezoelectric thermopile infrared array scanning circuit and the signal reading conversion control method have industrial application value.
Disclosure of Invention
The invention aims to provide a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, relates to a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, and aims to provide a circuit which can be used for scanning signals of each piezoelectric thermopile in an array in sequence, amplifying the signals by not less than 500 times in sequence and converting the signals into digital signals for output. The amplified analog signal has low noise, low offset voltage and high amplification factor. The control mode of the single chip microcomputer is simple. The analog signal is converted by at least 12 bits of A/D with a temperature resolution of 0.1 deg.C or higher. The whole circuit has low power loss and small volume and is easy to integrate into mems.
The invention relates to a piezoelectric thermopile infrared array scanning circuit, which comprises an array scanning part, an amplifying part and a singlechip A/D conversion control part,
the array scanning part comprises small-signal N-MOS source electrodes (labeled Q1-Qn m) connected with the left foot of each array element (labeled Z1-Zn m), AND gates (labeled A1-An m) connected with the grid electrode of each N-MOS, bias voltage Vbias connected with the drain electrode of each N-MOS, one input end of each array transverse AND gate A1-Am is connected with the output end Q of a D trigger Y1, the first input end of each AND gate (Am + 1-Am + m) is connected with the output end Q of the D trigger Y2, and the like until the first input end of each AND gate (An m-m + 1-An m) is connected with the output end Q of the D trigger Yn, the first input ends of each array transverse AND gate A1-Am are connected with the output end Q of the D trigger Y1, one input end of each array transverse AND gate (An + 1-Am + m) is connected with the output end Q of the D trigger Y2, analogizing in sequence until one input end of each of the AND gates An m-m + 1-An m is connected with An output end Q of a D flip-flop Yn, the second input end of each of the array longitudinal AND gates (A1-An m-m +1) is connected with An output end Q of a D flip-flop X1, the second input end of each of the AND gates (A2-An m-m +2) is connected with An output end Q of a D flip-flop X2, analogizing in sequence until the second input end of each of the AND gates (Am-An m) is connected with An output end Q of a D flip-flop Xm, the Q of the D flip-flop X1 is connected with the D of An X2, the Q of An X2 is connected with the D of An X3, the Q of the D flip-flop Y1 is connected with the D of a Y2, the Q of the Y2 is connected with the D of a Y3, and the Q of the Xn-1 is connected with the D end of the Xn-Q of the Xm;
in the amplifying part, the positive input end of an operational amplifier U2 is connected with a resistor R2 and a capacitor C2, the negative input end is connected with resistors R1, R3 and a capacitor C1, the output end of U2 is connected with resistors R3, R4 and a capacitor C1, the resistor R4 is connected with a capacitor C3 and a magnetic bead L1, the left end of the resistor R1 is connected with a capacitor C2 and a bias voltage Vbias, and the left end of the resistor R2 is connected with the right ends of all array elements (Z1-Zn × m);
in the single chip microcomputer A/D conversion control part, an A/D port of the single chip microcomputer is connected with the right end of a magnetic bead L1, an output port O1 of the single chip microcomputer is connected with the D end of a D trigger X1, O2 is connected with CLK of X1, O3 is connected with CLK of Y1, and O4 is connected with the D end of Y1.
Furthermore, the D triggers are cascaded to form a mode of converting serial data into parallel data, and occupation of single chip microcomputer resources is reduced.
Further, the MOS is a small signal MOS with low noise, and can pass through a signal with a high signal-to-noise ratio for a signal output by the piezoelectric thermopile and lower than the uV level.
Further, the operational amplifier U2 has zero temperature drift and low offset voltage, and GBW is greater than or equal to 4 MHz.
Furthermore, the amplifying parts share one operational amplifier circuit, and the operational amplifier amplifies each piezoelectric tiny signal, wherein the amplification factor of the operational amplifier is larger than 500.
Further, the capacitor C2 eliminates common mode interference, and R3 and C1 form low-pass filtering with a cut-off frequency higher than the scanning frequency.
Further, the R4 and C3 constitute a low pass filter with a cut-off frequency higher than the scanning frequency. The magnetic beads filter out high-frequency signals larger than 1M.
Furthermore, the amplification factor is determined by GBW and the scanning frequency, GBW is more than or equal to f A, f is the scanning frequency, and A is the amplification gain.
Furthermore, the single chip microcomputer is connected with other equipment through a communication port of the single chip microcomputer. The single chip microcomputer A/D is digital-to-analog conversion with the bit number more than or equal to 12, so that the infrared temperature measurement resolution is more than 0.1 degrees, and the serial CLK signals with time sequences are output by the O1, the O2, the O3 and the O4 to drive the D trigger.
A piezoelectric thermopile infrared array scanning circuit signal reading conversion control method comprises the following specific control steps:
(1) the single-chip microcomputer O1, O2, O3 and O4 output time sequences in series;
(2) in the first clock cycle, the Q ends of the D flip-flops X1 and Y1 respectively output high levels, so that two input ends of an AND gate A1 are high levels, the AND gate outputs the high levels to the grid of a MOS Q1, Q1 is conducted, a piezoelectric thermopile sensor A1 outputs a signal with very small voltage, the reference voltage of the signal is Vbias under the action of bias voltage Vbias, the signal is input to an operational amplifier circuit, amplified and filtered by an operational amplifier U2 circuit, the amplified signal is output to a single chip microcomputer A/D, and the amplified signal is converted into a digital signal and output to other equipment through the single chip microcomputer;
(3) in the second clock period, the Q end of the D flip-flop X2 outputs a high level respectively, the Q end of the Y1 is still a high level, so that the two input ends of the and gate a2 are high levels, the and gate outputs a high level to the gate of the MOS Q2, the Q2 is turned on, the piezoelectric thermopile sensor a2 outputs a signal with a small voltage, the reference voltage of the signal is Vbia under the action of a bias voltage Vbia, the signal is sent to the input end of the operational amplifier circuit, the amplified signal is sent to the single chip microcomputer a/D through the amplification and filtering of the operational amplifier U2 circuit, the amplified signal is converted into a digital signal, and the digital signal is sent to other devices through the single chip microcomputer;
(4) and repeating the steps until the last array element An m signal of the array is read, and completing the scanning of all array signals in a certain time.
By the scheme, the invention at least has the following advantages:
the invention relates to a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method, in particular to a circuit which can sequentially scan each piezoelectric thermopile signal in an array, sequentially amplify the signal by not less than 500 times and convert the signal into a digital signal for output; the amplified analog signal has low noise, low offset voltage and high amplification factor; the control mode of the single chip microcomputer is simple; converting the analog signal by using at least 12 bits of A/D (analog to digital) with the temperature resolution being more than or equal to 0.1 ℃; the whole circuit has low power loss and small volume and is easy to integrate into mems.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical solutions of the present invention more clearly understood and to implement them in accordance with the contents of the description, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate a certain embodiment of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is an infrared array diagram of a piezoelectric thermopile infrared array scanning circuit of the present invention;
FIG. 2 is a timing diagram of the piezo thermopile infrared array scanning circuit and signal read conversion control method of the present invention;
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
Referring to fig. 1 and 2, a piezoelectric thermopile infrared array scanning circuit and a signal reading conversion control method according to a preferred embodiment of the present invention includes an array scanning portion, an amplifying portion, and a single-chip microcomputer a/D conversion control portion.
The array scanning part comprises small-signal N-MOS source electrodes (labeled Q1-Qn m) connected with the left foot of each array element (labeled Z1-Zn m), AND gates (labeled A1-An m) connected with the grid electrode of each N-MOS, bias voltage Vbias connected with the drain electrode of each N-MOS, one input end of each of array transverse AND gates A1-Am is connected with the output end Q of a D trigger Y1, the first input end of each of AND gates (Am + 1-Am + m) is connected with the output end Q of the D trigger Y2, and the like until the first input end of each of AND gates (An m-m + 1-An m) is connected with the output end Q of the D trigger Yn, the first input end of each of array transverse AND gates A1-Am is connected with the output end Q of the D trigger Y1, one input end of each of Am + 1-Am + m is connected with the output end Q of the D trigger Y2, and the analogy is carried out until one input end of each AND gate An m-m + 1-An m is connected with the output end Q of the D trigger Yn, the second input end of each array longitudinal AND gate (A1-An m-m +1) is connected with the output end Q of the D trigger X1, the second input end of each AND gate (A2-An m-m +2) is connected with the output end Q of the D trigger X2, and the analogy is carried out until the second input end of each AND gate (Am-An m) is connected with the output end Q of the D trigger Xm. Q of the D flip-flop X1 is connected to D of X2, Q of X2 is connected to D of X3 until Q of Xm-1 is connected to D of Xm, Q of the D flip-flop Y1 is connected to D of Y2, Q of Y2 is connected to D of Y3 until Q of Yn-1 is connected to D of Xn. The D triggers are cascaded to form a mode of converting serial data into parallel data, and occupation of single chip microcomputer resources is reduced. MOS is a small signal MOS with low noise, and can pass through signals with high signal-to-noise ratio for signals output by the piezoelectric thermopile and lower than uV level.
In the amplifying part, the positive input end of an operational amplifier U2 is connected with a resistor R2 and a capacitor C2, the negative input end is connected with resistors R1, R3 and a capacitor C1, the output end of U2 is connected with resistors R3, R4 and a capacitor C1, the resistor R4 is connected with a capacitor C3 and a magnetic bead L1, the left end of a resistor R1 is connected with a capacitor C2 and a bias voltage Vbias, and the left end of a resistor R2 is connected with the right ends of all array elements (Z1-Zn × m). The operational amplifier U2 has zero temperature drift and low offset voltage, and GBW is greater than or equal to 4 MHz. And an operational amplifier circuit is shared, and the operational amplifier amplifies each piezoelectric tiny signal, wherein the amplification factor of the operational amplifier is more than 500. The capacitor C2 eliminates common mode interference, and R3 and C1 form low-pass filter with cut-off frequency higher than scanning frequency. R4 and C3 constitute a low pass filter with a cut-off frequency higher than the scan frequency. The magnetic beads filter out high-frequency signals larger than 1M.
The amplification factor is determined by GBW and the scanning frequency, GBW is larger than or equal to f A, f is the scanning frequency, and A is the amplification gain.
And an A/D port of the singlechip is connected with the right end of the magnetic bead L1, an output port O1 of the singlechip is connected with the D end of an X1D trigger, O2 is connected with CLK of X1, O3 is connected with CLK of Y1, and O4 is connected with the D end of Y1. The single chip microcomputer is connected with other equipment through a communication port of the single chip microcomputer. The A/D of the singlechip is more than or equal to 12-bit digital-to-analog conversion, so that the infrared temperature measurement resolution is more than 0.1 degree. The serial CLK signals with timings are output from O1, O2, O3, and O4 to drive the D flip-flops.
The circuit of the invention shares one operational amplifier circuit, so that the complexity, the volume and the power consumption of the circuit can be effectively reduced. Because the output noise is small and the amplification factor is high, a certain temperature resolution can be kept.
The working principle of the invention is as follows:
the single-chip microcomputers O1, O2, O3 and O4 output the time sequence shown in FIG. 2 in series, in the first clock cycle, the Q ends of the D flip-flops X1 and Y1 output high levels respectively, so that two input ends of the AND gate A1 are high levels, the AND gate outputs high levels to the grid of the MOS Q1, the Q1 is conducted, the piezoelectric thermopile sensor A1 outputs a signal with very small voltage, the reference voltage of the signal is Vbias under the action of the bias voltage Vbias, the reference voltage of the signal is Vbias, the signal is input to the operational amplifier circuit, the amplified signal is output to the single-chip microcomputer A/D through the amplification and filtering of the operational amplifier U2 circuit, the amplified signal is converted into a digital signal, and the digital signal is output. In the second clock period, the Q terminal of the D flip-flop X2 outputs a high level respectively, the Q terminal of the Y1 is still at a high level, so that the two input terminals of the and gate a2 are at a high level, the and gate outputs a high level to the gate of the MOS Q2, the Q2 is turned on, the piezoelectric thermopile sensor a2 outputs a signal of a very small voltage, the reference voltage of the signal is Vbia under the action of the bias voltage Vbia, the signal is sent to the input terminal of the operational amplifier circuit, the amplified signal is sent to the single chip microcomputer a/D through the amplification and filtering of the operational amplifier U2 circuit, and the amplified signal is converted into a digital signal and then sent to other devices through the single chip microcomputer. And repeating the steps until the last array element An m signal of the array is read, and completing the scanning of all array signals in a certain time.
The circuit of the invention shares one operational amplifier circuit, so that the complexity, the volume, the power consumption and the complexity of circuit control can be effectively reduced, and the circuit is easy to integrate into the mems. Because the output noise of the operational amplifier circuit is small and the amplification factor is high, a certain temperature resolution can be kept when the A/D is at least 12 bits.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, it should be noted that, for those skilled in the art, many modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1. The utility model provides a piezoelectric thermopile infrared array scanning circuit, includes array scanning part, enlargies part and singlechip AD conversion control part, its characterized in that:
the array scanning part comprises small-signal N-MOS source electrodes (labeled Q1-Qn m) connected with the left foot of each array element (labeled Z1-Zn m), AND gates (labeled A1-An m) connected with the grid electrode of each N-MOS, bias voltage Vbias connected with the drain electrode of each N-MOS, one input end of each array transverse AND gate A1-Am is connected with the output end Q of a D trigger Y1, the first input end of each AND gate (Am + 1-Am + m) is connected with the output end Q of the D trigger Y2, and the like until the first input end of each AND gate (An m-m + 1-An m) is connected with the output end Q of the D trigger Yn, the first input ends of each array transverse AND gate A1-Am are connected with the output end Q of the D trigger Y1, one input end of each array transverse AND gate (An + 1-Am + m) is connected with the output end Q of the D trigger Y2, analogizing in sequence until one input end of each of the AND gates An m-m + 1-An m is connected with An output end Q of a D flip-flop Yn, the second input end of each of the array longitudinal AND gates (A1-An m-m +1) is connected with An output end Q of a D flip-flop X1, the second input end of each of the AND gates (A2-An m-m +2) is connected with An output end Q of a D flip-flop X2, analogizing in sequence until the second input end of each of the AND gates (Am-An m) is connected with An output end Q of a D flip-flop Xm, the Q of the D flip-flop X1 is connected with the D of An X2, the Q of An X2 is connected with the D of An X3, the Q of the D flip-flop Y1 is connected with the D of a Y2, the Q of the Y2 is connected with the D of a Y3, and the Q of the Xn-1 is connected with the D end of the Xn-Q of the Xm;
in the amplifying part, the positive input end of an operational amplifier U2 is connected with a resistor R2 and a capacitor C2, the negative input end is connected with resistors R1, R3 and a capacitor C1, the output end of U2 is connected with resistors R3, R4 and a capacitor C1, the resistor R4 is connected with a capacitor C3 and a magnetic bead L1, the left end of the resistor R1 is connected with a capacitor C2 and a bias voltage Vbias, and the left end of the resistor R2 is connected with the right ends of all array elements (Z1-Zn × m);
in the single chip microcomputer A/D conversion control part, an A/D port of the single chip microcomputer is connected with the right end of a magnetic bead L1, an output port O1 of the single chip microcomputer is connected with the D end of a D trigger X1, O2 is connected with CLK of X1, O3 is connected with CLK of Y1, and O4 is connected with the D end of Y1.
2. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the D triggers are cascaded to form a mode of converting serial data into parallel data, and occupation of single chip microcomputer resources is reduced.
3. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the MOS is a low-noise small signal MOS, and can pass through signals which are output by the piezoelectric thermopile and are lower than uV level signals with high signal-to-noise ratio.
4. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the operational amplifier U2 has zero temperature drift and low offset voltage, and GBW is more than or equal to 4 MHz.
5. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the amplifying parts share one operational amplifier circuit, and the operational amplifier amplifies each piezoelectric tiny signal, and the amplification factor is larger than 500.
6. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the capacitor C2 eliminates common mode interference, and R3 and C1 form low-pass filtering with cut-off frequency higher than scanning frequency.
7. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the R4 and C3 constitute a low pass filter with a cut-off frequency higher than the scan frequency. The magnetic beads filter out high-frequency signals larger than 1M.
8. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the amplification factor is determined by GBW and the scanning frequency, GBW is larger than or equal to f A, f is the scanning frequency, and A is the amplification gain.
9. The piezoelectric thermopile infrared array scanning circuit of claim 1, wherein: the single chip microcomputer is connected with other equipment through a communication port of the single chip microcomputer. The single chip microcomputer A/D is digital-to-analog conversion with the bit number more than or equal to 12, so that the infrared temperature measurement resolution is more than 0.1 degrees, and the serial CLK signals with time sequences are output by the O1, the O2, the O3 and the O4 to drive the D trigger.
10. A piezoelectric thermopile infrared array scanning circuit signal reading conversion control method is characterized by comprising the following specific control steps:
(1) the single-chip microcomputer O1, O2, O3 and O4 output time sequences in series;
(2) in the first clock cycle, the Q ends of the D flip-flops X1 and Y1 respectively output high levels, so that two input ends of an AND gate A1 are high levels, the AND gate outputs the high levels to the grid of a MOS Q1, Q1 is conducted, a piezoelectric thermopile sensor A1 outputs a signal with very small voltage, the reference voltage of the signal is Vbias under the action of bias voltage Vbias, the signal is input to an operational amplifier circuit, amplified and filtered by an operational amplifier U2 circuit, the amplified signal is output to a single chip microcomputer A/D, and the amplified signal is converted into a digital signal and output to other equipment through the single chip microcomputer;
(3) in the second clock period, the Q end of the D flip-flop X2 outputs a high level respectively, the Q end of the Y1 is still a high level, so that the two input ends of the and gate a2 are high levels, the and gate outputs a high level to the gate of the MOS Q2, the Q2 is turned on, the piezoelectric thermopile sensor a2 outputs a signal with a small voltage, the reference voltage of the signal is Vbia under the action of a bias voltage Vbia, the signal is sent to the input end of the operational amplifier circuit, the amplified signal is sent to the single chip microcomputer a/D through the amplification and filtering of the operational amplifier U2 circuit, the amplified signal is converted into a digital signal, and the digital signal is sent to other devices through the single chip microcomputer;
(4) and repeating the steps until the last array element An m signal of the array is read, and completing the scanning of all array signals in a certain time.
CN202010951513.6A 2020-09-11 2020-09-11 Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method Pending CN112146771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010951513.6A CN112146771A (en) 2020-09-11 2020-09-11 Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010951513.6A CN112146771A (en) 2020-09-11 2020-09-11 Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method

Publications (1)

Publication Number Publication Date
CN112146771A true CN112146771A (en) 2020-12-29

Family

ID=73890020

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010951513.6A Pending CN112146771A (en) 2020-09-11 2020-09-11 Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method

Country Status (1)

Country Link
CN (1) CN112146771A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004170375A (en) * 2002-11-22 2004-06-17 Horiba Ltd Thermopile array sensor
CN102589718A (en) * 2012-02-28 2012-07-18 张康 Reading method of silicon substrate focal plane device
CN102840919A (en) * 2012-09-12 2012-12-26 电子科技大学 Parallel-serial conversion circuit for reading circuit of infrared focal plane array detector
US20170023413A1 (en) * 2014-04-22 2017-01-26 Nec Corporation Semiconductor device, infrared imaging device equipped with the semiconductor device, and method for controlling semiconductor device
CN110199181A (en) * 2017-01-18 2019-09-03 海曼传感器有限责任公司 High-resolution thermopile infrared sensor array

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004170375A (en) * 2002-11-22 2004-06-17 Horiba Ltd Thermopile array sensor
CN102589718A (en) * 2012-02-28 2012-07-18 张康 Reading method of silicon substrate focal plane device
CN102840919A (en) * 2012-09-12 2012-12-26 电子科技大学 Parallel-serial conversion circuit for reading circuit of infrared focal plane array detector
US20170023413A1 (en) * 2014-04-22 2017-01-26 Nec Corporation Semiconductor device, infrared imaging device equipped with the semiconductor device, and method for controlling semiconductor device
CN110199181A (en) * 2017-01-18 2019-09-03 海曼传感器有限责任公司 High-resolution thermopile infrared sensor array

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
丁明芳: "电子技术基础 模拟部分 自学与解题指南", 31 August 2004, 合肥工业大学出版社, pages: 94 - 96 *

Similar Documents

Publication Publication Date Title
CN102109360B (en) Signal processing circuit of linear Hall sensor
CN104283558A (en) High-speed comparator direct-current offset digital auxiliary self-calibration system and control method
CN111431532B (en) Integrator with wide output range and high precision
CN102809436B (en) Infrared array focal plane read-out circuit
JP3839027B2 (en) AD converter
CN102545806B (en) Differential amplifier
CN109374144B (en) Temperature sensor capable of outputting PWM signal
CN103905750A (en) Simulation reading preprocessing circuit used for solid-state image sensor
CN111262586A (en) Second-order noise shaping successive approximation analog-to-digital converter
CN104469201A (en) Analog reading preprocessing circuit for CMOS image sensor and control method thereof
CN104243867A (en) CMOS image sensor with high pixel and high frame rate and image collecting method
CN116846391A (en) Low-offset low-power consumption dynamic comparator based on double calibration
CN101806630B (en) Reading circuit based on relaxor ferroelectric monocrystal pyroelectric detector
CN104283566A (en) Comparison circuit for analog-digital converter
CN101789789B (en) Generating circuit from reference voltage
CN102095501B (en) IRFPA (Infrared Focal Plane Array) and read-out circuit thereof
CN112146771A (en) Piezoelectric thermopile infrared array scanning circuit and signal reading conversion control method
CN102971640A (en) Microcomputer for detecting magnetic field, and method for detecting magnetic field
CN104375162A (en) Multi-channel pulse amplitude analyzer for loaded signal conditioning circuit
CN111263090B (en) Reading circuit structure and working time sequence control method thereof
CN202979124U (en) High gain photoelectric detector unit reading circuit having function of correlated double sampling
CN112881775B (en) Low-power-consumption high-resolution capacitance measuring circuit
US8928379B2 (en) Minimal power latch for single-slope ADCs
CN100539427C (en) Circulation flow line type analog digital converter
CN111697962B (en) Analog sampling circuit of ultra-wideband signal and control method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20210317

Address after: 213022 No.11, Qingyang North Road, Tianning District, Changzhou City, Jiangsu Province

Applicant after: CHANGZHOU YUANJING ELECTRONIC TECHNOLOGY CO.,LTD.

Applicant after: BESTAR HOLDING Co.,Ltd.

Address before: 213000 No. 11 Qingyang North Road, Tianning District, Changzhou City, Jiangsu Province

Applicant before: CHANGZHOU YUANJING ELECTRONIC TECHNOLOGY Co.,Ltd.

TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20231115

Address after: 213000 No. 17, beitanghe East Road, Tianning District, Changzhou City, Jiangsu Province

Applicant after: CHANGZHOU YUANJING ELECTRONIC TECHNOLOGY CO.,LTD.

Address before: 213022 No.11, Qingyang North Road, Tianning District, Changzhou City, Jiangsu Province

Applicant before: CHANGZHOU YUANJING ELECTRONIC TECHNOLOGY CO.,LTD.

Applicant before: BESTAR HOLDING Co.,Ltd.

TA01 Transfer of patent application right
CB02 Change of applicant information

Country or region after: China

Address after: 213000 No. 17, beitanghe East Road, Tianning District, Changzhou City, Jiangsu Province

Applicant after: Changzhou Yuanjingmo Microelectronics Co.,Ltd.

Address before: 213000 No. 17, beitanghe East Road, Tianning District, Changzhou City, Jiangsu Province

Applicant before: CHANGZHOU YUANJING ELECTRONIC TECHNOLOGY CO.,LTD.

Country or region before: China

CB02 Change of applicant information