CN112133238B - Drive circuit and electronic device - Google Patents
Drive circuit and electronic device Download PDFInfo
- Publication number
- CN112133238B CN112133238B CN202010979392.6A CN202010979392A CN112133238B CN 112133238 B CN112133238 B CN 112133238B CN 202010979392 A CN202010979392 A CN 202010979392A CN 112133238 B CN112133238 B CN 112133238B
- Authority
- CN
- China
- Prior art keywords
- switch
- field effect
- effect transistor
- circuit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The invention provides a driving circuit and electronic equipment, which ensure the normal control of the driving circuit on a field effect transistor. Drive circuit connects power supply channel, and power supply channel includes power input end, first field effect transistor and the load that connects gradually, and drive circuit includes: the device comprises a control module, a first switch and a selection module; the first end of the first switch is used as the first end of the first switch and is connected with the grid electrode of the first field effect transistor; the output end of the control module is connected with the first end of the first switch, and the control module is used for outputting a first grid control signal so as to control the conduction of the first field effect transistor when the first switch is turned off; the two input ends of the selection module are respectively connected with the power input end and the ground end, the output end of the selection module is connected with the second end of the first switch, and the selection module is used for selecting a signal with lower voltage in signals input by the power input end and the ground end to be output as a second grid control signal so as to control the first field effect transistor to be switched off when the first switch is switched on.
Description
Technical Field
The present invention relates to the field of circuit technologies, and in particular, to a driving circuit and an electronic device.
Background
In an electronic device, a power source may provide power to a load through a power channel. In order to select whether to supply power to the load according to the requirement, a field effect transistor (or a field effect transistor, a power tube, a switch tube, or the like) such as an NMOS (N-Metal-Oxide-Semiconductor) is disposed in the power channel, and when the field effect transistor is turned on, the power is supplied to the load, and when the field effect transistor is turned off, the power is stopped being supplied to the load. On and off of the field effect transistor needs a corresponding driving circuit to control.
In the related driving circuit, when the signal voltage input by the power input end is a positive voltage, the driving circuit can also normally control the on and off of the field effect transistor, and when the signal voltage input by the power input end is a negative voltage, the driving circuit cannot control the on and off of the field effect transistor, so that whether the power supply is supplied to a load cannot be normally selected.
Disclosure of Invention
The invention provides a driving circuit and electronic equipment, which ensure the normal control of the driving circuit on a field effect transistor.
According to a first aspect of the present invention, there is provided a driving circuit, the driving circuit is connected to a power supply channel, the power supply channel includes a power supply input terminal, a first field effect transistor and a load, which are connected in sequence, and the driving circuit includes: the device comprises a control module, a first switch and a selection module;
the first end of the first switch is connected with the grid electrode of the first field effect transistor;
the output end of the control module is connected with the first end of the first switch, and the control module is used for outputting a first grid control signal so as to control the first field effect transistor to be conducted when the first switch is turned off;
the two input ends of the selection module are respectively connected with the power input end and the ground end, the output end of the selection module is connected with the second end of the first switch, and the selection module is used for selecting a signal with lower voltage in signals input by the power input end and the ground end to be output as a second grid control signal so as to control the first field effect transistor to be switched off when the first switch is switched on.
According to an embodiment of the present invention, the driving circuit further includes: a second switch;
the second switch is connected between the output end of the control module and the first end of the first switch.
In accordance with one embodiment of the present invention,
the first end of the first switch is connected with a controlled circuit so as to output logic level signals to the controlled circuit, and the logic level signals comprise logic high level signals;
the first end of the first switch is also connected with a pull-up circuit, and the pull-up circuit is used for outputting a logic high level signal through the first end of the first switch when the first switch and the second switch are both turned off.
In accordance with one embodiment of the present invention,
the first end of the first switch is connected with a reset circuit so as to output a low-level signal to the reset circuit when the first switch is switched on and the second switch is switched off, wherein the low-level signal is used for controlling the reset of the reset circuit.
According to an embodiment of the present invention, the driving circuit further includes: a third switch;
the first end of the third switch is connected with the source electrode of the first field effect transistor, and the second end of the third switch is connected with the first end of the first switch;
the third switch and the first switch can be switched from an off state to an on state when the first field effect transistor is switched from an on state to an off state.
According to an embodiment of the invention, the power channel further comprises a second field effect transistor;
the grid electrode of the second field effect transistor is connected with the grid electrode of the first field effect transistor, the source electrode of the second field effect transistor is connected with the source electrode of the first field effect transistor, and the drain electrode of the second field effect transistor is connected with the power supply input end; the drain electrode of the first field effect transistor is connected with the load.
According to one embodiment of the invention, the control module and the selection module are integrated in the same chip.
According to an embodiment of the present invention, the first fet is an external fet of the chip.
In accordance with one embodiment of the present invention,
the control module is a charge pump;
and two input ends of the control module are respectively connected with the power input end and the source electrode of the first field effect transistor.
According to a second aspect of the present invention, an electronic device is provided, which includes the driving circuit and the power channel described in the foregoing embodiments.
The invention has the following beneficial effects:
in the embodiment of the invention, the driving circuit comprises a control module, a first switch and a selection module, wherein the selection module is arranged in the driving circuit, two input ends of the selection module are respectively connected with a power supply input end and a ground end, and a signal with lower voltage can be selected from signals input by the power supply input end and the ground end to be output as a second grid control signal, so that when the voltage of the power supply input signal input by the power supply input end is negative voltage lower than that of the ground signal, the power supply input signal is selected to be output as the second grid control signal, and when the first switch is switched on, the second grid control signal can control the first field effect transistor to be normally switched off, thereby solving the problem that the driving circuit cannot normally control the first field effect transistor to be switched off under the condition that the voltage of the power supply input signal is negative voltage, so that no matter whether the voltage of the power supply input signal is positive voltage or, the on and off of the first field effect transistor can be normally controlled, so that the on and off of the power supply channel are normally controlled.
The second switch is additionally arranged in the driving circuit and keeps off, so that the control module and the first end of the first switch can be isolated, the pull-up circuit is connected to the first end of the first switch, the first end of the first switch outputs a logic high level signal under the action of the pull-up voltage of the pull-up circuit when the first switch is off, and the first end of the first switch can take the ground signal selected by the selection module as a logic low level signal when the first switch is on, thereby realizing multiplexing of partial circuit structures of the driving circuit.
The third switch is additionally arranged in the driving circuit and is connected between the source electrodes of the first field effect tube and the second field effect tube and the first end of the first switch, so that when the first switch and the third switch are turned off simultaneously, the grid voltages of the first field effect tube and the second field effect tube can be instantly pulled down to the source signal voltage through the third switch, the first field effect tube and the second field effect tube are turned off rapidly, then the grid voltages of the first field effect tube and the second field effect tube are discharged to the ground signal voltage through the first switch, and therefore through the cooperation of the first switch and the third switch, the grid source withstand voltage requirement of the selected field effect tube is lowered, the first field effect tube and the second field effect tube can be turned off rapidly, the cost performance of the driving circuit is higher, and the first switch is not required to be too high.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic circuit diagram of a driving circuit and a power channel according to an embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a driving circuit and a power channel according to another embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a driving circuit according to an embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a driving circuit according to another embodiment of the present invention;
fig. 5 is a schematic circuit diagram of a driving circuit and a power channel according to another embodiment of the invention.
Description of reference numerals:
a drive circuit 1;
a control module 11;
a selection module 12;
a first switch 13;
a second switch 14;
a third switch 15;
a power supply channel 2;
a first field effect transistor 21;
a power input terminal 22;
a load 23;
a second field effect transistor 24;
a power input signal VIN;
a first gate control signal VGate;
a second gate control signal Vmin;
outputting a control signal VC;
a source signal Vsource;
ground terminal GND.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Fig. 1 is a schematic circuit diagram of a driving circuit 1 and a power channel 2 according to an embodiment of the invention. The power channel 2 includes a power input terminal 22, a first field effect transistor 21 and a load 23 connected in sequence.
The power channel 2 can be understood as any circuit configuration capable of supplying power from the power input terminal 22 to the load 23, wherein the first fet 21 can be configured to control the connection/disconnection between the power input terminal 22 and the load 23. Meanwhile, this embodiment does not exclude the solution that the power channel 2 is further provided with at least one device of another switch, a resistor, etc., wherein the switch may be another fet, for example.
The number of power channels 2 in the electronic device may be one, while embodiments in which the number of power channels 2 is more than one are not excluded.
The first field effect transistor 21 may be any field effect transistor.
The load 23 is understood to be any device or collection of devices in an electronic apparatus to be supplied with electric energy, and in a specific implementation, the load 23 may include, for example, a consumer device module and/or an energy storage module. The end of the load 23 remote from the first fet 21 may be directly or indirectly connected to ground.
The power input 22 can be understood as any circuit node capable of supplying power to a load, and the front end of the power input can be connected with an external power supply interface of an electronic device, an energy storage device, and any other device or equipment capable of supplying power to the power input.
In one embodiment, as shown in fig. 1, the driving circuit 1 includes: a control module 11, a first switch 13 and a selection module 12.
A first terminal of the first switch 13 is connected to the gate of the first fet 21. The first switch 13 can be turned on and off by a user control, or can be turned on and off by other circuit modules, such as a current detection module for detecting the power channel 2. Alternatively, the first end of the first switch 13 may be directly used as the output end of the driving circuit 1, or may be connected to another component such as a resistor after the first end of the first switch 13 is connected to the output end of the driving circuit 1.
The output end of the control module 11 is connected to the first end of the first switch 13, and the control module 11 is configured to output a first gate control signal VGate to control the first field effect transistor 21 to be turned on when the first switch 13 is turned off.
The two input ends of the selection module 12 are respectively connected to the power input end 22 and the ground end GND, the output end of the selection module 12 is connected to the second end of the first switch 13, and the selection module 12 is configured to select a signal with a lower voltage from the signals input by the power input end 22 and the ground end GND to be output as a second gate control signal Vmin, so as to control the first fet 21 to be turned off when the first switch 13 is turned on.
The control module 11 may determine and output the first gate control signal VGate based on the power input signal VIN input by the power input terminal 22, where the first gate control signal VGate is a positive voltage signal (i.e., a voltage value higher than a voltage value of the ground signal, and generally a voltage value larger than the source terminal of the first fet 21). The two input terminals of the selection module 12 respectively receive the power input signal VIN input by the power input terminal 22 and the ground signal input by the ground terminal GND, and select a signal with a lower voltage between the power input signal VIN and the ground signal as the second gate control signal Vmin for output.
Under the condition that the voltage of the power input signal VIN is a positive voltage, such as +5V, when the first switch 13 is turned off, the first gate control signal VGate is output to the gate of the first field-effect transistor 21 as the output control signal VC, and since the voltage difference Vgs between the gate and the source is greater than the conduction threshold, the first field-effect transistor 21 is controlled to be on, and at this time, the power channel 2 is on to supply power to the load 23; when the first switch 13 is turned on, the second gate control signal Vmin is inputted to the gate of the first fet 21 as the output control signal VC, and since the second gate control signal Vmin is actually a ground signal inputted from the ground GND at this time, the gate of the first fet 21 is grounded, the first fet 21 is controlled to be turned off, and the power supply channel 2 is turned off at this time, and power supply to the load 23 is stopped.
Under the condition that the voltage of the power supply input signal VIN is a negative voltage such as-5V, when the first switch 13 is turned off, the first gate control signal VGate is output to the gate of the first field-effect transistor 21 as the output control signal VC, and since the voltage difference Vgs between the gate and the source is greater than the conduction threshold, the first field-effect transistor 21 is controlled to be on, and at this time, the power supply channel 2 is on to supply power to the load 23; when the first switch 13 is turned on, the second gate control signal Vmin is inputted to the gate of the first fet 21 as the output control signal VC, and since the second gate control signal Vmin is actually the power input signal VIN inputted from the power input terminal 22 at this time, that is, -5V, the voltage difference between the gate and the source of the first fet 21 satisfies the turn-off condition (the voltage difference is 0), the first fet 21 can still be normally controlled to turn off, and at this time, the power channel 2 is turned off, and the power supply to the load 23 is stopped.
In the above embodiment, if the selection module 12 is not provided, but the second terminal of the first switch 13 is directly grounded, when the voltage of the power input signal VIN is a negative voltage, such as-5V, when the first switch 13 is turned on, the ground signal is input to the gate of the first fet 21 as the output control signal VC, and the ground signal is higher than the source signal Vsource voltage of the first fet 21 at this time, so that the voltage difference between the gate and the source of the first fet 21 cannot satisfy the turn-off condition, and the first fet 21 cannot be normally controlled to turn off. That is, if the selection module 12 is not provided, in the case that the voltage of the power input signal VIN is a negative voltage, the driving circuit 1 cannot normally control the first fet 21 to turn off, so that the power channel 2 from the power input terminal 22 to the load 23 cannot be turned off.
In the embodiment of the present invention, the driving circuit 1 includes a control module 11, a first switch 13 and a selection module 12, wherein, by providing the selection module 12 in the driving circuit 1, two input terminals of the selection module 12 are respectively connected to the power input terminal 22 and the ground terminal GND, a signal with a lower voltage can be selected from the signals input by the power input terminal 22 and the ground terminal GND to be output as the second gate control signal Vmin, so that, when the voltage of the power input signal VIN input by the power input terminal 22 is a negative voltage lower than the voltage of the ground signal, the power input signal VIN is selected to be output as the second gate control signal Vmin, and when the first switch 13 is turned on, the second gate control signal Vmin can control the first fet 21 to be normally turned off, thereby solving the problem that the driving circuit 1 cannot normally control the first fet 21 to be turned off under the condition that the voltage of the power input signal VIN is a negative voltage, therefore, no matter the voltage of the power input signal VIN is a positive voltage or a negative voltage, the first field effect transistor 21 can be normally controlled to be turned on and off, so that the power channel 2 can be normally controlled to be turned on and off.
Fig. 2 is a schematic circuit diagram of a driving circuit 1 and a power channel 2 according to another embodiment of the present invention. In contrast to fig. 1, in fig. 2, the power supply channel 2 further comprises a second fet 24.
In one embodiment, the gate of the second fet 24 is connected to the gate of the first fet 21, the source of the second fet 24 is connected to the source of the first fet 21, and the drain of the second fet 24 is connected to the power input 22; the drain of the first fet 21 is connected to a load 23.
The working principle of fig. 2 is the same as that of fig. 1, and the on and off states of the second fet 24 and the first fet 21 are synchronized.
Specifically, under the condition that the voltage of the power input signal VIN is a positive voltage, such as +5V, when the first switch 13 is turned off, the first gate control signal VGate is output as the output control signal VC to the gates of the first fet 21 and the second fet 24, the sources of the two fets are connected, and the gates are also connected, so that the voltages of the sources are the same, and the voltages of the gates are also the same, because the voltage difference Vgs between the gates and the sources of the two fets is greater than the turn-on threshold, the first fet 21 and the second fet 24 are controlled to be turned on, and at this time, the power channel 2 is turned on to supply power to the load 23; when the first switch 13 is turned on, the second gate control signal Vmin is input to the gates of the first fet 21 and the second fet 24 as the output control signal VC, and since the second gate control signal Vmin is actually a ground signal input from the ground GND terminal at this time, the gates of the first fet 21 and the second fet 24 are grounded, the first fet 21 is controlled to be turned off, and at this time, the power supply channel 2 is turned off, and power supply to the load 23 is stopped.
Under the condition that the voltage of the power supply input signal VIN is negative voltage such as-5V, when the first switch 13 is turned off, the first gate control signal VGate is output to the gates of the first field-effect tube 21 and the second field-effect tube 24 as the output control signal VC, and because the voltage difference Vgs between the gate and the source is greater than the conduction threshold, the first field-effect tube 21 and the second field-effect tube 24 are controlled to be conducted, and at this time, the power supply channel 2 is conducted to supply power to the load 23; when the first switch 13 is turned on, the second gate control signal Vmin is inputted to the gates of the first fet 21 and the second fet 24 as the output control signal VC, and since the second gate control signal Vmin is actually the power input signal VIN inputted from the power input terminal 22 at this time, that is, -5V, the voltage difference between the gates and the sources of the first fet 21 and the second fet 24 satisfies the turn-off condition, the first fet 21 can still be normally controlled to turn off, and at this time, the power channel 2 is turned off to stop supplying power to the load 23.
In one embodiment, the control module 11 is integrated in the same chip as the selection module 12. Optionally, the first switch 13 may also be integrated in the chip, and is not limited specifically. It is understood that other components may be integrated on the chip, and the chip is not limited in particular.
The chip may be referred to as a driving chip or may also be referred to as a control chip, and is used for controlling on and off of the power channel 2, which may be, in one example, controlling on and off of the first fet 21, and may be, in another example, controlling on and off of the first fet 21 and the second fet 24. It will be appreciated that the role of the chip is certainly not limited thereto and may be used for other purposes.
Optionally, the first fet 21 is an external fet of a chip. Optionally, the second fet 24 is also an external fet of the chip. The first end of the first switch 13 may be extended out of the chip as a pin, and may be connected to the gate of the external fet through a lead, so that the fet may not be integrated inside the chip, and certainly, the fet may also be integrated inside the chip as needed.
In one embodiment, the control module 11 is a Charge Pump (Charge Pump). Referring to fig. 1 and 2, two input terminals of the control module 11 are respectively connected to the power input terminal 22 and the source of the first fet 21 (in the case of the power channel 2 provided with the second fet 24, also the source of the second fet 24).
The control module 11 may determine a signal having a higher voltage than the source signal Vsource as the first gate control signal VGate based on the input power input signal VIN and the source signal Vsource.
Fig. 3 shows another drive circuit 1 of an embodiment of the invention. The driving circuit 1 shown in fig. 3 can be understood in conjunction with fig. 1 and 2. The drive circuit 1 in fig. 3 differs from the drive circuit 1 in fig. 1 and 2 in that the drive circuit 1 further comprises a second switch 14.
The second switch 14 is connected between the output of the control module 11 and the first end of the first switch 13. The second switch 14 can be turned on and off by a user, or can be turned on and off by other circuit modules, and can be set as required.
In the case that the second switch 14 is turned on, the operation principle of the driving circuit 1 is completely consistent with that of the previous embodiment, that is, the first fet 21 and the second fet 24 can operate normally, and whether the power channel 2 supplies power to the load 23 can be selected normally, depending on whether the first switch 13 is turned on.
When the second switch 14 is turned off, the first fet 21 and the second fet 24 no longer operate and remain in the off state all the time, and the power supply channel 2 no longer supplies power to the load 23.
In other words, the second switch 14 can be used as a switch for selecting whether to cut off the power supply function of the power supply channel 2, which can broaden other applications of the driving circuit 1. For example, if it is desired to implement other functions by using any module, device, or component in the driving circuit 1, and it is not currently necessary to supply power to the load 23, the second switch 14 may be turned off to avoid the conflict between implementing other functions and charging the load 23.
In some applications, the second switch 14 is controlled to be turned off, and the first terminal of the first switch 13 can be forced to be grounded GND, so as to ensure that the enabled control module 11 (charge pump) does not generate an additional leakage current burden.
In one embodiment, based on fig. 3, the first terminal of the first switch 13 can be used as a logic level output terminal, and is connected to a controlled circuit (not shown in the figure) to output a logic level signal to the controlled circuit, where the logic level signal includes a logic high level signal. The controlled circuit may perform corresponding operations according to the logic level signal, and the specific operation is not limited.
The second switch 14 can be kept off when the first end of the first switch 13 is required to be used as a logic level output end, so that the output end of the control module 11 and the logic level output end can be completely isolated, and even if the control module 11 has output, the output of the logic level output end cannot be influenced.
The first terminal of the first switch 13 is further connected to a pull-up circuit for outputting a logic high level signal through the first terminal of the first switch 13 when the first switch 13 and the second switch 14 are turned off. The level of the logic high signal may be determined according to a logic circuit to which the logic level output terminal needs to be connected, and may be, for example, 1.8V, 3.3V, 5V, and the like, which is not limited specifically.
Specifically, when the first terminal of the first switch 13 is required to be used as the logic level output terminal, the second switch 14 is controlled to be turned off. In the case where the first switch 13 is turned off, the pull-up circuit may output a logic high level signal through the first terminal of the first switch 13; in the case where the first switch 13 is turned on, the voltage of the input signal at the power input terminal 22 is preferably a positive voltage, so that the selection module 12 can select the output of the ground signal with a lower voltage as a logic low level signal, and output the logic low level signal through the first terminal of the first switch 13.
In other words, in this mode, the first switch 13 may act as a switch for switching a logic high-low level signal, while the second switch 14 is always kept off.
When the power channel 2 needs to work normally, the second switch 14 is kept on, and the first switch 13 can be switched on or off according to the power supply requirement; when the power channel 2 does not need to work normally, the second switch 14 is kept off, and the first switch 13 can be switched on or off according to the logic level requirement, so that corresponding logic control is realized.
Generally, in order to normally turn on the first fet 21 and the second fet 24, the voltage of the first gate control signal VGate output by the control module 11 must be greater than the voltage of the source signal Vsource, so if the second switch 14 is not provided, the first gate control signal VGate cannot be isolated, and the required logic control cannot be realized.
In this embodiment, the second switch 14 is additionally disposed in the driving circuit 1, and the second switch 14 is kept turned off, so that the control module 11 and the first end of the first switch 13 can be isolated, and then the pull-up circuit is connected to the first end of the first switch 13, when the first switch 13 is turned off, the first end of the first switch 13 outputs a logic high level signal under the pull-up voltage action of the pull-up circuit, and when the first switch 13 is turned on, the first end of the first switch 13 can use the ground signal selected by the selection module 12 as a logic low level signal, so that multiplexing of a part of circuit structures of the driving circuit 1 is realized, and therefore, products with limited pins designed and produced by the same chip can be applied to various system-level applications, and various products are derived.
In another embodiment, based on fig. 3, the first terminal of the first switch 13 can be used as a reset signal output terminal, and is connected to a reset circuit (not shown). The reset circuit may be, for example, a system reset circuit of the electronic device in which the driving circuit 1 is located, and the reset circuit is controlled to reset when the first end of the first switch 13 outputs a low-level signal.
The second switch 14 can be kept off when the first end of the first switch 13 is used as the reset signal output end, so that the output end of the control module 11 and the reset signal output end can be completely isolated, and even if the control module 11 has output, the output of the logic level output end cannot be influenced.
The first terminal of the first switch 13 is capable of outputting a low-level signal to the reset circuit when the first switch 13 is turned on and the second switch 14 is turned off, so as to control the reset of the reset circuit.
Specifically, when the first terminal of the first switch 13 is required to be the reset signal output terminal, the second switch 14 is kept off. In case no reset is required, the first switch 13 is turned off; in the case of needing to be reset, the first switch 13 can be controlled to be turned on, and the voltage of the input signal at the power input terminal 22 is preferably a positive voltage, so that the selection module 12 can select the output of the ground signal with a lower voltage as a low-level signal, and output the low-level signal to the reset circuit through the first terminal of the first switch 13.
For the same reason as the foregoing embodiment, in this embodiment, the second switch 14 is added to the driving circuit 1, and the second switch 14 is kept off, so that the control module 11 and the first end of the first switch 13 can be isolated, and then the first end of the first switch 13 is used as a reset control end, so that the first switch 13 is kept off when reset is not needed, and the first switch 13 is controlled to be on when reset is needed, so that the first end of the first switch 13 can use the ground signal selected by the selection module 12 as a low-level signal, thereby realizing multiplexing of a partial circuit structure of the driving circuit 1.
Fig. 4 shows a further driver circuit 1 according to an embodiment of the invention. The driving circuit 1 shown in fig. 3 can be understood in conjunction with fig. 1-3. The drive circuit 1 in fig. 4 differs from the drive circuit 1 in fig. 3 in that the drive circuit 1 further includes a third switch 15. Of course, the driving circuit 1 shown in fig. 4 includes the second switch 14, and may not include the second switch 14 actually, and is not limited specifically.
In one embodiment, a first terminal of the third switch 15 is connected to the source of the first fet 21, and a second terminal of the third switch 15 is connected to a first terminal of the first switch 13. The third switch 15 may be turned on and off by user control, or may also be turned on and off by other circuit modules, which is not limited specifically.
The third switch 15 and the first switch 13 can be switched from the off state to the on state when the first fet 21 needs to be switched from the on state to the off state. In the case where the drive circuit 1 is provided with the second switch 14, the second switch 14 may be kept on in this mode.
Specifically, when the first fet 21 and the second fet 24 need to be switched from the on state to the off state, the third switch 15 may be controlled to be turned on while the first switch 13 is controlled to be turned on, and since the third switch 15 is connected between the sources of the first fet 21 and the second fet 24 and the first terminal (i.e., the gate) of the first switch 13, the voltage on the small gate capacitances of the first fet 21 and the second fet 24 may be rapidly discharged to the source signal Vsource voltage, the output control signal VC may be rapidly equalized to the source signal Vsource voltage, thereby satisfying the off condition, the first fet 21 and the second fet 24 may be rapidly turned off, and then the first switch 13 may normally discharge the remaining gate voltage (equal to the source signal Vsource voltage) to the ground signal voltage.
In addition, since the first fet 21 and the second fet 24 are turned off before the first switch 13 is completely discharged, the discharge current through the first switch 13 may not be too large, and the on-resistance of the first switch 13 is not required to be small, thereby preventing the first switch 13 from losing the function of limiting the current in some applications.
As can be seen from the foregoing embodiment, when the first switch 13 is turned off, the first gate control signal VGate is used as the output control signal VC to the gates of the first fet 21 and the second fet 24, and the source signal Vsource voltage of the first fet 21 and the second fet 24 is lower than the voltage of the output control signal VC, so that the first fet 21 and the second fet 24 are turned on; when the first field effect transistor 21 and the second field effect transistor 24 need to be turned off, the first switch 13 is controlled to be turned on, and the gate voltages of the first field effect transistor 21 and the second field effect transistor 24 are directly pulled to the voltage of the ground signal (namely, the gate is directly connected to the ground terminal GND), so that at the moment of hanging up, the voltage difference between the source and the gate of the first field effect transistor 21 and the second field effect transistor 24 is higher (almost 5V), which has higher requirements for selecting the field effect transistors, and the gate-source withstand voltage of the field effect transistors needs to be ensured to support a wider voltage range, so that the price is more expensive.
In the embodiment, the third switch 15 is additionally arranged in the driving circuit 1, and the third switch 15 is connected between the source electrodes of the first field effect transistor 21 and the second field effect transistor 24 and the first end of the first switch 13, so that when the first switch 13 and the third switch 15 are turned off simultaneously, the gate voltages of the first field effect transistor 21 and the second field effect transistor 24 can be pulled down to the source signal Vsource voltage instantly through the third switch 15, thereby realizing the rapid turn-off of the first field effect transistor 21 and the second field effect transistor 24, and then the gate voltages of the first field effect transistor 21 and the second field effect transistor 24 are discharged to the ground signal voltage through the first switch 13, so that the requirements on the gate-source withstand voltage of the selected field effect transistor are reduced through the cooperation of the first switch 13 and the third switch 15, and the rapid turn-off of the first field effect transistor 21 and the second field effect transistor 24 is ensured, the cost performance of the driving circuit 1 is higher and there is no excessive requirement for the first switch 13.
Fig. 5 is a schematic circuit diagram of a driving circuit 1 and a power channel 2 according to another embodiment of the invention. The driver circuit 1 of fig. 5 is the same as that of fig. 4, except that the driver circuit 1 is connected to the power supply channel 2 shown in fig. 1 or 2. Further, the first field effect transistor 21 and the second field effect transistor 24 shown in fig. 5 are NMOS, but it is not limited to this, and other field effect transistors may be used if the same function can be achieved.
The present invention further provides an electronic device, which includes the driving circuit 1 and the power channel 2 in the foregoing embodiments, and details of the foregoing embodiments can be referred to, and are not repeated herein.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. The utility model provides a drive circuit, its characterized in that drive circuit connects power channel, power channel is including the power input end, first field effect transistor and the load that connect gradually, drive circuit includes: the device comprises a control module, a first switch and a selection module;
the first end of the first switch is connected with the grid electrode of the first field effect transistor;
the output end of the control module is connected with the first end of the first switch, and the control module is used for outputting a first grid control signal so as to control the first field effect transistor to be conducted when the first switch is turned off;
the two input ends of the selection module are respectively connected with the power input end and the ground end, the output end of the selection module is connected with the second end of the first switch, and the selection module is used for selecting a signal with lower voltage in signals input by the power input end and the ground end to be output as a second grid control signal so as to control the first field effect transistor to be switched off when the first switch is switched on;
the drive circuit further includes: a third switch;
the first end of the third switch is connected with the source electrode of the first field effect transistor, and the second end of the third switch is connected with the first end of the first switch;
the third switch and the first switch can be switched from an off state to an on state when the first field effect transistor is switched from an on state to an off state.
2. The drive circuit of claim 1, wherein the drive circuit further comprises: a second switch;
the second switch is connected between the output end of the control module and the first end of the first switch.
3. The drive circuit of claim 2,
the first end of the first switch is connected with a controlled circuit so as to output logic level signals to the controlled circuit, and the logic level signals comprise logic high level signals;
the first end of the first switch is also connected with a pull-up circuit, and the pull-up circuit is used for outputting a logic high level signal through the first end of the first switch when the first switch and the second switch are both turned off.
4. The drive circuit of claim 2,
the first end of the first switch is connected with a reset circuit so as to output a low-level signal to the reset circuit when the first switch is switched on and the second switch is switched off, wherein the low-level signal is used for controlling the reset of the reset circuit.
5. The driver circuit of claim 1, wherein the power channel further comprises a second field effect transistor;
the grid electrode of the second field effect transistor is connected with the grid electrode of the first field effect transistor, the source electrode of the second field effect transistor is connected with the source electrode of the first field effect transistor, and the drain electrode of the second field effect transistor is connected with the power supply input end; the drain electrode of the first field effect transistor is connected with the load.
6. The driving circuit of claim 1, wherein the control module and the selection module are integrated in a same chip.
7. The driving circuit of claim 6, wherein the first FET is an external FET of the chip.
8. The drive circuit of claim 1,
the control module is a charge pump;
and two input ends of the control module are respectively connected with the power input end and the source electrode of the first field effect transistor.
9. An electronic device comprising the driving circuit and the power channel of any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010979392.6A CN112133238B (en) | 2020-09-17 | 2020-09-17 | Drive circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010979392.6A CN112133238B (en) | 2020-09-17 | 2020-09-17 | Drive circuit and electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112133238A CN112133238A (en) | 2020-12-25 |
| CN112133238B true CN112133238B (en) | 2021-07-09 |
Family
ID=73846032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010979392.6A Active CN112133238B (en) | 2020-09-17 | 2020-09-17 | Drive circuit and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112133238B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113538882B (en) * | 2021-07-16 | 2022-12-13 | 上海爻火微电子有限公司 | Signal transmission circuit and electronic equipment |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106803755B (en) * | 2016-12-23 | 2020-04-28 | 长沙景美集成电路设计有限公司 | Novel high-stability isolating switch circuit for negative pressure application |
| KR102026929B1 (en) * | 2018-05-17 | 2019-10-01 | 한국전기연구원 | Gate driving circuit for power switch |
| CN110277700B (en) * | 2019-06-18 | 2020-11-13 | 维沃移动通信有限公司 | A kind of interface unit |
| CN211183521U (en) * | 2019-12-16 | 2020-08-04 | 上海闻泰电子科技有限公司 | Dual-battery selection circuit and electronic device |
| CN111510120A (en) * | 2020-06-12 | 2020-08-07 | 帝奥微电子有限公司 | Power consumption-free analog switch with voltage processing function |
-
2020
- 2020-09-17 CN CN202010979392.6A patent/CN112133238B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN112133238A (en) | 2020-12-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102379554B1 (en) | Protection circuit | |
| CN101882864B (en) | Electrifying startup circuit and electrifying startup method thereof | |
| CN108123596B (en) | NMOS switching tube driving circuit | |
| CN100586021C (en) | Buffer circuit and integrated circuit | |
| CN104065251B (en) | There is the drive circuit of controlled gate discharge current | |
| CN203632633U (en) | Control circuit and electronic system | |
| CN102231598B (en) | Power supply circuit | |
| CN102184704A (en) | Shift buffer and driving method thereof | |
| EP2800274A1 (en) | Gate driver circuit | |
| US20230120432A1 (en) | Blocking and Startup Transistor Control in Voltage Converters | |
| CN114389438B (en) | Switching power supply and self-adaptive driving circuit thereof | |
| CN112133238B (en) | Drive circuit and electronic device | |
| CN112269347B (en) | Power-on and power-off time sequence control device | |
| CN112599107A (en) | Power supply discharge circuit, display module and display device | |
| CN216774327U (en) | Battery protection chip and battery system | |
| CN216904653U (en) | Drive circuit, chip and electronic equipment | |
| WO2020000951A1 (en) | Power supply circuit for prolonging lifetime of pmc chip, and expander backplane | |
| CN201918891U (en) | High-voltage MOSFET (metal-oxide semiconductor field effect transistor) driving circuit | |
| CN108900081A (en) | A kind of circuit of control negative pressure output | |
| CN114679055A (en) | Switching power supply circuit and terminal equipment | |
| CN1866705B (en) | Apparatus for supplying power source | |
| CN104679214A (en) | Voltage regulating circuit | |
| CN112003458A (en) | Access pipe control circuit, power management chip and power device | |
| CN112994679A (en) | Drive circuit and control chip | |
| CN105790551B (en) | Reduction voltage circuit and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |