CN112033281B - Panel device with alignment calibration pattern - Google Patents
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- CN112033281B CN112033281B CN201910588031.6A CN201910588031A CN112033281B CN 112033281 B CN112033281 B CN 112033281B CN 201910588031 A CN201910588031 A CN 201910588031A CN 112033281 B CN112033281 B CN 112033281B
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- 239000002184 metal Substances 0.000 claims abstract description 12
- 239000011248 coating agent Substances 0.000 claims description 18
- 238000000576 coating method Methods 0.000 claims description 18
- 238000000034 method Methods 0.000 abstract description 16
- 238000010586 diagram Methods 0.000 description 11
- 238000005259 measurement Methods 0.000 description 8
- 239000011295 pitch Substances 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000003070 Statistical process control Methods 0.000 description 4
- 238000007689 inspection Methods 0.000 description 3
- 238000009500 colour coating Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
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- 238000005070 sampling Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
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Abstract
The panel device and the method for obtaining the alignment calibration offset of the panel device are applied to the alignment tolerance when two plates are attached, different patterns are respectively arranged on the two layers of plates, and the offset of the plates is judged by using the change between the patterns. When the plates are stacked, the metal layer of one plate covers most of the lines, and only partial lines are exposed in the slits in the metal layer. If the alignment and the overlapping are completely performed, the line is not exposed in the slit. When the two plates are deviated along a certain direction, the lines gradually begin to appear, and the deviation is larger when the number of the lines is larger, so that the deviation after the two plates are overlapped can be quickly and accurately judged according to the number of the lines exposed in the slit.
Description
Technical Field
The present invention relates to a panel device, and more particularly, to a panel device having alignment patterns on two plates.
Background
Generally, a touch panel or a display panel is usually formed by stacking two or more layers of glass devices or circuit devices, and the devices of different layers must be aligned with each other during stacking and assembling to operate normally. In the conventional method, a first alignment portion (e.g., a circular pattern) is disposed on one layer of devices, a second alignment portion (e.g., a through hole) is disposed at a corresponding position on the other layer of devices, and when two layers of devices are stacked, whether the first alignment portion of the circular pattern falls into the through hole of the second alignment portion (or whether the circular pattern is visible through the through hole) is visually checked to determine whether the two layers of devices are aligned. Obviously, the alignment calibration method has low accuracy, and the Shift amount (Shift amount) variation of each stacked product cannot be known clearly, so that the Statistical Process Control (SPC) and the process capability supervision cannot be effectively performed. Currently, in quality control inspection, only such simple visual determination can be actually performed, and more accurate offset measurement cannot be performed on the premise of efficiency. In contrast, Statistical Process Control (SPC) and process capability monitoring can be achieved by using an optical microscope for more accurate offset measurement inspection, but the inspection is usually performed only by sampling due to the long time.
Disclosure of Invention
Embodiments of the present invention provide a panel device having alignment patterns to solve the above problems.
The embodiment of the invention provides a panel device with an alignment calibration pattern, which comprises a first plate, a second plate and a first alignment group. The second plate and the first plate are aligned and superposed (Align) to form the panel device. The first alignment group comprises a first pattern and a second pattern, the first pattern is arranged at one corner of the first plate and comprises a plurality of lines which are distributed at equal intervals along a first direction, the second pattern is arranged at the corner of the second plate corresponding to the first plate, and the second pattern comprises a plurality of slits (Slit) which are distributed at equal intervals along the first direction. When the second plate is overlapped with the first plate, the amount of the plurality of lines exposed out of the plurality of slits along the first direction determines the offset of the second plate relative to the first plate along the first direction.
According to the embodiment of the invention, the periphery of the first plate is provided with a dark coating which is not transparent to light, the lines are white lines on the dark coating, and the width of the white lines along the first direction is equal to the interval between the white lines; wherein the periphery of the second plate is provided with a metal coating, and the plurality of slits are hollow slits on the metal coating.
According to an embodiment of the present invention, the number of the plurality of lines is Nw, the number of the plurality of slits is Ns, and Nw ═ Gb/R +2-Gs and Ns ═ Gb/R + 1-Gs. Wherein Gb is the interval of two adjacent lines, Gs is the interval of two adjacent slits, and R is the set resolution of the offset generated by the second plate relative to the first plate. The first pattern has an equivalent length Lw of 2Gb2and/R-2 GbGs +3 Gb. The line pitch of the first pattern is 2Gb, the slit pitch of the second pattern is Ps, and Ps is 2 Gb-R.
According to an embodiment of the present invention, the first byte pair is composed of a plurality of subsections, the plurality of subsections are transversely arranged along a direction perpendicular to the first direction, wherein the first two lines in the first pattern contained in any subsection are the same two lines as the last two lines in the first pattern contained in the previous subsection, and the first two slits in the second pattern contained in any subsection are the same two slits as the last two slits in the second pattern contained in the previous subsection.
According to an embodiment of the present invention, the first alignment group further includes a third pattern and a fourth pattern, the third pattern is disposed at the corner of the first plate, the third pattern includes a plurality of carry lines distributed at equal intervals along the first direction, the fourth pattern is disposed at the corner of the second plate corresponding to the first plate, and the fourth pattern includes a plurality of carry slits distributed at equal intervals along the first direction. When the second plate is overlapped with the first plate, the number of the plurality of carry lines exposed out of the plurality of carry slits along the first direction determines the carry offset generated by the second plate relative to the first plate along the first direction. Wherein Gb 'is the interval of two adjacent carry lines, Gs' is the interval of two adjacent carry slits, R 'is the carry resolution of the offset generated by the second plate relative to the first plate, and Gb' is greater than Gb, Gs 'is greater than Gs, and R' is greater than R.
According to an embodiment of the present invention, the panel apparatus further includes a second pair of bit groups including a first pattern and a second pattern, the second pair of bit groups being disposed at positions different from the first pair of bit groups on the corners of the first plate and the second plate, the first pattern of the second pair of bit groups including a plurality of lines equally spaced along the second direction, and the second pattern of the second pair of bit groups including a plurality of slits equally spaced along the second direction. When the second plate is overlapped with the first plate, the quantity of the plurality of lines of the second pair of groups exposed out of the plurality of slits of the second pair of groups along the second direction determines the offset of the second plate relative to the first plate along the second direction. Wherein the first direction is perpendicular to the second direction.
The panel device of the embodiment of the invention further comprises a third pair of groups, which comprises a first pattern and a second pattern, the third pair of groups is arranged on the diagonal corners of the opposite corners of the first plate and the second plate, the first pattern of the third pair of groups comprises a plurality of lines which are distributed at equal intervals along the first direction, and the second pattern of the third pair of groups comprises a plurality of slits which are distributed at equal intervals along the first direction.
According to an embodiment of the present invention, the panel device is a display panel device or a touch panel device.
Another embodiment of the present invention provides a method for obtaining an offset of alignment calibration for a panel device, comprising: arranging a first pattern of a first alignment group at one corner of a first plate, and arranging a second pattern of the first alignment group at a corner of a second plate corresponding to the first plate, wherein the first pattern comprises a plurality of lines which are distributed at equal intervals along a first direction, and the second pattern comprises a plurality of slits which are distributed at equal intervals along the first direction; aligning and superposing the second plate and the first plate to form a panel device; and when the second plate is overlapped with the first plate, determining the offset of the second plate relative to the first plate along the first direction according to the number of the exposed lines in the plurality of slits along the first direction.
According to an embodiment of the present invention, a method is disclosed, wherein a first byte pair is composed of a plurality of subsections, the method comprising: and transversely arranging a plurality of subsections along a direction perpendicular to the first direction, wherein the first two lines in the first pattern contained in any subsection and the last two lines in the first pattern contained in the previous subsection are the same two lines, and the first two slits in the second pattern contained in any subsection and the last two slits in the second pattern contained in the previous subsection are the same two slits.
The method disclosed in the embodiments of the present invention further comprises the steps of: arranging a third pattern of the first paired groups at the corners of the first plate, and arranging a fourth pattern of the first paired groups at the corners of the second plate corresponding to the first plate, wherein the third pattern comprises a plurality of carry lines distributed at equal intervals along the first direction, and the fourth pattern comprises a plurality of carry slits distributed at equal intervals along the first direction; when the second plate is overlapped with the first plate, determining the carry offset generated by the second plate relative to the first plate along the first direction according to the number of the plurality of carry lines exposed out of the plurality of carry slits along the first direction; wherein Gb 'is the interval of two adjacent carry lines, Gs' is the interval of two adjacent carry slits, R 'is the carry resolution of the offset generated by the second plate relative to the first plate, and Gb' is greater than Gb, Gs 'is greater than Gs, and R' is greater than R.
The method disclosed in the embodiments of the present invention further comprises the steps of: arranging a second pair of groups at positions different from the first pair of groups on corners of the first plate and the second plate, wherein a first pattern of the second pair of groups comprises a plurality of lines distributed at equal intervals along a second direction, and a second pattern of the second pair of groups comprises a plurality of slits distributed at equal intervals along the second direction; and when the second plate is superposed with the first plate, determining the offset of the second plate relative to the first plate along the second direction according to the number of the plurality of lines of the second alignment group exposed in the plurality of slits of the second alignment group along the second direction. Wherein the first direction is perpendicular to the second direction.
The method disclosed in the embodiments of the present invention further comprises the steps of: and arranging a third pair of groups of bits on opposite diagonal corners of the first plate and opposite corners of the second plate, wherein the first pattern of the third pair of groups of bits comprises a plurality of lines which are distributed at equal intervals along the first direction, and the second pattern of the third pair of groups of bits comprises a plurality of slits which are distributed at equal intervals along the first direction.
The panel device and the method for obtaining the alignment calibration offset of the panel device disclosed by the invention can quickly obtain the alignment accuracy and the bonding capability of a measuring and bonding machine when the panel device is actually assembled and stacked on a production line. If the error is generated, it can be quickly interpreted, and the offset can be obtained in a numerical way, so that the production machine can be immediately adjusted to recover the allowable alignment accuracy.
The advantages and spirit of the present invention will be further understood by the following detailed description of the invention and the accompanying drawings.
Drawings
FIG. 1 is a schematic view of a panel device according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating an embodiment of a first pattern;
FIG. 3 is a diagram illustrating an embodiment of a second pattern;
fig. 4 to 6 are schematic diagrams illustrating different offset amounts of the second plate and the first plate after being overlapped;
FIG. 7 is a diagram illustrating an embodiment of a byte set according to the invention;
FIGS. 8 and 9 are diagrams of alternative embodiments of the byte pair according to the present invention;
FIGS. 10 and 11 are schematic diagrams of another embodiment of a first pair of bits set according to the present invention;
FIG. 12 is a flowchart illustrating a method for obtaining an offset for alignment calibration of a panel device according to the present invention.
Description of the symbols
1 first byte pair 71-77 subsections
2 second Pair group 111 line
3 third Pair 121 slit
4 fourth Pair 131 carry line
141 carry slit of 5-panel device
7, 7', 8 pair bit group 200 method
11 first pattern 202-206 step
12 second pattern 515 dark coating
13 third pattern 525 metal coating
14 corner of fourth pattern 511,521,512,522
51 end of first plate 722,731,732,741
52 second plate member
Detailed Description
Certain terms are used throughout the description and following claims to refer to particular components. As one of ordinary skill in the art will appreciate, manufacturers may refer to a device by different names. This specification and the claims that follow do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Furthermore, the term "coupled" is used herein to include any direct and indirect electrical or mechanical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical/mechanical connection, or through an indirect electrical/mechanical connection via other devices and connections.
Referring to fig. 1, fig. 1 is a schematic view of a panel device according to an embodiment of the present invention. The panel device 5 comprises a first plate 51 and a second plate 52 superimposed on each other. The panel device 5 may be a touch panel device or a display panel device, when the panel device 5 is a touch panel device, the first board 51 and the second board 52 may be transparent electrode layers in the touch panel, and when the panel device 5 is a display panel device, the first board 51 and the second board 52 may be any two adjacent board-type devices (such as a color filter, an alignment film, a liquid crystal layer …, etc.) in the display panel that need to be aligned.
The alignment calibration method of the present invention is further described below. Please refer to fig. 2 and fig. 3 together, wherein fig. 2 is a schematic diagram of an embodiment of the first pattern, and fig. 3 is a schematic diagram of an embodiment of the second pattern. The panel device 5 further includes a first alignment group 1 including a first pattern 11 and a second pattern 12, wherein the first pattern 11 is disposed on a corner 511 of the first board 51, and the second pattern 12 is disposed on a corner 521 of the second board 52 corresponding to the corner 511 of the first board 51, and the present invention uses two sets of scale systems with different pitches (pitch) of the first pattern 11 and the second pattern 12 to quickly and accurately know the relative displacement between the first board 51 and the second board 52 after being overlapped with each other through the interpretation of the scales.
For example, if the panel device 5 is a touch panel device, the first plate 51 has a dark coating 515 that is opaque around the periphery thereof, and the first pattern 11 is disposed on the dark coating 515 that is opaque at the corner 511. The second plate 52 is a transparent electrode layer and has a metal coating 525 on the periphery, and the second pattern 12 is disposed on the metal coating 525 on the corner 521. As shown in fig. 2 and 3, the first pattern 11 includes a plurality of lines 111 equally spaced in the Y direction (first direction), for example, white lines on the dark color coating 515. The width of each line 111 along the Y direction and the spacing between two adjacent lines 111 are Gb, and the pitch of the first pattern 11 is 2Gb, where the width Gb and the spacing Gb depend on the capability of the manufacturing process. The second pattern 12 includes a plurality of slits 121 equally spaced along the Y direction (the first direction), for example, hollow slits engraved on the opaque metal coating 525. The interval between two adjacent slits 121 along the Y direction is Gs. In order to accurately represent the different offset between the two plates by the corresponding relationship between the positions of the first pattern 11 and the second pattern 12, the interval Gb of the lines 111 is different from the interval Gs of the slits 121, and when the second plate 12 is overlapped with the first plate 11, the amount of the exposed slits 121 of the lines 111 along the Y direction determines the offset of the second plate 12 relative to the first plate 11 along the Y direction.
Here, it is necessary to explain how fine the resolution R (or accuracy) is set, that is, how fine the offset amount can be discriminated is set. For example, if the slits 121 are to be exposed by one more line 111, which represents an offset of 10um more, the resolution R here is 10um, and the smaller the value of R, the higher the resolution. The pitch Ps about the second pattern 12 can be known as follows: by setting the resolution R and the width/spacing Gb of the lines 111 determined by the manufacturing process capability, if in a certain offset state, the upper edge of the first slit 121 of the second pattern 12 is aligned with the lower edge of the second pitch of the first pattern 11, and when the two plates are further displaced from each other by R to the next offset state, the upper edge of the second slit 121 of the second pattern 12 must be the lower edge of the third pitch of the first pattern 11, so 2Gb is Ps + R, and:
Ps＝2Gb-R。
according to the above requirements of the manufacturing process capability (Gb, Gs) and the resolution (R), the number of the lines 111 required to use white is:
Nw＝Gb/R+2-Gs；
the number of the corresponding hollow slits 121 is:
Ns＝Nw-1＝Gb/R+1-Gs；
from the number of the lines 111, the equivalent length of the first pattern 11 is Lw, and
Lw＝(Nw+(Nw-1))Gb＝(2Nw-1)Gb＝2Gb2/R-2GbGs+3Gb；
finally, the first byte pair 1 of the proper size is set on the first plate 51 and the second plate 52 according to the calculated result of Lw.
Please refer to fig. 4 to fig. 6, which are schematic diagrams illustrating that the second plate 52 and the first plate 51 have different offsets after being stacked, and the offset generated along the second plate 52 relative to the first plate 51 is determined by the amount of the line 111 of the first byte pair 1 exposed in the slit 121. When the second plate 52 and the first plate 51 are aligned and superimposed accurately (or aligned within a reasonable error), as shown in fig. 4, none of the white lines 111 are exposed in the slits 121, that is, the slits 121 are aligned to the dark coating 515 between the lines 111, and at this time, the offset of the second plate 52 relative to the first plate 51 along the Y direction is 0 um. When the second plate 52 and the first plate 51 are offset, as shown in fig. 5, from the slit 121 at the bottom, about 7 to 8 white lines 111 are exposed in the slit 121, and the other slits 121 still face the dark coating 515 between the lines 111, at this time, it can be interpreted that the offset generated by the second plate 52 relative to the first plate 51 along the opposite direction of the Y direction is 70-80 um. As shown in fig. 6, from the slit 121 at the top, about 13 to 14 white lines 111 are exposed in the slit 121, and the other slits 121 still face the dark coating 515 between the lines 111, at this time, the offset generated in the Y direction of the second plate 52 relative to the first plate 51 can be determined to be 130-140 um. The offset numbers and directions in the above drawings are only one embodiment of the present invention, and the present invention is not limited thereto.
Please refer to fig. 7. According to the above description and calculation formulas, in an embodiment of the present invention, the width/interval Gb of the lines 111 of the first pattern 11 is designed to be 200um, the interval Gs of the slits 121 of the second pattern 12 is designed to be 340um, the width of the slits 121 is designed to be 50um, and the resolution R is set to be 10um, so as to obtain a first pattern 11 having 17 lines 111 arranged and a second pattern 12 having 16 slits 121 arranged, that is, the equivalent length is about 6.6mm, the resolution is 10um, and a first alignment group having a total length of 150um can be measured.
Please refer to fig. 1. In an embodiment of the invention, a second byte pair 2 may be additionally disposed at the corner 511,521, and the contents of the first pattern and the second pattern included in the second byte pair 2 are substantially the same as those of the first byte pair 1, which is not described herein again. As mentioned above, the first pattern 11 and the second pattern 12 of the first byte pair 1 are arranged along the Y direction (the first direction), and the first pattern and the second pattern of the second byte pair 2 are arranged along the X direction (the second direction), but the X direction and the Y direction are perpendicular to each other in this embodiment, but not limited thereto. In this way, when the first plate 51 and the second plate 52 are aligned and overlapped with each other, the panel device 5 having the first alignment group 1 and the second alignment group 2 can obtain the offset of the two plates along the Y direction from the first alignment group 1 and obtain the offset of the two plates along the X direction from the second alignment group 2.
Please continue to refer to fig. 1. In another embodiment of the present invention, a third pair of bits 3 and a fourth pair of bits 4 may be further disposed at a diagonal corner 512,522 of the opposite corner 511,521 of the panel apparatus 5, wherein the first pattern and the second pattern contained in the third pair of bits 3 have substantially the same content and arrangement direction as the first pair of bits 1, and the first pattern and the second pattern contained in the fourth pair of bits 4 have substantially the same content and arrangement direction as the second pair of bits 2, which are not repeated herein. The two diagonal corners 511,521,512,522 (or the third corner and the fourth corner) of the panel device 5 are respectively provided with a pair of alignment groups, so as to further know the relative rotational offset when the first plate 51 and the second plate 52 are aligned and overlapped with each other.
If the width/spacing Gb of the lines 111 that can be formed on the board is too large due to the limitations of the manufacturing process, and a high resolution is required (i.e. the resolution R is set to be much smaller than Gb), the equivalent length Lw of the first pattern 11 will be too long. For example, if Gb ═ 150um, Gs ═ 20um, and R ═ 1um, Lw is about 4.5 cm. In such an environment, in an embodiment of the present invention, a long segment of the alignment group can be cut and rearranged to reduce the dimension in a single direction. Please refer to fig. 8 and fig. 9, which are schematic diagrams illustrating another embodiment of a pair of bytes according to the present invention. When the equivalent length Lw of the alignment group 7 is too large to be directly applied to the panel device, the alignment group 7 can be cut into a plurality of sub-segments 71-77 (the number of the sub-segments cut here is merely an illustrative example), and the sub-segments 71-77 are arranged transversely along the X direction, and the previous/next line/slit of the adjacent sub-segment 71-77 is added to each of the two ends of each sub-segment 71-77, i.e. the first two lines/slits included in any sub-segment 71-77 and the last two lines/slits included in the previous sub-segment 71-77 are the same two lines/slits, for example, in fig. 9, the end 722 is the original end of the sub-segment 72, the end 731 is the head of the sub-segment 73, and after the cutting arrangement, in the new alignment group 7', the end of the sub-segment 72 is added with the end 731, the end 722 is added to the head end of the subsection 73 (and the other end 732,741 … is added in the same way), so that when the offset of the two plates exceeds the line/slit at one end of one subsection, the line/slit of the previous/next subsection can be used as a reference for judgment, and the alignment group with overlong single direction is rearranged into the alignment group with reasonable size.
Please refer to fig. 10 and fig. 11, which are schematic diagrams illustrating another embodiment of a first byte pair according to the present invention. In order to obtain a wide range of offsets and maintain high resolution, the first alignment group 1' further includes a third pattern 13 and a fourth pattern 14, which are also disposed at the corners 511,521 of the first board 51 and the second board 52, respectively. The third pattern 13 includes a plurality of carry lines 131 equally spaced Gb ' in the Y direction, the fourth pattern 14 includes a plurality of carry slits 141 equally spaced Gs ' in the Y direction, wherein the spacing Gb ' of the third pattern 13 is greater than the spacing Gb of the first pattern 11, the spacing Gs ' of the fourth pattern 14 is greater than the spacing Gs of the second pattern 12, and the values of resolutions R ' of the third pattern 13 and the fourth pattern 14 are greater than the values of resolutions R of the first pattern 11 and the second pattern 12 (i.e., the third pattern 13 and the fourth pattern 14 have relatively low resolutions). When the two plates are overlapped, the exposed number of the carry lines 131 along the Y direction in the carry slits 141 also determines the carry offset generated by the two plates along the Y direction. Since the first pattern 11 and the second pattern 12 are a combination of high resolution R and a small measurement range (measurement range Gb), and the third pattern 13 and the fourth pattern 14 are a combination of low resolution R' and a large measurement range (measurement range Gb), it can be configured to generate a first offset in the third pattern 13 and the fourth pattern 14 when the offset of the first pattern 11 and the second pattern 12 exceeds the measurement range. Thus, the alignment group can have high resolution and large-range offset measurement capability through the combination of different patterns.
Please refer to fig. 12, which is a flowchart illustrating a method for obtaining an offset of a calibration alignment for a panel device according to the present invention, comprising:
step 202: setting a first pattern of a first alignment group at one corner of a first plate, and setting a second pattern of the first alignment group at one corner corresponding to a second plate;
step 204: aligning and overlapping the second plate and the first plate to form a panel device;
step 206: and determining the offset of the second plate relative to the first plate according to the exposed number of the plurality of lines in the plurality of slits.
In step 202, the first pattern includes a plurality of lines equally spaced along a first direction, the second pattern includes a plurality of slits equally spaced along the first direction, a second pair of bits may be additionally disposed, and a third pair of bits and a fourth pair of bits are disposed at diagonal corners, and the specific structural details thereof are the same as those of the foregoing embodiments and are not repeated herein.
The panel device and the method for obtaining the alignment calibration offset of the panel device are applied to alignment tolerance (alignment shift) when two plates are attached, different patterns are respectively arranged on the two layers of plates, and the offset of the plates is judged by using the change between the patterns. When the plates are stacked, the metal layer of one plate covers most of the wires, and only the partial wires are exposed in the slits on the metal layer. If the alignment and the overlapping are completely performed, the line is not exposed in the slit. When the two plates are deviated along a certain direction, the lines gradually begin to appear, and the deviation is larger when the number of the lines is larger, so that the deviation after the two plates are overlapped can be quickly and accurately judged according to the number of the lines exposed in the slit.
The above-described embodiments are merely exemplary embodiments of the present invention, and all equivalent changes and modifications made in the claims of the present invention should be covered by the present invention.
Claims (7)
1. A panel device with alignment patterns, comprising:
a first plate member;
the second plate is aligned and superposed with the first plate to form the panel device; and
a first alignment group including a first pattern and a second pattern, the first pattern being disposed at a corner of the first plate, the first pattern including a plurality of lines distributed at equal intervals along a first direction, the second pattern being disposed at the corner of the second plate corresponding to the first plate, the second pattern including a plurality of slits distributed at equal intervals along the first direction;
when the second plate piece is overlapped with the first plate piece, the quantity of the plurality of slits of the plurality of lines exposed along the first direction determines the offset of the second plate piece relative to the first plate piece along the first direction;
the first byte pair is composed of a plurality of subsections, the subsections are transversely arranged along a direction perpendicular to the first direction, wherein the first two lines in the first pattern contained in any subsection and the last two lines in the first pattern contained in the previous subsection are the same two lines, and the first two slits in the second pattern contained in any subsection and the last two slits in the second pattern contained in the previous subsection are the same two slits.
2. The panel apparatus of claim 1 wherein said first sheet member has an opaque dark colored coating therearound, said plurality of lines being white lines on said dark colored coating, and a width of said plurality of white lines in said first direction being equal to a spacing between said plurality of white lines; wherein the second plate is provided with a metal coating around the second plate, and the plurality of slits are hollowed-out slits on the metal coating.
3. The panel device according to claim 1, wherein a line pitch of the first pattern is 2Gb, a slit pitch of the second pattern is Ps, and Ps is 2Gb-R, where R is a set resolution of an offset generated by the second plate with respect to the first plate.
4. The panel apparatus as claimed in claim 1, wherein the first alignment group further comprises a third pattern and a fourth pattern, the third pattern is disposed at the corner of the first plate, the third pattern comprises a plurality of carry lines equally spaced along the first direction, the fourth pattern is disposed at the corner of the second plate corresponding to the first plate, the fourth pattern comprises a plurality of carry slits equally spaced along the first direction;
when the second plate is overlapped with the first plate, the exposed number of the plurality of carry slits of the plurality of carry lines along the first direction determines the carry offset generated by the second plate relative to the first plate along the first direction;
wherein Gb 'is a space between two adjacent carry lines, Gs' is a space between two adjacent carry slits, R 'is a carry resolution of an offset generated by the second plate relative to the first plate, and Gb' is greater than Gb, Gs 'is greater than Gs, R' is greater than R, where Gb is a space between two adjacent lines, Gs is a space between two adjacent slits, and R is a set resolution of an offset generated by the second plate relative to the first plate.
5. The panel apparatus of claim 1, further comprising a second set of pairs comprising the first pattern and the second pattern, the second set of pairs being disposed at a different location on the corners of the first board and the second board than the first set of pairs, the first pattern of the second set of pairs comprising a plurality of lines equally spaced along a second direction, the second pattern of the second set of pairs comprising a plurality of slits equally spaced along the second direction;
when the second plate is overlapped with the first plate, the quantity of the plurality of slits of the second pair of lines of the second pair of groups along the second direction is determined by the offset of the second plate relative to the first plate along the second direction.
6. The panel apparatus of claim 5, wherein the first direction is perpendicular to the second direction.
7. The panel apparatus of claim 1, further comprising a third pair of groups of bits comprising said first pattern and said second pattern, said third pair of groups of bits being disposed at diagonal corners of said first plate and said second plate opposite said corners, said first pattern of said third pair of groups of bits comprising a plurality of lines equally spaced along said first direction, said second pattern of said third pair of groups of bits comprising a plurality of slits equally spaced along said first direction.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW108119395A TWI710821B (en) | 2019-06-04 | 2019-06-04 | Display device having positioning and alignment patterns |
| TW108119395 | 2019-06-04 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112033281A CN112033281A (en) | 2020-12-04 |
| CN112033281B true CN112033281B (en) | 2022-05-06 |
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| CN201910588031.6A Active CN112033281B (en) | 2019-06-04 | 2019-07-02 | Panel device with alignment calibration pattern |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN112033281A (en) | 2020-12-04 |
| TWI710821B (en) | 2020-11-21 |
| TW202045989A (en) | 2020-12-16 |
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