CN115291446B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN115291446B CN115291446B CN202211012791.0A CN202211012791A CN115291446B CN 115291446 B CN115291446 B CN 115291446B CN 202211012791 A CN202211012791 A CN 202211012791A CN 115291446 B CN115291446 B CN 115291446B
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- 239000000758 substrate Substances 0.000 title claims abstract description 98
- 238000005259 measurement Methods 0.000 claims abstract description 122
- 239000002184 metal Substances 0.000 claims description 18
- 239000004973 liquid crystal related substance Substances 0.000 claims description 14
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000012544 monitoring process Methods 0.000 description 16
- 238000004519 manufacturing process Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 239000010409 thin film Substances 0.000 description 9
- 230000000903 blocking effect Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- 239000010408 film Substances 0.000 description 8
- 230000009286 beneficial effect Effects 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 239000003086 colorant Substances 0.000 description 2
- 239000012788 optical film Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 1
- 238000004043 dyeing Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application provides an array substrate, a display panel and a display device, wherein the array substrate comprises a substrate, the substrate comprises a display area and a measurement area positioned at the periphery of the display area, the display area is provided with a plurality of color resistors arranged along a first direction, and one of any two adjacent columns of the color resistors extends to the measurement area along a second direction so as to form redundant color resistors in the measurement area; the first direction and the second direction are perpendicular to each other; the measurement area is also provided with a reference mark configured to determine an offset of the redundant color resistance in the first direction relative to the reference mark. The application solves the problem that the width and the offset of the color block in the display area cannot be accurately monitored in the prior art.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
The LCD (Liquid Crystal Display) is mainly composed of a Thin film transistor (Thin FilmTransistor, TFT) array substrate, a Color Filter (CF) substrate, and a liquid crystal layer (Liquid Crystal Layer) disposed between the two substrates. Along with the improvement of display technology, COA (Color Filteron array) technology has been developed, and the COA technology is to manufacture a color block on a thin film transistor array substrate.
In the process of liquid crystal display panels, the width of the color block and the offset generated by the color block in the display area need to be monitored to provide accurate process parameters for mass-produced liquid crystal display panels. At present, the measurement of the width of the color block and the offset of the color block is started from the side edge of the color block, but the color blocks manufactured on the thin film transistor array substrate are overlapped with each other, and the edge grabbing is not easy, so that the width of the color block and the offset of the color block are not easy to accurately measure.
Disclosure of Invention
The embodiment of the application provides an array substrate, a display panel and a display device, wherein color resistors arranged in a display area are extended to a measurement area to form a plurality of mutually-spaced redundant color resistors, and a reference mark is arranged in the measurement area so as to measure the offset of the redundant color resistors relative to the reference mark, thereby solving the problem that the width and the offset of a color resistor block in the display area cannot be accurately monitored in the prior art.
The application is realized in such a way, the array substrate comprises a substrate, the substrate comprises a display area and a measurement area positioned at the periphery of the display area, the display area is provided with a plurality of color resistors arranged along a first direction, one of any two adjacent columns of the color resistors extends to the measurement area along a second direction, so as to form redundant color resistors in the measurement area; the first direction and the second direction are perpendicular to each other;
the measurement area is also provided with a reference mark configured to determine an offset of the redundant color resistance in the first direction relative to the reference mark.
According to the array substrate provided by the embodiment of the application, one of any two adjacent columns of color resistors in the plurality of color resistors arranged along the first direction in the display area extends to the measurement area along the second direction to form redundant color resistors in the measurement area, so that the edges of the redundant color resistors are easy to grasp, the width measurement of the redundant color resistors is more accurate, the measurement area is also provided with the reference mark, the offset of the redundant color resistors relative to the reference mark can be measured, and the measured offset is more accurate due to the fact that the edges of the redundant color resistors are more obvious, and the monitoring result of the redundant color resistors is used as the monitoring result of the color resistors in the display area, so that the width and the offset of the color resistors in the display area are accurately monitored.
In one embodiment, the measurement area is provided with a reference layer, and the redundant color resistor is positioned on one side of the reference layer away from the substrate;
the reference mark is arranged on the reference layer.
In one embodiment, a measurement reference hole penetrating through the reference layer is formed in the reference layer, the measurement reference hole comprises two hole edges oppositely arranged along the first direction, and the reference mark is the hole edge;
the redundant color resistor comprises two side edges which are oppositely arranged along the first direction;
the hole edge and the side edge are parallel to each other.
In one embodiment, in the first direction, the orthographic projection of the measurement reference hole on the substrate is located between the orthographic projections of two adjacent redundant color resistors on the substrate.
In one embodiment, the orthographic projection of the measurement reference hole on the substrate is located within the orthographic projection of the redundant color resistor on the substrate.
In one embodiment, the reference layer is a metal layer having a signal line extending in the first direction, and the measurement reference hole is disposed on the signal line.
In one embodiment, a reference retaining wall is arranged on one side, away from the substrate, of the reference layer, and the reference retaining wall is positioned between two adjacent redundant color resistors;
the reference retaining wall comprises two wall edges which are oppositely arranged along the first direction, and the reference mark is the wall edge.
In one embodiment, each of the redundant color resistors is provided with a color resistor hole, and the color resistor holes penetrate through the redundant color resistor along the thickness direction of the substrate.
In one embodiment, the measurement reference hole is a rectangular hole.
In one embodiment, the color blocking hole is a rectangular hole.
The array substrate provided by the application has the beneficial effects that: compared with the prior art, the method has the advantages that one of any two adjacent columns of color resistors in the plurality of color resistors arranged along the first direction in the display area is extended to the measurement area along the second direction, so that redundant color resistors are formed in the measurement area, edges of the redundant color resistors are easy to grasp, the width measurement of the redundant color resistors is more accurate, the measurement area is also provided with the reference mark, the offset of the redundant color resistors relative to the reference mark can be measured, the measured offset is more accurate due to the fact that the edges of the redundant color resistors are more obvious, and the monitoring result of the redundant color resistors is used as the monitoring result of the color resistors in the display area, so that the width and the offset of the color resistors in the display area are accurately monitored.
The embodiment of the application also provides a display panel, which comprises the array substrate, the color film substrate and the liquid crystal layer according to any one of the embodiments; the color film substrate and the array substrate are arranged in a box-to-box manner, and the liquid crystal layer is arranged between the color film substrate and the array substrate.
The display panel provided by the application has the beneficial effects that: by adopting the array substrate, one of any two adjacent columns of color resistors arranged in the display area along the first direction extends to the measurement area along the second direction so as to form redundant color resistors in the measurement area, the edges of the redundant color resistors are easy to grasp, the width measurement of the redundant color resistors is more accurate, and the measurement area is also provided with the reference mark, so that the offset of the redundant color resistors relative to the reference mark can be measured, and the measured offset is more accurate due to the fact that the edges of the redundant color resistors are more obvious, and the monitoring result of the redundant color resistors is used as the monitoring result of the color resistors in the display area, so that the width and the offset of the color resistors in the display area are accurately monitored.
The embodiment of the application also provides a display device, which comprises the display panel and the backlight module arranged at one side of the display panel.
The display device provided by the application has the beneficial effects that: by adopting the display panel, one of any two adjacent columns of color resistors arranged in the display area along the first direction extends to the measurement area along the second direction so as to form redundant color resistors in the measurement area, thus the edges of the redundant color resistors are easy to grasp, the width measurement of the redundant color resistors is more accurate, and the measurement area is also provided with the reference mark, so that the offset of the redundant color resistors relative to the reference mark can be measured, and the measured offset is more accurate because the edges of the redundant color resistors are more obvious, and the monitoring result of the redundant color resistors is used as the monitoring result of the color resistors in the display area, thereby realizing accurate monitoring of the width and the offset of the color resistors in the display area.
Drawings
FIG. 1 is a schematic diagram showing the positions of redundant color resistors in a measurement area on an array substrate according to an embodiment of the present application;
FIG. 2 is a schematic diagram showing a second position of redundant color resistors in a measurement region on an array substrate according to an embodiment of the present application;
FIG. 3 is a schematic diagram showing a third position of redundant color resistors in a measurement region on an array substrate according to an embodiment of the present application;
FIG. 4 is a partial top view of an array substrate according to an embodiment of the application;
FIG. 5 is a cross-sectional view A-A of FIG. 4;
FIG. 6 is a first position distribution diagram of measurement reference holes of an array substrate according to a first embodiment of the present application;
FIG. 7 is a second position distribution diagram of measurement reference holes of an array substrate according to the first embodiment of the present application;
FIG. 8 is a third position distribution diagram of measurement reference holes of an array substrate according to the first embodiment of the present application;
FIG. 9 is a partial top view of an array substrate according to a second embodiment of the present application;
FIG. 10 is a sectional view B-B in FIG. 9;
fig. 11 is a schematic structural diagram of a display panel according to a third embodiment of the present application;
fig. 12 is a schematic structural diagram of a display device according to a fourth embodiment of the present application.
Reference numerals: 1. a display area; 2. a peripheral region;
10. a substrate base;
3. a measurement zone; 31. redundancy color resistance; 311. a side edge; 312. color resistance holes; 32. a reference layer; 321. a signal line; 33. measuring a reference hole; 332. a hole edge; 34. a reference retaining wall; 341. a wall edge;
100. an array substrate; 200. a color film substrate; 300. a liquid crystal layer; 400. a backlight module; 401. a light guide plate; 402. a light source assembly; 403. an optical film.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It is to be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are merely for convenience in describing and simplifying the description based on the orientation or positional relationship shown in the drawings, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus are not to be construed as limiting the application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
It should be further noted that, in the embodiments of the present application, the same reference numerals denote the same components or the same parts, and for the same parts in the embodiments of the present application, reference numerals may be given to only one of the parts or the parts in the drawings, and it should be understood that, for other same parts or parts, the reference numerals are equally applicable.
The embodiment of the application provides an array substrate, a display panel and a display device, which solve the problem that the width and offset of a color block in a display area cannot be accurately monitored in the prior art.
Example 1
The array substrate of the first embodiment of the present application is a COA-type array substrate, which includes a substrate 10, a thin film transistor (thin film transistor, TFT) layer, a color filter layer, and a transparent conductive layer, which are sequentially stacked. The substrate 10 includes a display area 1 and a peripheral area 2 located at the periphery of the display area 1, and in the display area 1, a transparent conductive layer generally includes a pixel electrode and a common electrode for driving liquid crystal to rotate. In order to display, the thin film transistor layer under the color filter layer needs to control and adjust the driving voltages on the pixel electrodes corresponding to the liquid crystals at different positions in the display area 1 to form different display brightness.
In the structure of the thin film transistor, the thin film transistor layer generally includes a first metal layer, a gate insulating layer, an active layer, a second metal layer and a passivation layer that are sequentially stacked. The first metal layer is disposed on a side close to the substrate 10, and the passivation layer is disposed on a side close to the color filter layer. Wherein the first metal layer includes a plurality of scan lines and a gate electrode for forming a TFT; the second metal layer includes a plurality of data lines and source and drain electrodes for forming the TFT.
In some embodiments, referring to fig. 1, the substrate 10 includes a measurement area 3 located at the periphery of the display area 1, where the measurement area 3 is located in the peripheral area 2, the display area 1 is substantially square, the measurement area 3 is a square ring, and in some embodiments, the display area 1 may also be in other shapes, such as a circle, and the measurement area 3 is a ring.
The display area 1 is provided with a plurality of color resists arranged along the first direction X, the color resists can be red, blue and green photoresist blocks, and the red, blue and green photoresist blocks can be in a triangular configuration, a square configuration, a linear configuration or a mosaic configuration in the display area 1. Of course, in some embodiments, the plurality of color resists in the display area 1 can also be red, blue, green and white resist blocks. The plurality of color blocks may be manufactured using a dyeing method, an etching method, a printing method, a dry film method, or an electro-deposition method, but is not limited thereto.
Referring to fig. 4, one of any two adjacent columns of color resistors extends in the second direction Y to the measurement area 3 to form a redundant color resistor 31 in the measurement area 3; the first direction X and the second direction Y are perpendicular to each other, and the first direction X and the second direction Y are perpendicular to the thickness direction Z of the substrate base plate 10, respectively. The color resistor extends to the measuring area 3 to form redundant color resistor 31, so that the surrounding environments of the color resistor blocks in the display area 1 are consistent, the width W of the redundant color resistor 31 is equal to the width of the corresponding color resistor block in the display area 1, the width W of the redundant color resistor 31 in the measuring area 3 is monitored, the width of the color resistor block in the display area 1 can be monitored, and the difficulty in monitoring the width of the color resistor block in the display area 1 is greatly reduced. Because a certain distance is reserved between two adjacent redundant color resistors 31, two side edges of the redundant color resistors 31 in the first direction X are quite obvious, so that the width W of the redundant color resistors 31 can be measured accurately, and the accurate width value of the color resistor blocks in the display area 1 is obtained.
The measurement zone 3 is also provided with a reference mark configured to determine an offset D of the redundancy color resist 31 in the first direction X with respect to the reference mark. That is, the reference mark is not moved when the redundancy color resist 31 is manufactured, and the offset of the color resist block in the display area 1 can be obtained by measuring the offset D of the redundancy color resist 31 with respect to the reference mark.
The redundant color resistors 31 of the measurement area 3 are arranged at intervals, that is, the width of one redundant color resistor 31 is set, that is, when the red redundant color resistor and the blue redundant color resistor are set, the middle green redundant color resistor is not set, for example, the colors of the color resistors arranged at the edge of the display area 1 are red, green and blue in sequence, then the redundant color resistor 31 of the measurement area 3 near the edge of the display area 1 corresponds to the color resistors of red, blue and green in sequence, thus the width W and the offset D of the redundant color resistor 31 are equivalent to the width and the offset of the color resistors in the display area 1, and the width and the offset of the color resistors in the display area 1 can be monitored by monitoring the width W and the offset D of the redundant color resistor 31, so that the difficulty of monitoring the width and the offset of the color resistors in the display area 1 is greatly reduced. Moreover, the edges of each redundant color resistor 31 are obvious, so that the measuring equipment can better grasp the edges when measuring the width W of the redundant color resistor 31, and can accurately measure the width W of the redundant color resistor 31 and further accurately monitor the width of the color resistor block in the display area 1.
Specifically, referring to fig. 1, the color resistors in the display area 1 extend along the second direction Y to the redundant color resistors 31 formed in the measurement area 3, and are located at two sides of the measurement area 3 along the second direction Y; of course, referring to fig. 2, the redundant color resistor 31 may be located only on either side of the measurement area 3 along the second direction Y; referring to fig. 3, the redundant color resistors 31 are located at four corners of the measurement area 3, that is, only the color resistors at the four corners of the display area 1 extend into the measurement area 3 along the second direction Y, where it is to be noted that the color resistors at the four corners of the display area 1 are different, for example, the color resistors include a red color resistor block, a green color resistor block and a blue color resistor block, or the color resistors at the four corners are respectively a red color resistor block, a green color resistor block, a blue color resistor block and a white color resistor block, so that the width and the offset of the color resistor blocks with different colors can be accurately monitored, and only the four color resistors in the display area 1 need to extend into the measurement area 3, thereby greatly reducing the cost of manufacturing the color resistor.
In some embodiments, referring to fig. 4 and 5, the measurement area 3 is provided with a reference layer 32, and the redundant color resist 31 is located on a side of the reference layer 32 remote from the substrate 10; the reference mark is provided on the reference layer 32, and the reference layer 32 is provided with a measurement reference hole 33 penetrating the reference layer 32.
Through the above arrangement, since the measurement reference hole 33 is fixed, the measurement reference hole 33 can be used as a reference object, so that the offset D of the redundant color resistor 31 relative to the measurement reference hole 33 can be accurately measured, the offset of the color resistor in the display area 1 can be accurately monitored, the offset of the color resistor in the display area 1 is monitored by using the measurement reference hole 33, and meanwhile, the measurement accuracy of the width W of the redundant color resistor 31 and the measurement accuracy of the offset D can be further improved by combining the measurement result of the width W of the redundant color resistor 31, so that the monitoring of the color resistor in the display area 1 is more accurate.
In one embodiment, referring to fig. 4, the measurement reference hole 33 includes two hole edges 332 disposed opposite in a first direction X, the reference being identified as hole edges 332; the redundancy color resist 31 includes two side edges 311 oppositely disposed along the first direction X; the hole edge 332 and the side edge 311 are parallel to each other. That is, the hole edges 332 and the side edges 311 are perpendicular to the first direction X, so that the distance between one of the hole edges 332 and one of the side edges 311 can be conveniently measured, thereby accurately obtaining the offset D of the redundancy 31 with respect to the measurement reference hole 33.
In some embodiments, referring to fig. 4, the measurement reference hole 33 is a rectangular hole, such that the hole edge 332 of the rectangular hole is parallel to the side edge 311 of the redundant color resistor 31, so as to measure the distance between the hole edge 332 and the side edge 311, thereby facilitating the obtaining of the offset D of the redundant color resistor 31 relative to the measurement reference hole 33. In order to conveniently measure the offset D of the redundant color resist 31 relative to the measurement reference hole 33, the measurement reference hole 33 needs to have a reference edge or reference point that can be conveniently measured, so the shape of the measurement reference hole 33 is not limited to the square hole, the measurement reference hole 33 may also be a circular hole, and the offset D of the redundant color resist 31 relative to the measurement reference hole 33 may also be obtained by measuring the distance between the center of the circle and the side edge 311 of the redundant color resist 31.
In one embodiment, referring to fig. 6, in a first direction X, the orthographic projection of the measurement reference hole 33 on the substrate base plate 10 is located between the orthographic projections of two adjacent redundant color resistors 31 on the substrate base plate 10. Thus, the hole edges of the measurement reference hole 33 and the edges of the redundant color resistor 31 are obvious, and the measurement device can conveniently and rapidly and accurately measure the offset of the redundant color resistor 31 relative to the measurement reference hole 33.
Since there are a plurality of redundant color resistors 31, a measurement reference hole 33 can be provided between every two adjacent redundant color resistors 31, so that each redundant color resistor 31 can correspond to one measurement reference hole 33, the distance between the redundant color resistor 31 and the measurement reference hole 33 becomes closer, the measurement is more convenient, of course, only one measurement reference hole 33 can be provided, the offset D of each redundant color resistor 31 relative to the measurement reference hole 33 is measured, the offset D of each redundant color resistor 31 can be ensured to be measured relative to the same reference object, the measurement result is more accurate, the manufacturing steps of the measurement reference hole 33 can be reduced, and the manufacturing efficiency is improved.
In one embodiment, referring to fig. 7, the orthographic projection of the measurement reference hole 33 on the substrate 10 is located within the orthographic projection of the redundant color resist 31 on the substrate 10. That is, the redundancy color resists 31 cover the measurement reference holes 33, at this time, the redundancy color resists 31 are transparent, so that the offset D of the redundancy color resists 31 relative to the measurement reference holes 33 can be measured by measuring the distance between the side edges 311 of the redundancy color resists 31 and the hole edges 332 of the measurement reference holes 33, and at this time, the surface of the reference layer 32 between two adjacent redundancy color resists 31, which is far away from the substrate 10, is flat, which is beneficial to the smooth laying of the transparent conductive layer manufactured after the redundancy color resists 31.
In some embodiments, referring to fig. 6-8, a reference layer 32 is disposed on the substrate 10, a redundant color resistor 31 is disposed on the reference layer 32, the reference layer 32 is a metal layer, the metal layer has a signal line 321 extending along a first direction X, and a measurement reference hole 33 is disposed on the signal line 321. Since the setting position of the signal line 321 on the metal layer is fixed, setting the measurement reference hole 33 on the signal line 321 is equivalent to setting a reference object at the setting position of the measurement reference hole 33, so that the setting difficulty of the measurement reference hole 33 can be reduced, and the setting efficiency of the measurement reference hole 33 can be improved.
The reference layer 32 may be a first metal layer or a second metal layer in the thin film transistor layer, and in the embodiment of the present application, the reference layer 32 is taken as the first metal layer as an example, and the signal line 321 is a scan line included in the first metal layer.
Referring to fig. 6, the specific arrangement of the measurement reference hole 33 on the signal line 321 may be: the measurement reference hole 33 is disposed in the middle of the signal line 321, and the measurement reference hole 33 is located between two adjacent redundant color resistors 31, and in the second direction Y, the measurement reference hole 33 is smaller than the signal line 321 in size, so that it is ensured that the measurement reference hole 33 does not intercept the signal line 321 and does not affect the signal transmission performance of the signal line 321.
Referring to fig. 7, the specific arrangement of the measurement reference hole 33 on the signal line 321 may also be: the measurement reference hole 33 is disposed in the middle of the signal line 321, and the orthographic projection of the measurement reference hole 33 on the substrate 10 is located in the orthographic projection of the redundant color resistor 31 on the substrate 10, and in the second direction Y, the size of the measurement reference hole 33 is smaller than the size of the signal line 321, so that it can be ensured that the measurement reference hole 33 does not intercept the signal line 321, and the signal transmission performance of the signal line 321 is not affected.
Referring to fig. 8, the specific arrangement of the measurement reference hole 33 on the signal line 321 may also be: in the second direction Y, the measurement reference holes 33 are disposed on at least one side of the signal line 321, and it should be noted that if the measurement reference holes 33 are disposed on both sides of the signal line 321, the measurement reference holes 33 on both sides of the signal line 321 are spaced apart from each other, so that the signal line 321 can be ensured not to be cut off, and the signal transmission performance of the signal line 321 is not affected.
In one embodiment, referring to fig. 6-9, each of the redundancy color resists 31 is provided with a color resist hole 312, and the color resist holes 312 penetrate through the redundancy color resist 31 in the thickness direction Z of the substrate 10. Because the transparent conductive layer is manufactured after the redundant color resistor 31, an insulating layer is further arranged between the transparent conductive layer and the redundant color resistor 31, the arrangement of the color resistor holes 312 can enable the transparent conductive layer above the redundant color resistor 31 to be electrically connected with the metal layer below the redundant color resistor 31, and if the color resistor holes 312 are not arranged, the redundant color resistor 31 cannot be penetrated in the dry etching process when the insulating layer is manufactured, so that the transparent conductive layer above the redundant color resistor 31 and the metal layer below the redundant color resistor 31 cannot be conducted.
It should be noted that, the opening position of the color resist hole 312 on the redundant color resist 31 is to ensure that the transparent conductive layer and the metal layer are connected with the pixel electrode through the color resist hole 312, compared with the prior art that the metal layer at the position below the color resist hole 312 is a square block, interference can occur with the lower bottom of the color resist block, and the edge of the hole opening of the color resist hole 312 is not easy to grasp. The size of the color resistance hole 312 can be monitored by measuring the size of the color resistance hole 312, when the size of the color resistance hole 312 changes, the change of the width and the offset of the redundancy color resistance 31 is described, the change of the color resistance block in the display area 1 can be known without specific measurement of the width and the offset of the redundancy color resistance 31, the specific measurement of the width W and the offset D of the redundancy color resistance 31 can be removed according to actual needs, and the monitoring efficiency of the color resistance block in the display area 1 is improved.
In some embodiments, referring to fig. 6-9, the color blocking hole 312 is a rectangular hole, so that the length and the width M of the color blocking hole 312 can be easily measured, and when the measured length or width M of the color blocking hole 312 changes, it is indicated that the through hole on the color block in the display area 1 also changes, so that accurate monitoring of the color block in the display area 1 can be achieved, and the size and the setting position of the color block can be adjusted.
Of course, in order to conveniently measure the size of the color blocking hole 312, the color blocking hole 312 may be set as a circular hole, so that whether the size of the color blocking hole 312 is changed or not can be monitored only by measuring the diameter of the circular hole, thereby being convenient for accurately monitoring the size change condition of the through hole on the color blocking block in the display area 1.
The measurement of the size of the color resistance hole 312, the measurement of the width W of the redundant color resistance 31 and the measurement of the offset D of the redundant color resistance 31 are performed simultaneously, and the measurement results can be combined so as to improve the measurement accuracy of the width W and the offset D of the redundant color resistance 31, and the redundant color resistance 31 can be monitored comprehensively, so that the change of the color resistance blocks in the display area 1 can be monitored comprehensively.
Example two
Referring to fig. 9 to 10, the array substrate according to the second embodiment of the present application is different from the first embodiment only in the structure of the auxiliary measuring structure. In the second embodiment of the present application, a reference retaining wall 34 is disposed on one side of the reference layer 32 away from the substrate 10, and the reference retaining wall 34 is located between two adjacent redundant color resistors 31; the reference retaining wall 34 includes two wall edges 341 disposed opposite each other in the first direction X, and the reference is denoted as wall edge 341.
The reference retaining wall 34 and the redundant color resistor 31 are arranged on the same layer, and the offset D of the redundant color resistor 31 can be obtained by measuring the distance between one wall edge 341 of the reference retaining wall 34 and the side edge 311 of the redundant color resistor 31, and the offset of the color resistor block in the display area 1 is also obtained.
In some embodiments, referring to fig. 10, in the manufacturing process of the array substrate, one manufacturing process before manufacturing the redundancy color resist 31 is to manufacture an insulating layer, a reference retaining wall 34 may be disposed on the insulating layer, where the reference layer 32 is an insulating layer, and the reference retaining wall 34 is located between two adjacent redundancy color resists 31, so that after manufacturing the redundancy color resist 31, the distance between the redundancy color resist 31 and the reference retaining wall 34 may be measured, so as to know the offset D of the offset of the position of the redundancy color resist 31 disposed on the insulating layer, and thus the offset of the color resist block of the display area 1 may be obtained.
It should be noted that, in order to make the arrangement of the reference retaining wall 34 not to increase the thickness of the array substrate, the height of the reference retaining wall 34 in the thickness direction Z of the substrate 10 may be set to be the same as the thickness of the redundant color resistor 31, so that the distance between the reference retaining wall 34 and the side edge 311 of the redundant color resistor 31 is conveniently measured, and the thickness of the array substrate is not increased.
Example III
Referring to fig. 11, a third embodiment of the present application provides a display panel, which includes the array substrate 100, the color film substrate 200, and the liquid crystal layer 300 in any of the above embodiments; the color film substrate 200 and the array substrate 100 are arranged in a box-to-box manner, and the liquid crystal layer 300 is arranged between the color film substrate 200 and the array substrate 100.
The detailed structure of the array substrate 100 can refer to the above embodiments, and will not be described herein again; it can be understood that, since the array substrate 100 is used in the display panel of the present application, embodiments of the display panel of the present application include all the technical solutions of all the embodiments of the array substrate 100, and can achieve the technical effects achieved by the technical solutions.
Example IV
Referring to fig. 12, a fourth embodiment of the present application provides a display device, including a display panel according to any of the above embodiments and a backlight module 400 disposed at one side of the display panel.
The backlight module 400 includes a light guide plate 401, a light source assembly 402 and an optical film 403, and the backlight module 400 is used for providing illumination for a liquid crystal display panel.
In application, the display device may be various electronic apparatuses or the display device may be applied to various electronic apparatuses.
For example, the electronic device may be a desktop computer, a notebook computer, a smart phone, a tablet computer, an electronic reader, a vehicle-mounted computer, a navigator, a digital camera, a smart television, a smart wearable device, or other various types of electronic devices. The display device provided by the fourth embodiment of the application has a very wide application prospect.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (9)
1. An array substrate, comprising a substrate (10), wherein the substrate (10) comprises a display area (1) and a measurement area (3) positioned at the periphery of the display area (1), and the array substrate is characterized in that the display area (1) is provided with a plurality of color resistors arranged along a first direction, one of any two adjacent columns of the color resistors extends to the measurement area (3) along a second direction, so as to form redundant color resistors (31) in the measurement area (3); the first direction and the second direction are perpendicular to each other;
the measurement zone (3) is further provided with a reference mark configured to determine an offset of the redundant color resistor (31) in the first direction relative to the reference mark;
each redundant color resistor (31) is provided with a color resistor hole (312), and the color resistor holes (312) penetrate through the redundant color resistor (31) along the thickness direction of the substrate (10).
2. The array substrate of claim 1, wherein,
the measuring area (3) is provided with a reference layer (32), and the redundant color resistor (31) is positioned on one side of the reference layer (32) away from the substrate base plate (10);
the reference mark is provided on the reference layer (32).
3. The array substrate of claim 2, wherein,
a measuring reference hole (33) penetrating through the reference layer (32) is formed in the reference layer (32), the measuring reference hole (33) comprises two hole edges (332) which are oppositely arranged along the first direction, and the reference mark is the hole edge (332);
the redundant color resistor (31) comprises two side edges (311) which are oppositely arranged along the first direction;
the aperture edge (332) and the side edge (311) are parallel to each other.
4. The array substrate of claim 3, wherein,
in the first direction, the orthographic projection of the measuring reference hole (33) on the substrate (10) is positioned between the orthographic projections of two adjacent redundant color resistors (31) on the substrate (10);
alternatively, the orthographic projection of the measurement reference hole (33) on the substrate (10) is located within the orthographic projection of the redundant color resistor (31) on the substrate (10).
5. The array substrate of claim 3 or 4, wherein,
the reference layer (32) is a metal layer having a signal line (321) extending in the first direction, and the measurement reference hole (33) is provided on the signal line (321).
6. The array substrate of claim 2, wherein,
a reference retaining wall (34) is arranged on one side, far away from the substrate (10), of the reference layer (32), and the reference retaining wall (34) is positioned between two adjacent redundant color resistors (31);
the reference retaining wall (34) comprises two wall edges (341) oppositely arranged along the first direction, and the reference is identified as the wall edges (341).
7. The array substrate of claim 3 or 4, wherein,
the measuring reference hole (33) is a rectangular hole;
and/or, the color resistance hole (312) is a rectangular hole.
8. A display panel, comprising:
the array substrate (100) of any one of claims 1-7;
the color film substrate (200) and the array substrate (100) are arranged in a box-to-box manner;
and the liquid crystal layer (300) is positioned between the color film substrate (200) and the array substrate (100).
9. A display device comprising the display panel of claim 8 and a backlight module (400) disposed on one side of the display panel.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211012791.0A CN115291446B (en) | 2022-08-23 | 2022-08-23 | Array substrate, display panel and display device |
| PCT/CN2022/142462 WO2024040832A1 (en) | 2022-08-23 | 2022-12-27 | Array substrate, display panel, and display apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202211012791.0A CN115291446B (en) | 2022-08-23 | 2022-08-23 | Array substrate, display panel and display device |
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| CN115291446A CN115291446A (en) | 2022-11-04 |
| CN115291446B true CN115291446B (en) | 2023-08-11 |
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| CN202211012791.0A Active CN115291446B (en) | 2022-08-23 | 2022-08-23 | Array substrate, display panel and display device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105487333A (en) * | 2016-01-04 | 2016-04-13 | 重庆京东方光电科技有限公司 | Mask group, color film substrate and manufacturing method therefor, detection apparatus, and display apparatus |
| CN110716359A (en) * | 2019-10-14 | 2020-01-21 | 深圳市华星光电技术有限公司 | Array substrate, manufacturing method thereof and alignment precision detection method |
| CN111650789A (en) * | 2020-04-29 | 2020-09-11 | 深圳市华星光电半导体显示技术有限公司 | Display panel and electronic device |
| CN113031359A (en) * | 2021-03-23 | 2021-06-25 | 滁州惠科光电科技有限公司 | COA type array substrate, measuring method thereof and liquid crystal display panel |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107678200B (en) * | 2017-10-26 | 2021-03-30 | 惠科股份有限公司 | Display panel |
| KR20210037788A (en) * | 2019-09-27 | 2021-04-07 | 한국전자통신연구원 | Display device |
| CN115291446B (en) * | 2022-08-23 | 2023-08-11 | 惠科股份有限公司 | Array substrate, display panel and display device |
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- 2022-12-27 WO PCT/CN2022/142462 patent/WO2024040832A1/en unknown
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105487333A (en) * | 2016-01-04 | 2016-04-13 | 重庆京东方光电科技有限公司 | Mask group, color film substrate and manufacturing method therefor, detection apparatus, and display apparatus |
| CN110716359A (en) * | 2019-10-14 | 2020-01-21 | 深圳市华星光电技术有限公司 | Array substrate, manufacturing method thereof and alignment precision detection method |
| CN111650789A (en) * | 2020-04-29 | 2020-09-11 | 深圳市华星光电半导体显示技术有限公司 | Display panel and electronic device |
| CN113031359A (en) * | 2021-03-23 | 2021-06-25 | 滁州惠科光电科技有限公司 | COA type array substrate, measuring method thereof and liquid crystal display panel |
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| WO2024040832A1 (en) | 2024-02-29 |
| CN115291446A (en) | 2022-11-04 |
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