CN111934540B - Charge pump voltage stabilizing circuit, voltage stabilizing method and nonvolatile memory - Google Patents
Charge pump voltage stabilizing circuit, voltage stabilizing method and nonvolatile memory Download PDFInfo
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- CN111934540B CN111934540B CN201910394942.5A CN201910394942A CN111934540B CN 111934540 B CN111934540 B CN 111934540B CN 201910394942 A CN201910394942 A CN 201910394942A CN 111934540 B CN111934540 B CN 111934540B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
Abstract
The invention discloses a charge pump voltage stabilizing circuit, a voltage stabilizing method and a nonvolatile memory, comprising the following steps: the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module; and the transistor module is used for providing a load voltage through the energy storage element and outputting the load voltage to a load if the output voltage is greater than the set voltage. In the embodiment of the invention, if the output voltage is greater than the preset voltage, the energy storage capacitor provides the load voltage to be output to the load, so that the load voltage is not influenced by the fluctuation of the output voltage, and the ripple amplitude of the load voltage is reduced.
Description
Technical Field
The embodiment of the invention relates to the technical field of integrated circuits, in particular to a charge pump voltage stabilizing circuit, a voltage stabilizing method and a nonvolatile memory.
Background
The charge pump is a dc-dc converter, which uses a capacitor as an energy storage element to generate an output voltage larger than an input voltage or generate a negative output voltage. The instability of the output voltage affects the reliability of the charge pump, and therefore, the charge pump needs to stabilize the output voltage during operation.
Fig. 1 is a schematic structural diagram of a charge pump voltage stabilizing circuit commonly used in the prior art, and the working principle of the charge pump voltage stabilizing circuit in fig. 1 is as follows: the charge PUMP 101 generates an output voltage VOUT to supply energy to the load 103, and the output voltage VOUT is divided by a resistor R1 and a resistor R2 to generate a feedback voltage VFB, the feedback voltage VFB is compared with a reference voltage VREF by a comparator 102, a control signal PUMP _ EN is outputted and transmitted to an oscillator 104, the oscillator 104 generates a clock signal according to the control signal PUMP _ EN and transmits the clock signal to the charge PUMP 101 to drive the charge PUMP 101 to generate the output voltage VOUT. The capacitor C1 is used to keep the output voltage VOUT stable.
When the feedback voltage VFB is lower than the reference voltage VREF, the comparator 102 compares the output high level signal to control the output voltage VOUT of the charge pump 101 to rise, and since a certain time is required for the output voltage VOUT to be fed back to the feedback voltage VFB due to a change in the output voltage VOUT, the output voltage VOUT is already higher than the target value when the feedback voltage VFB is equal to the reference voltage VREF. And both the comparator 102 and the oscillator 104 have a delay time, during which the oscillator 104 outputs several more clock signals to drive the charge pump 101 to make the output voltage VOUT higher than the target value. Also, because the variation in the output voltage VOUT cannot be immediately fed back to the feedback voltage VFB and the delay time of the comparator 102 and the oscillator 104 exists, the output voltage VOUT may fall below the target value before the charge pump 101 is driven to start operating. The delay time on the loop of the charge pump system causes the output voltage VOUT to have a certain ripple, and the magnitude of the delay time determines the magnitude of the ripple of the output voltage, so that the delay time is not suitable for applications requiring high voltage precision.
Disclosure of Invention
The invention provides a charge pump voltage stabilizing circuit, a voltage stabilizing method and a nonvolatile memory, which are used for reducing the ripple amplitude of voltage output to a load.
In a first aspect, an embodiment of the present invention provides a charge pump voltage stabilizing circuit, including: a charge pump module and a transistor module; wherein the content of the first and second substances,
the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module;
and the transistor module is used for providing a load voltage through an energy storage element and outputting the load voltage to a load if the output voltage is greater than a set voltage. .
In a second aspect, an embodiment of the present invention further provides a method for stabilizing voltage of a charge pump, including
The charge pump module generates output voltage according to the collected feedback voltage and outputs the output voltage to the transistor module;
and if the output voltage of the transistor module is greater than the set voltage, providing a load voltage through an energy storage element, and outputting the load voltage to a load.
In a third aspect, an embodiment of the present invention further provides a nonvolatile memory, where the nonvolatile memory includes the charge pump voltage stabilizing circuit as described in the first aspect. .
The charge pump voltage stabilizing circuit, the voltage stabilizing method and the nonvolatile memory provided by the embodiment of the invention comprise the following steps: the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module; and the transistor module is used for providing a load voltage through the energy storage element and outputting the load voltage to a load if the output voltage is greater than the set voltage. In the embodiment of the invention, if the output voltage is greater than the preset voltage, the energy storage capacitor provides the load voltage to be output to the load, so that the load voltage is not influenced by the fluctuation of the output voltage, and the ripple amplitude of the load voltage is reduced.
Drawings
FIG. 1 is a schematic diagram of a conventional charge pump voltage regulator circuit in the prior art;
FIG. 2 is a schematic diagram of a charge pump voltage regulator circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a topology of a charge pump voltage regulator circuit according to an embodiment of the invention;
FIG. 4 is a schematic diagram of another topology of a charge pump voltage regulator circuit according to an embodiment of the present invention;
FIG. 5 is a timing diagram of signals in a charge pump voltage regulator circuit according to one embodiment of the present invention;
fig. 6 is a flowchart of a voltage stabilizing method of a charge pump according to a second embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 2 is a schematic structural diagram of a charge pump voltage regulator circuit according to an embodiment of the present invention, which is applicable to a case of stabilizing a load voltage.
As shown in fig. 2, the charge pump voltage stabilizing circuit provided in the embodiment of the present invention mainly includes the following components: a charge pump module 210 and a transistor module 220.
Specifically, the charge pump module 210 is connected to the transistor module 220, and configured to generate an output voltage according to the collected feedback voltage and output the output voltage to the transistor module 220; and the transistor module 220 is configured to provide a load voltage through the energy storage element and output the load voltage to the load if the output voltage is greater than the set voltage.
First, it should be noted that a non-volatile memory (nor Flash/nand Flash) is a common memory chip, and has the advantages of a random access memory and a read only memory, and data is not lost when power is lost, and is a memory capable of being electrically erased and written in a system. Flash memories are composed of thousands of memory cells, each storing one bit of data, and the data storage operation is performed by applying corresponding voltages to the word lines of the memory cells, all of which are typically generated by charge pump circuits.
In the present embodiment, the charge pump module 210 can be understood as generating an output voltage higher than the input voltage, or generating a negative output voltage to the load to provide a suitable supply voltage for the load. In this embodiment, the load is preferably a word line of the memory cell. It should be noted that, in this embodiment, only the function of the charge pump module 210 is described, the topology and the device type of the charge pump module 210 are not limited, and a suitable charge pump circuit may be provided according to actual conditions. Further, the charge pump module 210 may be any one of a switching regulator boost pump, a non-regulation capacitive charge pump, and a regulation capacitive charge pump.
It should be noted that the feedback voltage is generated according to the output voltage of the charge pump module, and the feedback voltage and the output voltage have a linear relationship, that is, the output voltage increases, the feedback voltage increases according to a preset proportion, the output voltage decreases, and the feedback voltage decreases according to the preset proportion.
The embodiment of the invention provides a charge pump voltage stabilizing circuit, which comprises: the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module; and the transistor module is used for providing a load voltage through the energy storage element and outputting the load voltage to a load if the output voltage is greater than the set voltage. In the embodiment of the invention, if the output voltage is greater than the preset voltage, the energy storage capacitor provides the load voltage to be output to the load, so that the load voltage is not influenced by the fluctuation of the output voltage, and the ripple amplitude of the load voltage is reduced.
Fig. 3 is a schematic diagram of a topology of a charge pump voltage regulator circuit according to an embodiment of the invention, and as shown in fig. 3, the transistor module 220 includes: first transistor M1, first switch S1, and first capacitor C1: a first end of the first transistor M1 is connected to the first switch S1 and the first capacitor C1, respectively, a second end of the first transistor M1 is connected to the output end of the charge pump module 210, and a third end of the first transistor M1 is connected to the load; the other end of the first switch S1 is connected to the output terminal of the charge pump module 210.
Further, the charge pump module 210 includes: a first control unit 211, a first charge pump unit 212, a second control unit 213, and a second charge pump unit 214; the first control unit 211 is connected to the first charge pump unit 212 and the second control unit 213, respectively, and configured to generate a first control signal according to the collected first feedback voltage, and output the first control signal to the first charge pump unit 212; the second control unit 213, connected to the second charge pump unit 214, is configured to generate a second control signal according to the collected second feedback voltage after receiving the enable signal, and output the second control signal to the first charge pump unit 212 and the second charge pump unit 214; a first charge pump unit 212 connected to the second charge pump unit 214, for controlling the operating state of the first charge pump unit 212 according to the first control signal and the second control signal to generate a first output voltage; the second charge pump unit 214 is configured to control an operating state of the second charge pump unit 214 according to a second control signal to generate a second output voltage.
It should be noted that in the process of initially establishing the output voltage, the output voltage is generated after the first charge pump unit 212 and the second charge pump unit 214 are connected in parallel. The first output voltage generated by the first charge pump unit 212 and the second output voltage generated by the second charge pump unit 214 together constitute an output voltage. The first control unit 211 collects the output voltage, generates a first feedback voltage, and is used for controlling the first charge pump unit 212 to generate a first output voltage; the second control unit 213 collects the output voltage and generates a second feedback voltage for controlling the second charge pump unit 214 to generate a second output voltage. It should be noted that, only in the process of initially establishing the output voltage, the first charge pump unit 212 and the second charge pump unit 214 work in parallel, which can speed up the process of establishing the output voltage and shorten the time of establishing the output voltage. After the output voltage is built up, the second charge pump unit 214 is turned off, the second output voltage is no longer generated, and only the first charge pump unit 212 generates the output voltage.
Further, the first control unit 212 is specifically configured to compare the acquired first feedback voltage with a preset voltage after receiving the trigger signal, and generate a high-level first control signal if the first feedback voltage is greater than the preset voltage.
Further, the first control unit 211 includes: a second transistor M2, a second capacitor C2, a first resistor string 2111 and a first comparator COMP 1; a first end of the second transistor M2 is connected to one end of the second capacitor C2, a second end of the second transistor M2 is connected to the output end of the first charge pump unit 212, and a third end of the second transistor M2 is connected to the first end of the first resistor string 2111; a second end of the first resistor string 2111 is connected to a first input end of a first comparator COMP 1; an output terminal of the first comparator COMP1 and the first charge pump unit 212.
Further, the second control unit 213 includes: a third transistor M3, a second switch S2, a second resistor string 2131, and a second comparator COMP 2; a first terminal and a second terminal of the third transistor M3 are respectively connected to the output terminal of the second charge pump unit 214, and a third terminal of the third transistor M3 is connected to the first terminal of the second switch S2; a second terminal of the second switch S2 is connected to a first terminal of the second resistor string 2131; a second end of the second resistor string 2131 is connected to a first input end of a second comparator COMP 2; the output terminal of the second comparator COMP2 is connected to the first charge pump unit 212 and the second charge pump unit 214, respectively. When the charge pump system is powered on, the enable signal EN with a high level triggers the second comparator COMP2 to start; the enable signal EN of the high level controls the first switch S1 and the second switch S2 to be closed. The enable signal EN at a high level obtains the enable signal ENB at a low level through the inverter NOT, the enable signal ENB at the low level triggers the first comparator COMP1 to turn off, and the first comparator COMP1 outputs the first control signal PUMP _ EN at a low level.
After the second comparator COMP2 starts to operate, the second feedback voltage VFB1 collected by the third resistor R3 and the fourth resistor R4 is smaller than the reference voltage VREF, the second comparator COMP2 outputs the second control signal PUMP _ EN1 with a high level, the second control signal PUMP _ EN1 with a high level triggers the second oscillator OSC2 to start to operate, and further drives the second charge PUMP2 to start, so that the output voltage VOUT starts to rise, and at the same time, the second control signal PUMP _ EN1 with a high level generates a high level signal through the second OR gate OR2 to trigger the first oscillator OSC1 to start to operate, and further drives the first charge PUMP1 to start, so that the output voltage VOUT starts to rise.
As the output voltage VOUT increases, the third voltage VOUT3 increases, causing the second feedback voltage VFB1 to increase. The third voltage VOUT3 satisfies the following equation: when VOUT3 becomes (VREF × (R3+ R4)/R4), the second feedback voltage VFB1 rises to be equal to the reference voltage VREF. The second comparator COMP2 outputs the second control signal PUMP _ EN1 at a low level to trigger the second oscillator OSC2 to stop operating, so that the second charge PUMP2 stops operating, at this time, the output voltage VOUT is (VREF × (R3+ R4)/R4+ VTH _ M3), the load voltage VOUT1 is equal to the third voltage VOUT3, and VOUT1 ═ VOUT3 is (VREF × (R3+ R4)/R4). The proportion of the third resistor R3 to the fourth resistor R4 is the same as the proportion of the first resistor R1 to the second resistor R2.
After the charge PUMP system is powered on, the enable signal EN at a high level jumps to a low level, the enable signal EN at the low level triggers the second comparator COMP2 to turn off, and the second comparator COMP2 outputs the second control signal PUMP _ EN1 at the low level, so that the second charge PUMP2 stops working.
The enable signal EN at a low level obtains an enable signal ENB at a high level through the inverter NOT, the enable signal ENB at the high level triggers the first comparator COMP1 to start, the first resistor R1 and the second resistor R2 collect the second voltage VOUT2 to generate the first feedback voltage VFB, when the first feedback voltage VFB rises to the reference voltage VREF, the first comparator COMP1 generates the first control signal PUMP _ EN at a low level, and the first control signal PUMP _ EN at the low level controls the first charge PUMP PUMP1 to stop working. When the first feedback voltage VFB drops to the reference voltage VREF, the first comparator COMP1 generates the first control signal PUMP _ EN with a high level, and the first control signal PUMP _ EN with a high level controls the first charge PUMP1 to start operating.
Meanwhile, the enable signal EN at a low level controls the first switch S1 to be turned off, the gate voltage VG is turned off from the output terminal of the charge pump module 210, at this time, due to the energy storage effect of the first capacitor C1, the gate voltage VG is maintained stable, and further the load voltage VOUT1 is maintained stable, so that the load voltage VOUT1 changes along with the gate voltage VG without being affected by the output voltage VOUT, and therefore, the ripple of the load voltage VOUT1 is very small.
Due to the fact that the first transistor M1 is added between the output voltage VOUT and the load voltage VOUT1, considering that the threshold value of the first transistor M1 is influenced by temperature and process, the second transistor M2 and the third transistor M3 are added between the two sampling resistor strings of the output voltage VOUT and are used for offsetting the threshold voltage of the first transistor M1, and the load voltage VOUT1 is basically equal to the second voltage VOUT2 and the third voltage VOUT 3.
Fig. 4 is a schematic topology of another charge pump voltage stabilizing circuit according to an embodiment of the present invention, and as shown in fig. 4, on the basis of the above embodiment, a counting module 230 is added to the optimized charge pump voltage stabilizing circuit, and the counting module 230 is connected to the first control unit and is configured to generate a switching signal according to the first control signal to control the first switch S1 to be turned on or off.
Further, the counting module 230 includes: a counter count and a first OR gate OR 1; the counter count is respectively connected to the first control unit 211 and the first OR gate OR1, and is configured to count the occurrence number of high-level signals of the first control signal, generate a count signal if the occurrence number reaches a set number, and output the count signal to the first OR gate OR 1; and a first OR gate OR1 connected to the control terminal of the first switch S1, for generating a switch signal to control the first switch S1 to be turned on OR off according to the count signal and the first control signal.
When the charge pump system is powered on, the enable signal EN of high level passes through the first OR gate OR1 to generate the switching signal RST of high level, and the switching signal RST of high level controls the first switch S1 to be closed. The enable signal EN of high level triggers the second comparator COMP2 to start. The enable signal EN at a high level gets the enable signal ENB at a low level through the inverter NOT, and the enable signal ENB at the low level triggers the first comparator COMP1 to turn off.
After the second comparator COMP2 starts to operate, the second feedback voltage VFB1 collected by the third resistor R3 and the fourth resistor R4 is smaller than the reference voltage VREF, the second comparator COMP2 outputs the second control signal PUMP _ EN1 with a high level, the second control signal PUMP _ EN1 with a high level triggers the second oscillator OSC2 to start to operate, and further drives the second charge PUMP2 to start, so that the output voltage VOUT starts to rise, and at the same time, the second control signal PUMP _ EN1 with a high level generates a high level signal through the second OR gate OR2 to trigger the first oscillator OSC1 to start to operate, and further drives the first charge PUMP1 to start, so that the output voltage VOUT starts to rise.
After the charge pump system is powered on, the enable signal EN at the high level jumps to the low level, the count signal CNT _ EN at the low level and the enable signal EN at the low level generate the switch signal RST at the low level, the switch signal RST at the low level controls the first switch S1 to be turned off, and the output voltage VOUT has a slight leakage current to a load, so that the output voltage VOUT decreases.
When the first feedback voltage VFB decreases to be equal to the reference voltage VREF, the first control signal PUMP _ EN output by the first comparator COMP1 is a high-level signal, the counter count is used to count the occurrence frequency of the first control signal PUMP _ EN being a high-level signal, and if the occurrence frequency reaches the set frequency, the count signal CNT _ EN of the high level is generated. The count signal CNT _ EN is input to the first OR gate OR1, outputs the high-level switching signal RST, and controls the first switch S1 to be closed by the high-level second trigger signal RST. The gate voltage VG drops a little due to leakage of the first capacitor C1, and thus the load voltage VOUT1 drops a little. At this time, the first comparator COMP1 outputs the first control signal PUMP _ EN as a high level signal, triggering the first oscillator OSC1 to start up, and further driving the first charge PUMP1 to start up, so that the help gate voltage VG and the output voltage VOUT are restored to the target values. Then, the first comparator COMP1 outputs the first control signal PUMP _ EN as a low level signal, and the counter counts to enable the first OR gate OR1 to output the low level switching signal RST, so as to control the first switch S1 to be turned off, and this is repeated to keep the load voltage VOUT1 stable.
FIG. 5 is a timing diagram of signals in a charge pump voltage regulator circuit according to an embodiment of the present invention. Because the first capacitor C1 has a small leakage, the voltage of the gate voltage VG of the first transistor slowly decreases, the load voltage VOUT1 decreases with the gate voltage VG, the counter count is set to count four times the rising edge of the first control signal PUMP _ EN to generate the high-level count signal CNT _ EN, thereby generating the high-level switch signal RST, the gate voltage VG is connected to the output voltage VOUT, the gate voltage VG pulls the output voltage VOUT down instantaneously, the first control signal PUMP _ EN is compared by the first comparator COMP1 to generate the high-level first control signal PUMP _ EN, the high-level first control signal PUMP _ EN turns on the first comparator COMP1 to assist the gate voltage VG and the output voltage VOUT to recover, after reaching the target value, the low-level first control signal PUMP _ EN is generated, and the counter generates the low-level count signal CNT _ EN to further generate the low-level switch signal RST, the low-level switch signal RST 1 is controlled to be turned off by the low-level switch signal RST, at this time, the gate voltage VG of the first transistor is gradually decreased, and the load voltage VOUT1 is decreased following the gate voltage VG, and the previous timing is repeated.
Because the charge pump helps the gate voltage VG to recover and consume power, the counting times of the counter can be designed according to the actual leakage condition of the first capacitor C1, if the leakage of the first capacitor C1 is very small, the gate voltage VG drops very slowly, the counting times of the counter can be increased, the fluctuation frequency of the load voltage is reduced, and the stability of the load voltage is improved.
On the basis of the above embodiments, an embodiment of the present invention further provides a nonvolatile memory, which includes the charge pump voltage regulator circuit as described in any of the above embodiments.
The nonvolatile memory provided by the embodiment of the invention can comprise the charge pump voltage stabilizing circuit provided by any embodiment of the invention, and has the corresponding functional module and the beneficial effect of executing the charge pump voltage stabilizing circuit.
Example two
Fig. 6 is a flowchart of a voltage stabilizing method of a charge pump according to a second embodiment of the present invention, which is applicable to the case of stabilizing the output voltage of a charge pump circuit, and the voltage stabilizing method of the charge pump is performed by the voltage stabilizing circuit of the charge pump according to the second embodiment of the present invention, and is generally configured in a nonvolatile memory.
As shown in fig. 6, the method for stabilizing voltage of a charge pump according to the embodiment of the present invention mainly includes the following steps:
s610, the charge pump module generates output voltage according to the collected feedback voltage and outputs the output voltage to the transistor module;
and S620, if the output voltage of the transistor module is greater than the set voltage, providing a load voltage through an energy storage element, and outputting the load voltage to a load.
The voltage stabilizing method of the charge pump provided by the embodiment of the invention comprises the following steps: the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module; and the transistor module is used for providing a load voltage through the energy storage element and outputting the load voltage to a load if the output voltage is greater than the set voltage. In the embodiment of the invention, if the output voltage is greater than the preset voltage, the energy storage capacitor provides the load voltage to be output to the load, so that the load voltage is not influenced by the fluctuation of the output voltage, and the ripple amplitude of the load voltage is reduced.
Further, the transistor module includes: first transistor, first switch and first capacitance: a first end of the first transistor is connected with the first switch and the first capacitor respectively, a second end of the first transistor is connected with an output end of the charge pump module, and a third end of the first transistor is connected with the load; the other end of the first switch is connected with the output end of the charge pump module.
Further, the charge pump module generates an output voltage according to the collected feedback voltage and outputs the output voltage to the transistor module, and includes:
the first control unit generates a first control signal according to the collected first feedback voltage and outputs the first control signal to the first charge pump unit;
after receiving an enable signal, the second control unit generates a second control signal according to the collected second feedback voltage, and outputs the second control signal to the first charge pump unit and the second charge pump unit;
the first charge pump unit controls the working state of the first charge pump unit according to the first control signal and the second control signal so as to generate a first output voltage;
and the second charge pump unit controls the working state of the second charge pump unit according to the second control signal so as to generate a second output voltage.
Specifically, the first control unit generates a first control signal according to the collected first feedback voltage, and includes:
after receiving the trigger signal, the first control unit compares the acquired first feedback voltage with the preset voltage, and if the first feedback voltage is greater than the preset voltage, a high-level first control signal is generated.
Further, the first control unit includes: the circuit comprises a second transistor, a second capacitor, a first resistor string and a first comparator; wherein the content of the first and second substances,
a first end of the second transistor is connected with one end of the second capacitor, a second end of the second transistor is connected with an output end of the first charge pump unit, and a third end of the second transistor is connected with a first end of the first resistor string; the second end of the first resistor string is connected with the first input end of the first comparator; the output end of the first comparator is connected with the first charge pump unit.
Further, the second control unit includes: the first resistor string comprises a first transistor, a first switch, a first resistor string and a first comparator; wherein the content of the first and second substances,
a first end and a second end of the third transistor are respectively connected with the output end of the second charge pump unit, and a third end of the third transistor is connected with a first end of the second switch; a second end of the second switch is connected with a first end of the second resistor string; a second end of the second resistor string is connected with a first input end of the second comparator; the output end of the second comparator is respectively connected with the first charge pump unit and the second charge pump unit.
Further, the method further comprises:
the counting module generates a switch signal according to the first control signal so as to control the on or off of the first switch.
Specifically, the counting module generates a switch signal according to a first control signal to control the on/off of the first switch, and includes:
counting the occurrence frequency of a first control signal which is a high-level signal by a counter, if the occurrence frequency reaches a set frequency, generating a counting signal, and outputting the counting signal to the first OR gate circuit;
the first OR gate circuit generates a switch signal according to the counting signal and the first control signal so as to control the first switch to be switched on or switched off.
The voltage stabilizing method of the charge pump provided by the embodiment of the invention is executed by the voltage stabilizing circuit of the charge pump provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the voltage stabilizing circuit of the charge pump.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (8)
1. A charge pump voltage regulator circuit, comprising: a charge pump module and a transistor module;
wherein the content of the first and second substances,
the charge pump module is connected with the transistor module and used for generating output voltage according to the collected feedback voltage and outputting the output voltage to the transistor module;
the transistor module is used for providing a load voltage through an energy storage element and outputting the load voltage to a load if the output voltage is greater than a set voltage;
the transistor module includes: a first transistor, a first switch, and a first capacitor; wherein the content of the first and second substances,
a first end of the first transistor is connected with the first switch and the first capacitor respectively, a second end of the first transistor is connected with an output end of the charge pump module, and a third end of the first transistor is connected with the load;
the other end of the first switch is connected with the output end of the charge pump module;
the charge pump module includes: the charge pump comprises a first control unit, a first charge pump unit, a second control unit and a second charge pump unit; wherein the content of the first and second substances,
the first control unit is respectively connected with the first charge pump unit and the second control unit, generates a first control signal according to the collected first feedback voltage, and outputs the first control signal to the first charge pump unit;
the second control unit is connected with the second charge pump unit and used for generating a second control signal according to the collected second feedback voltage after receiving the enabling signal and outputting the second control signal to the first charge pump unit and the second charge pump unit;
the first charge pump unit is connected with the second charge pump unit, and controls the working state of the first charge pump unit according to the first control signal and the second control signal so as to generate a first output voltage;
and the second charge pump unit controls the working state of the second charge pump unit according to the second control signal so as to generate a second output voltage.
2. The charge pump voltage regulator circuit of claim 1, wherein the first control unit is specifically configured to compare the collected first feedback voltage with a preset voltage after receiving the trigger signal, and generate the first control signal with a high level if the first feedback voltage is greater than the preset voltage.
3. The charge pump voltage regulation circuit of claim 1, wherein the first control unit comprises: the circuit comprises a second transistor, a second capacitor, a first resistor string and a first comparator; wherein the content of the first and second substances,
a first end of the second transistor is connected with one end of the second capacitor, a second end of the second transistor is connected with an output end of the first charge pump unit, and a third end of the second transistor is connected with a first end of the first resistor string;
the second end of the first resistor string is connected with the first input end of the first comparator;
the output end of the first comparator is connected with the first charge pump unit.
4. The charge pump voltage regulation circuit of claim 2, wherein the second control unit comprises: the first resistor string comprises a first transistor, a first switch, a first resistor string and a first comparator; wherein the content of the first and second substances,
a first end and a second end of the third transistor are respectively connected with the output end of the second charge pump unit, and a third end of the third transistor is connected with a first end of the second switch;
a second end of the second switch is connected with a first end of the second resistor string;
a second end of the second resistor string is connected with a first input end of the second comparator;
the output end of the second comparator is respectively connected with the first charge pump unit and the second charge pump unit.
5. The charge pump voltage regulation circuit of claim 1, further comprising: a counting module for counting the number of the data blocks,
the counting module is connected with the first control unit and used for generating a switch signal according to a first control signal so as to control the on/off of the first switch.
6. The charge pump voltage regulator circuit of claim 5, wherein the counting module comprises: a counter and a first OR gate circuit; wherein the content of the first and second substances,
the counter is respectively connected with the first control unit and the first OR gate circuit and is used for counting the occurrence frequency of a first control signal which is a high level signal, generating a counting signal if the occurrence frequency reaches a set frequency and outputting the counting signal to the first OR gate circuit;
and the first OR gate circuit is connected with the control end of the first switch and used for generating a switch signal according to the counting signal and the first control signal so as to control the on or off of the first switch.
7. A method for stabilizing voltage of a charge pump, comprising:
the charge pump module generates output voltage according to the collected feedback voltage and outputs the output voltage to the transistor module;
the transistor module is used for providing load voltage through an energy storage element and outputting the load voltage to a load if the output voltage is greater than a set voltage;
the transistor module includes: a first transistor, a first switch, and a first capacitor; a first end of the first transistor is connected with the first switch and the first capacitor respectively, a second end of the first transistor is connected with an output end of the charge pump module, and a third end of the first transistor is connected with the load; the other end of the first switch is connected with the output end of the charge pump module;
the charge pump module generates an output voltage according to the collected feedback voltage and outputs the output voltage to the transistor module, and comprises:
the first control unit generates a first control signal according to the collected first feedback voltage and outputs the first control signal to the first charge pump unit;
after receiving an enable signal, the second control unit generates a second control signal according to the collected second feedback voltage, and outputs the second control signal to the first charge pump unit and the second charge pump unit;
controlling the working state of the first charge pump unit according to the first control signal and the second control signal to generate a first output voltage;
controlling the working state of the second charge pump unit according to the second control signal to generate a second output voltage;
the method for stabilizing the voltage of the charge pump uses the charge pump voltage stabilizing circuit as claimed in claim 1.
8. A non-volatile memory comprising the charge pump voltage regulation circuit of any one of claims 1 to 6.
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| CN101674009A (en) * | 2008-09-10 | 2010-03-17 | 中芯国际集成电路制造(上海)有限公司 | Charge pump output voltage regulation circuit |
| CN108491020A (en) * | 2018-06-08 | 2018-09-04 | 长江存储科技有限责任公司 | Low-dropout regulator and flash memory |
| CN208351364U (en) * | 2018-07-12 | 2019-01-08 | 上海艾为电子技术股份有限公司 | A kind of linear voltage-stabilizing circuit |
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| JP2004320862A (en) * | 2003-04-14 | 2004-11-11 | Ricoh Co Ltd | Dc-dc converter |
| CN101620449A (en) * | 2008-06-30 | 2010-01-06 | 力晶半导体股份有限公司 | Voltage stabilizing device and flash memory |
| CN101674009A (en) * | 2008-09-10 | 2010-03-17 | 中芯国际集成电路制造(上海)有限公司 | Charge pump output voltage regulation circuit |
| CN108491020A (en) * | 2018-06-08 | 2018-09-04 | 长江存储科技有限责任公司 | Low-dropout regulator and flash memory |
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Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Patentee after: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. Patentee before: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. |