CN111916541A - Light emitting diode epitaxial wafer and preparation method thereof - Google Patents

Light emitting diode epitaxial wafer and preparation method thereof Download PDF

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Publication number
CN111916541A
CN111916541A CN202010742008.0A CN202010742008A CN111916541A CN 111916541 A CN111916541 A CN 111916541A CN 202010742008 A CN202010742008 A CN 202010742008A CN 111916541 A CN111916541 A CN 111916541A
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layer
light emitting
ingan well
gan barrier
thickness
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胡任浩
丁杰
陆香花
胡加辉
李鹏
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
    • H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

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Abstract

The disclosure provides a light emitting diode epitaxial wafer and a preparation method thereof, and belongs to the technical field of light emitting diodes. The light-emitting layer includes a first composite layer and a second composite layer sequentially stacked on the n-type GaN layer. The first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately laminated, and the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately laminated. The thickness of the second InGaN well layer is smaller than that of the first InGaN well layer, and the thickness of the second GaN barrier layer is smaller than that of the first GaN barrier layer. The second composite layer plays a role in stress release, the stress in the first composite layer can be partially transferred to the second composite layer to be released when the second composite layer grows, the stress accumulated by the whole light emitting layer is reduced, the degree of inclination of the piezoelectric polarization effect and the energy bands of the InGaN well layer and the GaN barrier layer is reduced, and the light emitting efficiency of the light emitting diode is improved.

Description

Light emitting diode epitaxial wafer and preparation method thereof
Technical Field
The disclosure relates to the technical field of light emitting diodes, and particularly relates to a light emitting diode epitaxial wafer and a preparation method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor Diode that can convert electrical energy into Light energy. The LED has the advantages of high efficiency, energy conservation and environmental protection, and has wide application in the fields of traffic indication, outdoor full-color display and the like. The light emitting diode epitaxial wafer is a basic structure for preparing the light emitting diode. The light emitting diode epitaxial wafer generally comprises a substrate and an epitaxial layer grown on the substrate, wherein the epitaxial layer at least comprises a buffer layer, an n-type GaN layer, a light emitting layer and a p-type GaN layer which are sequentially stacked on the substrate. The light emitting layer generally includes InGaN well layers and GaN barrier layers stacked alternately, and both electrons in the n-type GaN layer and holes in the p-type GaN layer migrate into the InGaN well layers under the action of current to perform composite light emission.
Due to the fact that large lattice mismatch exists between the InGaN well layer and the GaN barrier layer, corresponding stress is generated between the InGaN well layer and the GaN barrier layer due to the lattice mismatch between the InGaN well layer and the GaN barrier layer, corresponding strain is generated between unit cells of the InGaN well layer and unit cells of the GaN barrier layer due to the stress, the distance between a positive center and a negative center, where the unit cells of the InGaN well layer and the unit cells of the GaN barrier layer do not coincide, is further increased, and a piezoelectric polarization effect is generated. The energy bands of the InGaN well layer and the GaN barrier layer are inclined due to the piezoelectric polarization effect, the overlapping amount of the wave functions of the combination of electrons and holes is reduced, the light emitting efficiency of the light emitting diode is reduced, and the light emitting peak of the light emitting diode has a relatively serious red shift condition. When the light emitting diode is used, the inclination degree of the energy bands of the InGaN well layer and the GaN barrier layer changes along with the increase of the current density, and the light emitting peak of the light emitting diode has a blue shift during light emitting, so that the problem of impure color development occurs when the light emitting diode is used.
Disclosure of Invention
The embodiment of the disclosure provides an epitaxial wafer of a light emitting diode and a preparation method thereof, which can reduce the energy band inclination of an InGaN well layer and a GaN barrier layer and reduce the blue shift of a light emitting peak of the light emitting diode in use. The technical scheme is as follows:
the light emitting diode epitaxial wafer comprises a substrate and an epitaxial layer laminated on the substrate, wherein the epitaxial layer comprises a buffer layer, an n-type GaN layer, a light emitting layer and a p-type GaN layer which are sequentially laminated on the substrate,
the light emitting layer comprises a first composite layer and a second composite layer which are sequentially stacked on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately stacked, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately stacked, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer.
Optionally, a ratio of the thickness of the second InGaN well layer to the thickness of the first InGaN well layer is 0.1 to 0.3, and a ratio of the thickness of the second GaN barrier layer to the thickness of the first GaN barrier layer is 0.1 to 0.3.
Optionally, the thicknesses of the plurality of second GaN barrier layers gradually decrease in the growth direction of the second composite layer.
Optionally, a ratio of the thickness of the second InGaN well layer to the thickness of the second GaN barrier layer is 0.1 to 0.3.
Optionally, the thickness of the second InGaN well layer is 10 to 30nm, and the thickness of the second GaN barrier layer is 20 to 60 nm.
The embodiment of the disclosure provides a preparation method of a light emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
growing a buffer layer on the substrate,
growing an n-type GaN layer on the buffer layer;
growing a light emitting layer on the n-type GaN layer,
the light emitting layer comprises a first composite layer and a second composite layer which are sequentially laminated on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately laminated, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately laminated, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer;
and growing a p-type GaN layer on the light emitting layer.
Optionally, when the second InGaN well layer is grown, the gas environment in the reaction chamber is a mixed gas environment including nitrogen and ammonia, and when the second GaN barrier layer is grown, the gas environment in the reaction chamber is a mixed gas environment including nitrogen, ammonia, and hydrogen.
Optionally, when the second InGaN well layer is grown, the ratio of nitrogen to ammonia in the gas environment in the reaction chamber is 0.8 to 1.3, when the second GaN barrier layer is grown, the ratio of nitrogen to ammonia in the gas environment in the reaction chamber is 0.8 to 1.3, and the ratio of ammonia to hydrogen in the gas environment in the reaction chamber is 2 to 5.
Optionally, the growth temperature of the second InGaN well layer is 750-850 ℃, and the growth temperature of the second GaN barrier layer is 850-950 ℃.
Optionally, when the second InGaN well layer is grown, an In source of 2000-4000 sccm, a Ga source of 100-500 sccm, and an N source of 150000-300000 sccm are respectively introduced into the reaction chamber, when the second GaN barrier layer is grown, a Ga source of 1000-3000 sccm and an N source of 150000-300000 sccm are respectively introduced into the reaction chamber, the growth time of the second InGaN well layer is 120-420 s, and the growth time of the second GaN barrier layer is 120-420 s.
The beneficial effects brought by the technical scheme provided by the embodiment of the disclosure include:
when growing a light emitting layer in the light emitting diode epitaxial wafer, the light emitting layer is arranged to include a first composite layer and a second composite layer which are sequentially laminated on the n-type GaN layer. The first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately laminated, and the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately laminated. The thickness of the second InGaN well layer is smaller than that of the first InGaN well layer, and the thickness of the second GaN barrier layer is smaller than that of the first GaN barrier layer. The growth state changes relative to the first composite layer, the second composite layer with the well barrier thickness smaller than that of the well barrier in the first composite layer is used as the basis for electron and hole composite luminescence, and meanwhile, the stress accumulated in the growth process of the first composite layer can be released, the stress in the first composite layer can be partially transferred to the second composite layer for releasing when the second composite layer grows, the stress accumulated in the whole luminescent layer is reduced, and the piezoelectric polarization effect finally caused by the stress is reduced. Therefore, the degree of the inclination of the energy bands of the InGaN well layer and the GaN barrier layer caused by the piezoelectric polarization effect is reduced, and the light emitting efficiency of the light emitting diode is improved. With the increase of the current density, the inclination degree of the energy bands of the InGaN well layer and the GaN barrier layer is slightly changed, the blue shift condition generated when the light emitting peak of the light emitting diode emits light is weak, and the possibility of impure color development of the light emitting diode in use is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 3 is a flowchart of a light emitting diode epitaxial wafer and a method for manufacturing the same according to an embodiment of the present disclosure;
fig. 4 is a flowchart of another light emitting diode epitaxial wafer and a manufacturing method thereof according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 1, the led epitaxial wafer includes a substrate 1 and an epitaxial layer 2 stacked on the substrate 1, and the epitaxial layer 2 includes a buffer layer 21, an n-type GaN layer 22, a light-emitting layer 23, and a p-type GaN layer 24 sequentially stacked on the substrate 1.
The light emitting layer 23 includes a first composite layer 231 and a second composite layer 232 sequentially stacked on the n-type GaN layer 22, the first composite layer 231 includes a plurality of first InGaN well layers 2311 and first GaN barrier layers 2312 which are alternately stacked, the second composite layer 232 includes a plurality of second InGaN well layers 2321 and second GaN barrier layers 2322 which are alternately stacked, the thickness of the second InGaN well layers 2321 is smaller than that of the first InGaN well layers 2311, and the thickness of the second GaN barrier layers 2322 is smaller than that of the first GaN barrier layers 2312.
In growing the light emitting layer 23 in the light emitting diode epitaxial wafer, the light emitting layer 23 is provided to include a first composite layer 231 and a second composite layer 232 sequentially stacked on the n-type GaN layer 22. The first composite layer 231 includes a plurality of first InGaN well layers 2311 and first GaN barrier layers 2312 alternately stacked, and the second composite layer 232 includes a plurality of second InGaN well layers 2321 and second GaN barrier layers 2322 alternately stacked. The thickness of the second InGaN well layer 2321 is smaller than that of the first InGaN well layer 2311, and the thickness of the second GaN barrier layer 2322 is smaller than that of the first GaN barrier layer 2312. The second composite layer 232 with the growth state changed relative to the first composite layer 231 and the well barrier thickness smaller than that of the well barrier in the first composite layer 231 is used as a basis for electron and hole recombination light emission, and simultaneously, the stress accumulated in the growth process of the first composite layer 231 can be released, the stress in the first composite layer 231 can be partially transferred to the second composite layer 232 to be released when the second composite layer 232 grows, the stress accumulated in the whole light emitting layer 23 is reduced, and the piezoelectric polarization effect finally caused by the stress is reduced. Therefore, the degree of the inclination of the energy bands of the InGaN well layer and the GaN barrier layer caused by the piezoelectric polarization effect is reduced, and the light emitting efficiency of the light emitting diode is improved. With the increase of the current density, the inclination degree of the energy bands of the InGaN well layer and the GaN barrier layer is slightly changed, the blue shift condition generated when the light emitting peak of the light emitting diode emits light is weak, and the possibility of impure color development of the light emitting diode in use is reduced.
For example, in the first composite layer 231, the first InGaN well layer 2311 may be grown to a thickness of 2 to 3nm, and the first GaN barrier layer 2312 may be grown to a thickness of 9 to 20 nm.
Optionally, the ratio of the thickness of the second InGaN well layer 2321 to the thickness of the first InGaN well layer 2311 may be 0.1 to 0.3, and the ratio of the thickness of the second GaN barrier layer 2322 to the thickness of the first GaN barrier layer 2312 may be 0.1 to 0.3. At this time, the second composite layer 232 can release the stress in the first composite layer 231 more effectively, and the quality of the obtained light emitting layer 23 is better.
For example, the ratio of the thickness of the second InGaN well layer 2321 to the thickness of the second GaN barrier layer 2322 may be 0.1 to 0.3.
When the ratio of the thickness of the second InGaN well layer 2321 to the thickness of the second GaN barrier layer 2322 is within the above range, the second composite light emitting layer 23 can effectively capture electrons and holes to perform composite light emission, and the overall light emitting efficiency of the light emitting layer 23 is not affected.
Optionally, the thickness of the second InGaN well layer 2321 may be 10 to 30nm, and the thickness of the second GaN barrier layer 2322 may be 20 to 60 nm.
When the thickness of the second InGaN well layer 2321 and the thickness of the second GaN barrier layer 2322 are set within the above ranges, the effect of the second composite layer 232 in releasing stress is good, and the whole second composite layer 232 can also maintain a certain light emitting efficiency, so that the whole light emitting efficiency of the light emitting layer 23 is not excessively affected.
Illustratively, the thickness of the plurality of second GaN barrier layers 2322 may be gradually reduced in the growth direction of the second composite layer 232.
The thicknesses of the second GaN barrier layers 2322 may be gradually reduced, so that the second composite layer 232 may reduce the total proportion in the light-emitting layer 23 while the second composite layer 232 plays a role of stress release, so that holes and electrons are mainly concentrated in the first composite layer 231 to perform composite light-emitting, thereby improving the overall light-emitting efficiency of the light-emitting layer 23.
Alternatively, while the thickness of the plurality of second GaN barrier layers 2322 is gradually reduced in the growth direction of the second composite layer 232, the thickness of the plurality of second InGaN well layers 2321 may be kept constant. The resulting second composite layer 232 can effectively emit light while reducing the volume fraction of the second composite layer 232.
In one implementation provided by the present disclosure, the growth thickness of the first InGaN well layer 2311 may be 2.5nm, the growth thickness of the first GaN barrier layer 2312 may be 15nm, the thickness of the second InGaN well layer 2321 may be 2m, and the thickness of the second GaN barrier layer 2322 may be 10 nm. The light-emitting layer 23 obtained has high overall light-emitting efficiency.
Fig. 2 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as can be seen from fig. 2, in another implementation manner provided by the present disclosure, the light emitting diode epitaxial wafer may include a substrate 11 and an epitaxial layer 2 grown on the substrate 1, where the epitaxial layer 2 includes a buffer layer 21, an undoped GaN layer 25, an n-type GaN layer 22, a stress release layer 26, a light emitting layer 23, an electron blocking layer 27, a p-type GaN layer 24, and a p-type contact layer 28, which are sequentially stacked on the substrate 1.
Note that the structure of the light-emitting layer 23 shown in fig. 2 is the same as the structure of the light-emitting layer 23 shown in fig. 1, and details thereof are omitted.
Alternatively, the substrate 11 may be a sapphire substrate 1. Easy to manufacture and obtain.
Illustratively, the buffer layer 21 may be a low-temperature GaN buffer layer 21. The crystal quality of the epitaxial thin film grown on the low-temperature buffer layer 21 can be ensured.
Alternatively, the thickness of the buffer layer 21 may be 10 to 30 nm. The lattice mismatch between the n-type GaN layer 22 and the substrate 1 can be reduced, and the growth quality of the epitaxial layer 2 is ensured.
Illustratively, the thickness of the undoped GaN layer 25 may be 1 to 3.5 μm. The quality of the obtained light emitting diode epitaxial wafer is good.
In one implementation provided by the present disclosure, the thickness of the undoped GaN layer 25 may also be 1 μm. The present disclosure is not so limited.
Alternatively, the doping element of the n-type GaN layer 22 may be Si, and the doping concentration of the Si element may be 1 × 1018～1×1019cm-3. The overall quality of the n-type GaN layer 22 is good.
Illustratively, the thickness of the n-type GaN layer 22 may be 2-3 μm. The obtained n-type GaN layer 22 has good quality as a whole.
In one implementation provided by the present disclosure, the thickness of the n-type GaN layer 22 may be 2 μm. The present disclosure is not so limited.
Alternatively, the stress relieving layer 26 may include a plurality of InGaN layers 261 and GaN layers 262 alternately stacked. The InGaN layer 261 may have a thickness of 2nm and the GaN layer 262 may have a thickness of 30 nm.
The stress release layer 26 can release the stress accumulated by the growth of the n-type GaN layer 22 before the growth of the light emitting layer 23, so that the stress accumulated by the growth of the n-type GaN layer 22 during the growth of the light emitting layer 23 can not enter the light emitting layer 23, and the light emitting quality of the light emitting layer 23 can be ensured. The InGaN layer 261 may have a thickness of 2nm and the GaN layer 262 may have a thickness of 30nm, and may also be effective in stress relief.
Alternatively, the electron blocking layer 27 may be Mg-doped AlyGa1-yN layers, wherein y ranges from 0.15 to 0.25. The effect of blocking electrons is better.
Illustratively, the electron blocking layer 27 may have a thickness of 30 to 50 nm. The quality of the epitaxial layer 22 as a whole is good.
Optionally, the p-type GaN layer 24 can be doped with Mg, and the thickness of the p-type GaN layer 24 can be 50-80 nm. The obtained p-type GaN layer 24 has good quality as a whole.
Illustratively, the p-type contact layer 28 may be 15nm thick.
It should be noted that, in the epitaxial wafer structure shown in fig. 2, compared to the epitaxial wafer structure shown in fig. 1, an undoped GaN layer 25 for relieving lattice mismatch is added between the buffer layer 21 and the n-type GaN layer 22, a stress release layer 26 for releasing stress is added between the n-type GaN layer 22 and the light emitting layer 23, and an electron blocking layer 27 for blocking electrons from overflowing from the light emitting layer 23 into the p-type GaN layer 24 is added between the light emitting layer 23 and the p-type GaN layer 24. A p-type contact layer 28 is also grown on the p-type GaN layer 24. The obtained epitaxial wafer has better quality and luminous efficiency.
Fig. 3 is a flowchart of a light emitting diode epitaxial wafer and a method for manufacturing the same according to an embodiment of the present disclosure, and as shown in fig. 3, the method for manufacturing the light emitting diode epitaxial wafer includes:
s101: a substrate is provided.
S102: a buffer layer is grown on the substrate,
s103: and growing an n-type GaN layer on the buffer layer.
S104: and growing a light emitting layer on the n-type GaN layer.
The light emitting layer comprises a first composite layer and a second composite layer which are sequentially stacked on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately stacked, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately stacked, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer.
S105: and growing a p-type GaN layer on the light emitting layer.
The technical effect of the method shown in fig. 3 can be referred to the technical effect of the light emitting diode epitaxial wafer in fig. 1, and therefore, the technical effect of the method shown in fig. 3 is not described again here. The structure of the light emitting diode epitaxial wafer grown according to the method in fig. 3 can also refer to the structure of the light emitting diode epitaxial wafer shown in fig. 1.
Fig. 4 is a flowchart of another light emitting diode epitaxial wafer and a manufacturing method thereof according to an embodiment of the present disclosure, and as shown in fig. 4, the manufacturing method of the light emitting diode epitaxial wafer includes:
s201: a substrate is provided.
Wherein the substrate may be a sapphire substrate. Easy to realize and manufacture.
Optionally, step S201 may further include: and treating the surface of the substrate for growing the epitaxial layer for 5-6 min in a hydrogen atmosphere.
For example, when the substrate is processed for growing the surface of the epitaxial layer, the temperature of the reaction chamber may be 1000-1100 ℃, and the pressure of the reaction chamber may be 200-500 torr.
In one implementation provided by the present disclosure, the temperature of the reaction chamber may be 1050 ℃ when processing the surface of the substrate for growing the epitaxial layer. The effect of treating the substrate is better.
S202: a buffer layer is grown on a substrate.
Alternatively, the buffer layer may be a GaN buffer layer.
The thickness of the buffer layer may be 25 nm.
Illustratively, the growth temperature of the non-doped GaN layer can be 540 ℃, and the growth pressure can be controlled within 200-600 torr. The obtained undoped GaN layer has better quality.
S203: and growing an undoped GaN layer on the buffer layer.
Illustratively, the growth temperature of the non-doped GaN layer can be 1000-1100 ℃, and the growth pressure is controlled within 200-600 torr. The obtained undoped GaN layer has better quality.
In one implementation provided by the present disclosure, the growth temperature of the undoped GaN layer may be 1040 ℃.
S204: and growing an n-type GaN layer on the undoped GaN layer.
Alternatively, the growth temperature of the n-type GaN layer may be 1000 to 1100 ℃, and the growth pressure of the n-type GaN layer may be 200 to 600 Torr.
Optionally, the thickness of the n-type GaN layer can be 2-3 um.
S205: and growing a stress release layer on the n-type GaN layer.
Alternatively, the stress relieving layer may include a plurality of InGaN layers and GaN layers alternately stacked.
The growth temperature of the InGaN layer can be 760-780 ℃, and the growth temperature of the GaN barrier layer can be 860-890 ℃.
The growth pressure of both the InGaN layer and the GaN layer may be 300 Torr.
S206: and growing a light emitting layer on the stress release layer.
The light emitting layer comprises a first composite layer and a second composite layer which are sequentially stacked on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately stacked, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately stacked, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer.
Optionally, the growth temperature of the first InGaN well layer may be 760-780 ℃ and the growth temperature of the first GaN barrier layer may be 860-890 ℃. The quality of the luminescent layer grown under the condition is good, and the luminous efficiency of the light-emitting diode can be ensured.
Optionally, the growth temperature of the second InGaN well layer is 750-850 ℃, and the growth temperature of the second GaN barrier layer is 850-950 ℃.
When the growth temperature of the second InGaN well layer is 750-850 ℃ and the growth temperature of the second GaN barrier layer is 850-950 ℃, the obtained second composite layer has good quality, and meanwhile, the second composite layer can effectively release stress accumulated by the first composite layer.
For example, when the second InGaN well layer is grown, the gas atmosphere in the reaction chamber may be a mixed gas atmosphere including nitrogen and ammonia, and when the second GaN barrier layer is grown, the gas atmosphere in the reaction chamber may be a mixed gas atmosphere including nitrogen, ammonia, and hydrogen.
When the second InGaN well layer grows, the gas environment does not contain hydrogen, when the second GaN barrier layer grows, the gas environment In the reaction cavity contains hydrogen, the hydrogen can prevent In atoms from permeating into the second GaN barrier layer, the crystal quality of the second GaN barrier layer is guaranteed, the heat transfer efficiency of the hydrogen is good, the growth temperature of the second GaN barrier layer can be improved quickly and uniformly, and the growth quality of the second GaN barrier layer is improved.
Optionally, when the second InGaN well layer is grown, the ratio of nitrogen to ammonia in the gas environment in the reaction chamber is 0.8 to 1.3, when the second GaN barrier layer is grown, the ratio of nitrogen to ammonia in the gas environment in the reaction chamber is 0.8 to 1.3, and the ratio of ammonia to hydrogen in the gas environment in the reaction chamber is 2 to 5.
Illustratively, when the second InGaN well layer grows, an In source of 2000-4000 sccm, a Ga source of 100-500 sccm and an N source of 150000-300000 sccm are respectively introduced into the reaction chamber, when the second GaN barrier layer grows, a Ga source of 1000-3000 sccm and an N source of 150000-300000 sccm are respectively introduced into the reaction chamber, the growth time of the second InGaN well layer is 120-420 s, and the growth time of the second GaN barrier layer is 120-420 s.
Under the growth conditions of the flow rate and the time, the growth quality of the second composite layer can be better, and enough time is provided for fully releasing the stress accumulated by the first composite layer in the growth process of the second composite layer.
In an implementation manner provided by the public, the number of layers of the first InGaN well layer and the first GaN barrier layer can be both 7, and the number of layers of the second InGaN well layer and the number of layers of the second GaN barrier layer can be both 3. A light emitting layer with good quality can be obtained.
S207: an electron blocking layer is grown on the light emitting layer.
Alternatively, the electron blocking layer may be Mg-doped AlyGa1-yN layers, wherein y ranges from 0.15 to 0.25. The effect of blocking electrons is better.
The electron blocking layer may be grown to a thickness of 80 nm.
The growth temperature of the electron blocking layer can be 930-970 ℃, and the growth pressure of the electron blocking layer can be 100 Torr. The quality of the electron blocking layer grown under the condition is good, and the improvement of the luminous efficiency of the light-emitting diode is facilitated.
S208: and growing a p-type GaN layer on the electron blocking layer.
Alternatively, the growth pressure of the p-type GaN layer may be 200 to 600Torr, and the growth temperature of the p-type GaN layer may be 940 to 980 ℃.
Alternatively, the thickness of the p-type GaN layer may be 0.2 um.
S209: and growing a p-type contact layer on the p-type GaN layer.
It should be noted that the light emitting diode epitaxial wafer and the method for manufacturing the same shown in fig. 4 further describe the growth process of the light emitting layer relative to the method for manufacturing the light emitting diode shown in fig. 3, and provide a more detailed growth method of the light emitting diode epitaxial wafer.
The structure of the light emitting diode epitaxial wafer after the step S209 is performed can be seen in fig. 2.
It should be noted that, in the embodiments of the present disclosure, a VeecoK465iorC4 orrbmcvd (metalorganic chemical vapor deposition) apparatus is used to implement the growth method of the LED. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2Mixed gas ofAs carrier gas, high purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant.
The above description is intended to be exemplary only and not to limit the present disclosure, and any modification, equivalent replacement, or improvement made without departing from the spirit and scope of the present disclosure is to be considered as the same as the present disclosure.

Claims (10)

1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate and an epitaxial layer laminated on the substrate, wherein the epitaxial layer comprises a buffer layer, an n-type GaN layer, a light-emitting layer and a p-type GaN layer which are sequentially laminated on the substrate,
the light emitting layer comprises a first composite layer and a second composite layer which are sequentially stacked on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately stacked, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately stacked, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer.
2. The light emitting diode epitaxial wafer of claim 1, wherein a ratio of a thickness of the second InGaN well layer to a thickness of the first InGaN well layer is 0.1-0.3, and a ratio of a thickness of the second GaN barrier layer to a thickness of the first GaN barrier layer is 0.1-0.3.
3. The light-emitting diode epitaxial wafer according to claim 1, wherein the plurality of second GaN barrier layers are gradually reduced in thickness in the growth direction of the second composite layer.
4. The light emitting diode epitaxial wafer of claim 3, wherein the ratio of the thickness of the second InGaN well layer to the thickness of the second GaN barrier layer is 0.1-0.3.
5. The light emitting diode epitaxial wafer and the manufacturing method thereof according to any one of claims 1 to 4, wherein the thickness of the second InGaN well layer is 10 to 30nm, and the thickness of the second GaN barrier layer is 20 to 60 nm.
6. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing a buffer layer on the substrate,
growing an n-type GaN layer on the buffer layer;
growing a light emitting layer on the n-type GaN layer,
the light emitting layer comprises a first composite layer and a second composite layer which are sequentially laminated on the n-type GaN layer, the first composite layer comprises a plurality of first InGaN well layers and first GaN barrier layers which are alternately laminated, the second composite layer comprises a plurality of second InGaN well layers and second GaN barrier layers which are alternately laminated, the thickness of each second InGaN well layer is smaller than that of each first InGaN well layer, and the thickness of each second GaN barrier layer is smaller than that of each first GaN barrier layer;
and growing a p-type GaN layer on the light emitting layer.
7. The method according to claim 6, wherein a gas atmosphere in a reaction chamber during growth of the second InGaN well layer is a mixed gas atmosphere containing nitrogen and ammonia, and wherein a gas atmosphere in the reaction chamber during growth of the second GaN barrier layer is a mixed gas atmosphere containing nitrogen, ammonia, and hydrogen.
8. The method according to claim 7, wherein a ratio of nitrogen to ammonia in a gas environment in the reaction chamber is 0.8 to 1.3 when the second InGaN well layer is grown, a ratio of nitrogen to ammonia in a gas environment in the reaction chamber is 0.8 to 1.3 when the second GaN barrier layer is grown, and a ratio of ammonia to hydrogen in a gas environment in the reaction chamber is 2 to 5.
9. The method according to any one of claims 6 to 8, wherein the growth temperature of the second InGaN well layer is 750 to 850 ℃, and the growth temperature of the second GaN barrier layer is 850 to 950 ℃.
10. The method according to any one of claims 6 to 8, wherein 2000 to 4000sccm of In source, 100to 500sccm of Ga source, and 150000 to 300000sccm of N source are respectively introduced into the reaction chamber during the growth of the second InGaN barrier layer, 1000 to 3000sccm of Ga source, and 150000 to 300000sccm of N source are respectively introduced into the reaction chamber during the growth of the second GaN barrier layer, the growth time of the second InGaN well layer is 120 to 420s, and the growth time of the second GaN barrier layer is 120 to 420 s.
CN202010742008.0A 2020-07-29 2020-07-29 Light emitting diode epitaxial wafer and preparation method thereof Pending CN111916541A (en)

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