CN111897209B - Millimeter wave chip gain high-low temperature self-adaptive bias structure and method - Google Patents
Millimeter wave chip gain high-low temperature self-adaptive bias structure and method Download PDFInfo
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- CN111897209B CN111897209B CN202010424287.6A CN202010424287A CN111897209B CN 111897209 B CN111897209 B CN 111897209B CN 202010424287 A CN202010424287 A CN 202010424287A CN 111897209 B CN111897209 B CN 111897209B
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Abstract
The invention discloses a millimeter wave chip gain high-low temperature self-adaptive biasing structure and a method, which comprises a first partial circuit (100) formed by band gap reference, a second partial circuit (200) formed by a multi-output current mirror copying zero temperature reference current, a third partial circuit (300) formed by a multi-output current mirror copying positive temperature reference current, and a fourth partial circuit (400) formed by a current type digital-to-analog converter adjusting the zero temperature reference current proportion, the circuit comprises a fifth part circuit (500) consisting of a current type digital-to-analog converter for adjusting the proportion of positive temperature reference current, a sixth part circuit (600) consisting of a multi-output current mirror, a seventh part circuit (700) consisting of a current type digital-to-analog converter for controlling the size of mixed reference current, an eighth part circuit (800) consisting of a current-current type amplifier and a ninth part circuit (900) consisting of a millimeter wave transistor biasing module. Through the structure, the invention can be suitable for the CMOS process and has the high-low temperature gain self-adaptive function and high flexibility of the millimeter wave chip.
Description
Technical Field
The invention relates to the field of electronic circuit design, in particular to a millimeter wave chip gain high-low temperature self-adaptive bias structure and a method.
Background
In recent years, 5G communication technology has been rapidly developed, and high requirements are made on channel capacity and data transmission rate. Due to the abundant spectrum resources of the high-frequency band above 6GHz, most of 5G networks are deployed in the high-frequency band or the millimeter wave band. Meanwhile, a great deal of research and commercial research is conducted on the 5G millimeter wave system on chip, and these efforts have led to the maturity of millimeter wave chip technology. The short wavelength nature of the millimeter-wave band makes it possible to integrate one or more antennas with a transceiver, thereby avoiding the need for expensive millimeter-wave packaging and electrostatic discharge protection devices. Meanwhile, the beam forming technology can effectively improve the link performance, thereby compensating the adverse effect of the radiation effect brought by the on-chip antenna.
The bias circuit is one of the key parts in the design of the millimeter wave chip and realizes corresponding performance indexes by controlling the direct current operating point of each radio frequency transistor. In order to realize millimeter wave communication and large-scale commercial high-performance radar, a millimeter wave chip is required to have higher robustness and better high-low temperature performance. The bias circuit is critical to achieving this goal. The existing CMOS processes differ from bipolar transistors in that the MOSFETs parameters vary widely from wafer to wafer and from batch to batch, although the technology has advanced over decades, and large variability of CMOS circuit parameters, especially threshold voltage, still exists; meanwhile, the metal loss in the CMOS process is obviously increased along with the rise of the temperature, and the high-temperature and low-temperature stability of the circuit gain is influenced. These two points present challenges to the design of the bias circuit. The traditional millimeter wave chip bias generating circuit mainly has two types of voltage bias and current bias. The voltage bias structure is simple, the power consumption is extremely low, but due to the influence of parasitic resistance in the chip and process errors, the radio frequency performance of different radio frequency channels and different chips is greatly inconsistent; the current bias overcomes the inconsistency, but since metal losses vary with temperature, the radio frequency performance, especially the gain, is greatly biased at high and low temperatures compared to its behavior at normal temperature. Therefore, the existing millimeter wave chip biasing circuit structure is difficult to meet the requirements of future large-scale 5G communication and high-performance radar commercial application on chip robustness and high and low temperature performance.
Radio frequency integrated circuits, particularly millimeter wave integrated circuits, typically employ high-electron mobility transistor (HEMT) monolithic-integrated-circuit (monolithic-microwave) processes, such as gallium nitride (GaN) and gallium arsenide (GaAs) processes, but they are relatively expensive; in addition, they cannot be integrated with CMOS digital integrated circuits, resulting in the inability of phase shifters employing these processes to integrate control logic circuits. In the civil markets of 5G mobile communication, automobile radar and the like in the future, the requirements on small volume and low cost are higher. Therefore, for large-scale commercial application of millimeter wave chips, attention needs to be paid to a novel millimeter wave chip gain high-low temperature adaptive bias structure and method of a silicon device which is excellent in integration level, cost, robustness and the like.
Disclosure of Invention
The invention aims to provide a millimeter wave chip gain high-low temperature self-adaptive biasing structure and a millimeter wave chip gain high-low temperature self-adaptive biasing method, which can be suitable for a CMOS (complementary metal oxide semiconductor) process and have a high-low temperature gain self-adaptive function and high flexibility.
In order to solve the technical problems, the invention adopts a technical scheme that: the millimeter wave chip gain high-low temperature self-adaptive bias structure comprises a first partial circuit (100) formed by a band gap reference, wherein the output end of the first partial circuit (100) formed by the band gap reference is respectively connected with a second partial circuit (200) formed by a multi-output current mirror copying zero-temperature reference current and a third partial circuit (300) formed by a multi-output current mirror copying positive temperature reference current, the output end of the second partial circuit (200) formed by the multi-output current mirror copying zero-temperature reference current is connected with a fourth partial circuit (400) formed by a current type digital-to-analog converter adjusting the zero-temperature reference current ratio, the output end of the third partial circuit (300) formed by the multi-output current mirror copying positive temperature reference current is connected with a fifth partial circuit (500) formed by a current type digital-to-analog converter adjusting the positive temperature reference current ratio, the fourth part (400) formed by the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) formed by the current type digital-to-analog converter for adjusting the positive temperature reference current proportion are connected in parallel and then connected with the sixth part (600) formed by a multi-output current mirror, and the output end of the sixth part (600) formed by the multi-output current mirror is connected with the seventh part (700) formed by the current type digital-to-analog converter for controlling the mixed reference current, the eighth part (800) formed by the current-current type amplifier and the ninth part (900) formed by the millimeter wave transistor biasing module.
Further, the first part (100) of the bandgap reference provides zero temperature I at the same timeZ1And positive temperature IP1Two reference currents.
Furthermore, the input end of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current is connected with the zero-temperature reference current output end I of the first partial circuit (100)Z1The output end is M zero-temperature reference current output ports IZ2.1——IZ2.M。
Further, the number M of output current ports of the second partial circuit (200) which is formed by a multi-output current mirror copying the zero temperature reference current is determined according to the number of temperature coefficients required by the actual millimeter wave circuit.
Further, the fourth part of circuit (400) is a current type digital-to-analog converter, and the output end of the current type digital-to-analog converter is a zero-temperature reference current output port IZ4The input end of the first partial circuit (200) is connected with the output current port I of the second partial circuitZ2，1And the control word Z is connected with an external digital control signal.
Furthermore, the structure of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current and the structure of the third partial circuit (300) formed by the multi-output current mirror copying the positive-temperature reference current are the same; and/or the fourth part (400) consisting of the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) consisting of the current type digital-to-analog converter for adjusting the positive-temperature reference current proportion have the same structure.
Further, the control word P of the fifth partial circuit (500) and the control word Z of the fourth partial circuit (400) have the same number of bits, and the result of bitwise XOR is a full 1 sequence.
Furthermore, the sixth partial circuit (600) is a multi-output current mirror, and the input end of the multi-output current mirror is connected with the output current I of the fourth (400) and fifth (500) partial circuitsZ4And IP5Parallel mixed reference current IT5The number of output currents N depends on the number of channels of the actual chip.
Furthermore, the seventh part circuit (700) is a current-mode digital-to-analog converter, and the output end of the seventh part circuit is a mixed reference current output port IT7The input end of the first partial circuit is connected with an output current port I of the sixth partial circuit (600)T6.1And the control word T is connected with an external digital control signal.
Furthermore, the eighth sub-circuit (800) is a current-current type amplifier, and the input terminal is connected to the output current terminal I of the seventh sub-circuit (700)T7The output end of the output port is a mixed bias current output port IT8。
Furthermore, the ninth part of the circuit (900) is composed of a first N-type transistor (901), a second N-type transistor (904), a first capacitor (902) and a first resistor (903), wherein the gate and the drain of the first N-type transistor (901) are connected, the source of the first N-type transistor is grounded, the upper plate of the first capacitor (902) is connected with the gate of the first N-type transistor (901), the lower plate of the first capacitor (902) is grounded, the first resistor (903) is bridged at two ends of the gates of the first N-type transistor (901) and the second N-type transistor (904), the second N-type transistor (904) is a millimeter wave amplifier, the source of the second N-type transistor is grounded, the gate is an input port of a millimeter wave signal, and the drain of the second N-type transistor (904) is an output port.
A millimeter wave chip gain high-low temperature self-adaptive bias method is characterized in that the working principle of a circuit comprises the following steps: comprises a stable working stage and a temperature coefficient adjusting stage, and comprises the following steps:
1) powering on the chip, setting a mixed reference current IT#The temperature coefficient of (a) is a default value;
2) judging whether the temperature is increased at the moment;
3) judging the total gain condition;
4) judging to reduce or improve the temperature coefficient of the mixed reference current;
5) and jumping back to the step 2) to automatically stabilize the gain.
Further, when the working temperature of the chip in the step 2) rises, the metal loss in the chip rises, so that the overall gain of the millimeter wave chip is reduced, and meanwhile, the mixed reference current automatically increases according to a set temperature coefficient; as the mixed reference current is increased, the intrinsic gain of the radio frequency transistor is increased, and the overall gain of the chip is improved; when the working temperature of the chip in the step 2) is reduced, the metal loss in the chip is reduced, so that the overall gain of the millimeter wave chip is increased, and meanwhile, the mixed reference current is automatically reduced according to a set temperature coefficient; as the mixed reference current becomes smaller, the intrinsic gain of the radio frequency transistor is reduced, and the overall gain of the chip is reduced.
Further, step 3) judges the magnitude of the total gain of the chip at the moment compared with the normal temperature;
31) if the total gain of the chip is kept unchanged at the normal temperature (25 ℃), the step 2) is carried out to automatically stabilize the gain, and the chip enters a stable working state;
32) if the total gain of the chip changes from the normal temperature (25 ℃), whether the total gain is increased is judged.
Further, in step 32), if the total gain of the chip is increased compared with the normal temperature (25 ℃) and the temperature is increased, manually reducing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced and the temperature is increased compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is increased and the temperature is reduced compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced compared with the normal temperature (25 ℃) and the temperature is reduced, the temperature coefficient of the mixed reference current is manually reduced.
The invention has the beneficial effects that: according to the millimeter wave chip gain high-low temperature self-adaptive biasing structure and method, the zero-temperature reference current and the positive-temperature reference current can be connected in parallel in different proportions to generate the mixed reference current with different temperature coefficients, so that the high-low temperature gain characteristics of different millimeter wave circuit modules are met, and the consistency of the gain characteristics of the chip under different temperature conditions is ensured; and meanwhile, the reference current is used for replacing the reference voltage for biasing, so that good robustness is ensured. Compared with the mixed reference current at normal temperature (25 ℃), the mixed reference current with the temperature coefficient of 0.04%/DEG C to 0.36%/DEG C can be realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a millimeter wave chip gain high and low temperature adaptive bias structure and method according to the present invention;
FIG. 2 is a schematic structural diagram of a millimeter wave chip gain high-low temperature adaptive bias structure and method according to the present invention;
FIG. 3 is a schematic diagram of a 4-bit current-mode DAC of a fourth part of the millimeter-wave chip gain high-low temperature adaptive bias structure and method according to the present invention;
FIG. 4 is a schematic diagram of a 4-bit current-mode DAC of a fourth part of the millimeter-wave chip gain high-low temperature adaptive bias structure and method according to the present invention;
FIG. 5 is a schematic diagram of zero temperature and positive temperature reference current of the bandgap reference of the first circuit part of the millimeter wave chip gain high and low temperature adaptive bias structure and method of the present invention varying with temperature;
fig. 6 is a flowchart of the working principle of the millimeter wave chip gain high and low temperature adaptive bias method of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings. Examples of these preferred embodiments are illustrated in the accompanying drawings. The embodiments of the invention shown in the drawings and described in accordance with the drawings are exemplary only, and the invention is not limited to these embodiments.
It should be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and/or processing steps closely related to the scheme according to the present invention are shown in the drawings, and other details not so relevant to the present invention are omitted.
Also, in the description of the present invention, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, only for convenience of description and simplification of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Referring to fig. 1 to 4, an embodiment of the present invention includes: a millimeter wave chip gain high-low temperature self-adaptive bias structure and a method thereof comprise a first partial circuit (100) formed by a band gap reference, wherein the output end of the first partial circuit (100) formed by the band gap reference is respectively connected with a second partial circuit (200) formed by a multi-output current mirror copying zero temperature reference current and a third partial circuit (300) formed by a multi-output current mirror copying positive temperature reference current, the output end of the second partial circuit (200) formed by the multi-output current mirror copying zero temperature reference current is connected with a fourth portion (400) formed by a current type digital-to-analog converter adjusting the zero temperature reference current proportion, the output end of the third partial circuit (300) formed by the multi-output current mirror copying positive temperature reference current is connected with a fifth partial circuit (500) formed by a current type digital-to-analog converter adjusting the positive temperature reference current proportion, the fourth part (400) formed by the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) formed by the current type digital-to-analog converter for adjusting the positive temperature reference current proportion are connected in parallel and then connected with the sixth part (600) formed by a multi-output current mirror, and the output end of the sixth part (600) formed by the multi-output current mirror is connected with the seventh part (700) formed by the current type digital-to-analog converter for controlling the mixed reference current, the eighth part (800) formed by the current-current type amplifier and the ninth part (900) formed by the millimeter wave transistor biasing module.
Further, the beltThe first part of the circuit (100) is designed as a slot reference and simultaneously provides a zero temperature IZ1And positive temperature IP1Two reference currents.
Furthermore, the input end of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current is connected with the zero-temperature reference current output end I of the first partial circuit (100)Z1The output end is M zero-temperature reference current output ports IZ2.1——IZ2.M。
Furthermore, the number M of output current ports of the second partial circuit (200) formed by the multi-output current mirror copying the zero temperature reference current is determined according to the number of temperature coefficients required by the actual millimeter wave circuit, and can be any positive integer.
Further, the fourth part of circuit (400) is a current type digital-to-analog converter, and the output end of the current type digital-to-analog converter is a zero-temperature reference current output port IZ4The input end of the first partial circuit (200) is connected with the output current port I of the second partial circuitZ2，1And the control word Z is connected with an external digital control signal.
Furthermore, the structure of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current and the structure of the third partial circuit (300) formed by the multi-output current mirror copying the positive-temperature reference current are the same; and/or the fourth part (400) consisting of the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) consisting of the current type digital-to-analog converter for adjusting the positive-temperature reference current proportion have the same structure.
Further, the control word P of the fifth partial circuit (500) and the control word Z of the fourth partial circuit (400) have the same number of bits, and the result of bitwise XOR is a full 1 sequence.
Furthermore, the sixth partial circuit (600) is a multi-output current mirror, and the input end of the multi-output current mirror is connected with the output current I of the fourth (400) and fifth (500) partial circuitsZ4And IP5Parallel mixed reference current IT5The number of output currents N is determined by the number of channels of the actual chip, and may be any positive integer.
Go toStep one, the seventh part circuit (700) is a current type digital-to-analog converter, and the output end of the seventh part circuit is a mixed reference current output port IT7The input end of the first partial circuit is connected with an output current port I of the sixth partial circuit (600)T6.1And the control word T is connected with an external digital control signal.
Furthermore, the eighth sub-circuit (800) is a current-current type amplifier, and the input terminal is connected to the output current terminal I of the seventh sub-circuit (700)T7The output end of the output port is a mixed bias current output port IT8。
Furthermore, the ninth part of the circuit (900) is composed of a first N-type transistor (901), a second N-type transistor (904), a first capacitor (902) and a first resistor (903), wherein the gate and the drain of the first N-type transistor (901) are connected, the source of the first N-type transistor is grounded, the upper plate of the first capacitor (902) is connected with the gate of the first N-type transistor (901), the lower plate of the first capacitor (902) is grounded, the first resistor (903) is bridged at two ends of the gates of the first N-type transistor (901) and the second N-type transistor (904), the second N-type transistor (904) is a millimeter wave amplifier, the source of the second N-type transistor is grounded, the gate is an input port of a millimeter wave signal, and the drain of the second N-type transistor (904) is an output port.
As shown in fig. 5, a millimeter wave chip gain high and low temperature adaptive bias method, the circuit operating principle includes the following steps: comprises a stable working stage and a temperature coefficient adjusting stage, and comprises the following steps:
1) powering on the chip, setting a mixed reference current IT#The temperature coefficient of (a) is a default value;
2) judging whether the temperature is increased at the moment;
3) judging the total gain condition;
4) judging to reduce or improve the temperature coefficient of the mixed reference current;
5) and jumping back to the step 2) to automatically stabilize the gain.
Further, when the working temperature of the chip in the step 2) rises, the metal loss in the chip rises, so that the overall gain of the millimeter wave chip is reduced, and meanwhile, the mixed reference current automatically increases according to a set temperature coefficient; as the mixed reference current is increased, the intrinsic gain of the radio frequency transistor is increased, and the overall gain of the chip is improved; when the working temperature of the chip in the step 2) is reduced, the metal loss in the chip is reduced, so that the overall gain of the millimeter wave chip is increased, and meanwhile, the mixed reference current is automatically reduced according to a set temperature coefficient; as the mixed reference current becomes smaller, the intrinsic gain of the radio frequency transistor is reduced, and the overall gain of the chip is reduced.
Further, step 3) judges the magnitude of the total gain of the chip at the moment compared with the normal temperature;
31) if the total gain of the chip is kept unchanged at the normal temperature (25 ℃), the step 2) is carried out to automatically stabilize the gain, and the chip enters a stable working state;
32) if the total gain of the chip changes from the normal temperature (25 ℃), whether the total gain is increased is judged.
Further, in step 32), if the total gain of the chip is increased compared with the normal temperature (25 ℃) and the temperature is increased, manually reducing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced and the temperature is increased compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is increased and the temperature is reduced compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced compared with the normal temperature (25 ℃) and the temperature is reduced, the temperature coefficient of the mixed reference current is manually reduced.
Example 1
As shown in fig. 1 and fig. 2, a millimeter wave chip gain high and low temperature adaptive bias structure comprises a first partial circuit (100) composed of a band gap reference, wherein the output end of the first partial circuit (100) composed of the band gap reference is respectively connected with a second partial circuit (200) composed of a multi-output current mirror copying a zero temperature reference current and a third partial circuit (300) composed of a multi-output current mirror copying a positive temperature reference current, the output end of the second partial circuit (200) composed of the multi-output current mirror copying the zero temperature reference current is connected with a fourth partial circuit (400) composed of a current type digital-to-analog converter adjusting a zero temperature reference current ratio, the output end of the third partial circuit (300) composed of the multi-output current mirror copying the positive temperature reference current is connected with a fifth partial circuit (500) composed of a current type digital-to-analog converter adjusting a positive temperature reference current ratio, the fourth part (400) formed by the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) formed by the current type digital-to-analog converter for adjusting the positive temperature reference current proportion are connected in parallel and then connected with the sixth part (600) formed by a multi-output current mirror, and the output end of the sixth part (600) formed by the multi-output current mirror is connected with the seventh part (700) formed by the current type digital-to-analog converter for controlling the mixed reference current, the eighth part (800) formed by the current-current type amplifier and the ninth part (900) formed by the millimeter wave transistor biasing module.
The band-gap reference 100 of the invention is designed and finished by adopting the traditional CMOS (complementary metal oxide semiconductor) band-gap technology, and can output two paths of reference currents with zero temperature and positive temperature for generating mixed reference currents with different temperature coefficients later. The zero-temperature reference current in the invention is IZ1With a positive temperature reference current of I, 5uAPThe two reference currents are 5uA (T-25 ℃) multiplied by 1.8 nA/DEG C, and the two reference currents have the same size at normal temperature (25 ℃). It should be noted that the magnitude and the temperature coefficient of the reference current at normal temperature can be determined by actual self-design.
As shown in fig. 2, the second sub-circuit 200 and the third sub-circuit 300 in the present invention are multi-output current mirrors for respectively copying two reference currents of zero temperature and positive temperature, and each of the multi-output current mirrors is composed of four N- type transistors 211, 212, 213, 214 and 6P- type transistors 221, 222, 223, 224, 225, 226. 211. 212, 213, 214 constitute a 1: an N-type current mirror 210 of 1; 221. 222, 223, 224, 225, 226 constitute a 1: 1P-type multiple output current mirror 220. The common- source transistors 211, 212, 221, 222 and 223 have larger device sizes so as to achieve good matching effect and current consistency; the common-gate transistors 213, 214, 224, 225, 226 are smaller in size to save chip area. The cascode structure can effectively inhibit the channel length modulation effect, and meanwhile, an additional biasing circuit is not required to be introduced in a self-biasing mode. The multi-output characteristic can generate various temperaturesThe reference current of degree coefficient satisfies different temperature characteristics of different circuits, and outputs current IZ2.1＝IZ2.M＝IZ1. It should be noted that the number of output current ports of the second sub-circuit 200 and the third sub-circuit 300 should be kept the same, and the number M of ports is determined according to the number of temperature coefficients required by the actual millimeter wave circuit.
As shown in fig. 3, the fourth and fifth sub-circuits 400 and 500 of the present invention are 4-bit current-mode digital-to-analog converters, and respectively adjust the proportional magnitudes of the two reference currents at zero temperature and positive temperature. The circuit consists of three N-type transistors 401, 402, 403 and a 4-bit parallel transistor array, and the unit array unit consists of three N- type transistors 404, 405, 406 and two inverters 407, 408. The bit 0 transistor array is a 1 unit transistor array, and the bit 1, bit 2 and bit 3 transistor arrays are respectively connected in parallel of 2, 4 and 8 unit transistor arrays. The N- type transistors 401, 402, 403 and 404, 405, 406 all adopt a cascode structure, where the N-type transistors 401, 402, 403 are respectively a parallel connection of 15N- type transistors 404, 405, 406. The N-type transistors 401 and 404 are switching transistors, and the gate length thereof is the minimum gate length of the corresponding process, and the gate width is larger, so as to realize smaller on-resistance and faster turn-on speed. Two inverters connected in series are connected to the gate of the N-type transistor 404 as a buffer for the digital control word Z, reducing the rise and fall time of the digital signal due to parasitics. Output current IZ4＝IZ1X (control word Z)D/15。
As shown in FIG. 3, the output current I of the fifth sub-circuit 500 of the present inventionP5＝IP1X (control word P)DAnd/15, the control word P ≦ the control word Z ≦ 1111. The output currents of the fourth partial circuit 400 and the fifth partial circuit 500 are connected in parallel to form a mixed reference current IT5＝IZ4+IP5For different temperature coefficients, the sizes of the millimeter wave circuits are not changed at normal temperature (25 ℃), so that the performance consistency of the millimeter wave circuits under different temperature coefficients is ensured. For example, when the control word P is 1111 and the control word Z is 0000, the reference current I is mixedT5The slope, which becomes larger as the temperature becomes larger, is the largest;when control word P is 0000 and control word Z is 1111, mixing reference current IT5The slope, which becomes larger as the temperature becomes higher, is at minimum 0.
As shown in fig. 2, the sixth sub-circuit 600 of the present invention has the same structure as the P-type multi-output current mirror 220 of the second sub-circuit 200, and the input terminal is connected to the output current I of the fourth 400 and fifth 500 sub-circuitsZ4And IP5Parallel mixed reference current IT5Output current IT6.1＝IT6.N＝IT5。
It should be noted that the number N of output currents may be determined according to the number of channels of an actual chip, and independent mixed reference currents are provided for the same millimeter wave module in different channels.
As shown in fig. 4, the seventh sub-circuit 700 of the present invention is a 6-bit current-mode dac, which has a structure similar to that of the fourth sub-circuit 400, and is composed of three N- type transistors 701, 702, 703 and a 6-bit parallel transistor array, and a unit array unit is the same as the unit array unit of the fourth sub-circuit 400, and is composed of three N- type transistors 704, 705, 706 and two inverters 707 and 708. The bit 0, 1, 2, and 3 transistor arrays are the same as the bit 0, 1, 2, and 3 transistor arrays of the fourth partial circuit 400, and the bit 4 and bit 5 transistor arrays are respectively parallel-connected with 16 and 32 unit transistor arrays. The N- type transistors 701, 702, 703 are parallel connections of 16N- type transistors 704, 705, 706, respectively. Output current IT7＝IT6X (control word T)DAnd/16, independently controlling the magnitude of the mixed reference current of the radio frequency module, and correcting the theoretical deviation.
As shown in fig. 2, the eighth sub-circuit 800 of the present invention is a P-type current mirror, and has a structure similar to that of the sixth sub-circuit 600 of the present invention, and is a cascode structure, and is composed of four P- type transistors 801, 802, 803, and 804. The P- type transistors 801 and 803 are parallel connections of a plurality of P- type transistors 802 and 804 with the same number, respectively. Bias current I of output radio frequency transistorT8Mixed reference current I as inputT7Several times higher than that of the prior art. Amplification of the hybrid reference current produces a greater bias current and thus a higher bias currentBias voltage VGSo as to meet the requirement of high gain of the radio frequency circuit.
As shown in fig. 2, a ninth circuit 900 of the present invention is a bias module of a radio frequency circuit, and is composed of two N- type transistors 901 and 904, a capacitor 902 and a resistor 903. The N-type transistor 901 generates a self-bias voltage in a diode connection manner; the capacitor 902 and the resistor 903 form an R-C low-pass filter to effectively isolate millimeter wave signals and stabilize direct current operating points. The N-type transistor 904 is a radio frequency transistor, and a millimeter wave signal is input from a gate and output from a drain thereof.
It should be noted that the current mirror structure in the present invention may also adopt a common source mode or a voltage saving type connection mode; the current type digital-to-analog converter can also be formed by adopting a P-type transistor, and the corresponding front-back and current mirror structures need to be changed into N-type current mirrors.
FIG. 5 shows the positive temperature I of the bandgap reference 100 of the first circuit part of the present inventionP1And zero temperature IZ1Schematic of reference current versus temperature. The two reference currents are 5uA at 25 deg.C, and zero-temp reference current IZ1Mixed reference current of minimum temperature coefficient, positive temperature reference current IP1The mixed reference current is the maximum temperature coefficient.
Fig. 6 is a flow chart of the working principle of the millimeter wave chip gain high-low temperature adaptive bias method of the present invention, which is as follows:
1. setting mixed reference current I after chip is electrifiedT#The temperature coefficient of (a) is a default value;
2. if the working temperature of the chip rises, the metal loss in the chip rises, so that the overall gain of the millimeter wave chip is reduced, meanwhile, the mixed reference current automatically increases according to the set temperature coefficient, the intrinsic gain of the radio frequency transistor rises, and the overall gain of the chip is improved; if the working temperature is reduced, the metal loss in the chip is reduced, so that the overall gain of the millimeter wave chip is increased, and if the overall gain of the chip is kept unchanged compared with the normal temperature (25 ℃), the temperature coefficient of the chip is correctly set, the gain can be adaptive to temperature change, and the chip enters a stable working state; meanwhile, the mixed reference current is automatically reduced according to a set temperature coefficient, the intrinsic gain of the radio frequency transistor is reduced, the overall gain of the chip is reduced, the temperature coefficient of the chip is correctly set, the gain can be adaptive to temperature change, and the chip enters a stable working state;
3. in the stage of adjusting the temperature coefficient, in a high-temperature state, if the total gain of the chip is increased compared with the normal temperature (25 ℃), the temperature coefficient of the mixed reference current is manually reduced, so that the compensation degree of the intrinsic gain of the transistor on the total gain is reduced; if the total gain of the chip is reduced compared with the normal temperature (25 ℃), the temperature coefficient of the mixed reference current is manually increased, and the compensation degree of the intrinsic gain of the transistor on the total gain is increased; in a low-temperature state, if the total gain of the chip is increased compared with the normal temperature (25 ℃), the temperature coefficient of the mixed reference current is manually increased, so that the compensation degree of the intrinsic gain of the transistor on the total gain is reduced; if the total gain of the chip is reduced compared with the normal temperature (25 ℃), the temperature coefficient of the mixed reference current is manually reduced, and the compensation degree of the intrinsic gain of the transistor to the total gain is improved.
According to the millimeter wave chip gain high-low temperature self-adaptive biasing structure and method, the zero-temperature reference current and the positive-temperature reference current can be connected in parallel in different proportions to generate the mixed reference current with different temperature coefficients, so that the high-low temperature gain characteristics of different millimeter wave circuit modules are met, and the consistency of the gain characteristics of the chip under different temperature conditions is ensured; and meanwhile, the reference current is used for replacing the reference voltage for biasing, so that good robustness is ensured. Compared with the mixed reference current at normal temperature (25 ℃), the mixed reference current with the temperature coefficient of 0.04%/DEG C to 0.36%/DEG C can be realized.
Furthermore, it should be noted that in the present specification, "include" or any other variation thereof is intended to cover a non-exclusive inclusion, so that a process, a method, an article or an apparatus including a series of elements includes not only those elements but also other elements not explicitly listed, or further includes elements inherent to such process, method, article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should take the description as a whole, and the technical solutions in the embodiments may be appropriately combined to form other embodiments understood by those skilled in the art.
Claims (15)
1. The millimeter wave chip gain high-low temperature self-adaptive bias structure is characterized by comprising a first partial circuit (100) formed by a band gap reference, wherein the output end of the first partial circuit (100) formed by the band gap reference is respectively connected with a second partial circuit (200) formed by a multi-output current mirror copying zero-temperature reference current and a third partial circuit (300) formed by a multi-output current mirror copying positive-temperature reference current, the output end of the second partial circuit (200) formed by the multi-output current mirror copying zero-temperature reference current is connected with a fourth partial circuit (400) formed by a current type digital-to-analog converter adjusting the zero-temperature reference current ratio, the output end of the third partial circuit (300) formed by the multi-output current mirror copying zero-temperature reference current is connected with a fifth partial circuit (500) formed by a current type digital-to-analog converter adjusting the positive-temperature reference current ratio, the fourth part (400) formed by the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) formed by the current type digital-to-analog converter for adjusting the positive temperature reference current proportion are connected in parallel and then connected with the sixth part (600) formed by a multi-output current mirror, and the output end of the sixth part (600) formed by the multi-output current mirror is connected with the seventh part (700) formed by the current type digital-to-analog converter for controlling the mixed reference current, the eighth part (800) formed by the current-current type amplifier and the ninth part (900) formed by the millimeter wave transistor biasing module.
2. The millimeter wave chip gain high-low temperature self-body of claim 1An adaptive biasing structure, characterized by: the first part (100) of the circuit composed of the band-gap reference simultaneously provides zero temperature IZ1And positive temperature IP1Two reference currents.
3. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the input end of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current is connected with the zero-temperature reference current output end I of the first partial circuit (100)Z1The output end is M zero-temperature reference current output ports IZ2.1——IZ2.M。
4. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 3, wherein: the number M of output current ports of the second partial circuit (200) which is formed by the multi-output current mirror copying the zero temperature reference current is determined according to the number of temperature coefficients required by the actual millimeter wave circuit.
5. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the fourth part (400) is a current type digital-to-analog converter, and the output end of the current type digital-to-analog converter is a zero-temperature reference current output port IZ4The input end of the first partial circuit (200) is connected with the output current port I of the second partial circuitZ2.1And the control word Z is connected with an external digital control signal.
6. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the structure of the second partial circuit (200) formed by the multi-output current mirror copying the zero-temperature reference current is the same as that of the third partial circuit (300) formed by the multi-output current mirror copying the positive-temperature reference current; and/or the fourth part (400) consisting of the current type digital-to-analog converter for adjusting the zero-temperature reference current proportion and the fifth part (500) consisting of the current type digital-to-analog converter for adjusting the positive-temperature reference current proportion have the same structure.
7. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the control word P of the fifth part circuit (500) is the same as the control word Z of the fourth part circuit (400), and the result of bitwise exclusive-or is a full 1 sequence.
8. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the sixth partial circuit (600) is a multi-output current mirror, and the input end of the sixth partial circuit is connected with the output current I of the fourth (400) and fifth (500) partial circuitsZ4And IP5Parallel mixed reference current IT5The number of output currents N depends on the number of channels of the actual chip.
9. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the seventh part of the circuit (700) is a current type digital-to-analog converter, and the output end of the seventh part of the circuit is a mixed reference current output port IT7The input end of the first partial circuit is connected with an output current port I of the sixth partial circuit (600)T6.1And the control word T is connected with an external digital control signal.
10. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the eighth partial circuit (800) is a current-current type amplifier, and the input end of the eighth partial circuit is connected with the output current end I of the seventh partial circuit (700)T7The output end of the output port is a mixed bias current output port IT8。
11. The millimeter wave chip gain high-low temperature adaptive bias structure according to claim 1, wherein: the ninth part of circuit (900) is composed of a first N-type transistor (901), a second N-type transistor (904), a first capacitor (902) and a first resistor (903), wherein the grid electrode of the first N-type transistor (901) is connected with the drain electrode, the source electrode of the first N-type transistor (901) is grounded, the upper polar plate of the first capacitor (902) is connected with the grid electrode of the first N-type transistor (901), the lower polar plate of the first capacitor (902) is grounded, the first resistor (903) is bridged at two ends of the grid electrodes of the first N-type transistor (901) and the second N-type transistor (904), the second N-type transistor (904) is a millimeter wave amplifier, the source electrode of the second N-type transistor is grounded, the grid electrode of the second N-type transistor is an input port of a.
12. A millimeter wave chip gain high-low temperature self-adaptive bias method is characterized in that: the circuit working method comprises the following steps: comprises a stable working stage and a temperature coefficient adjusting stage, and comprises the following steps:
1) powering on the chip, setting a mixed reference current IT#The temperature coefficient of (a) is a default value;
2) judging whether the temperature is increased at the moment;
3) judging the total gain condition;
4) judging to reduce or improve the temperature coefficient of the mixed reference current;
5) and jumping back to the step 2) to automatically stabilize the gain.
13. The millimeter wave chip gain high-low temperature adaptive biasing method according to claim 12, wherein: when the judgment result in the step 2) is that the working temperature of the chip rises, the metal loss in the chip rises, so that the overall gain of the millimeter wave chip is reduced, and meanwhile, the mixed reference current automatically increases according to the set temperature coefficient; as the mixed reference current is increased, the intrinsic gain of the radio frequency transistor is increased, and the overall gain of the chip is improved; when the judgment result of the step 2) is that the working temperature of the chip is reduced, the metal loss in the chip is reduced, so that the overall gain of the millimeter wave chip is increased, and meanwhile, the mixed reference current is automatically reduced according to the set temperature coefficient; as the mixed reference current becomes smaller, the intrinsic gain of the radio frequency transistor is reduced, and the overall gain of the chip is reduced.
14. The millimeter wave chip gain high-low temperature adaptive biasing method according to claim 12, wherein: step 3) judging the total gain of the chip at the moment compared with the value at normal temperature;
31) if the total gain of the chip is kept unchanged at the normal temperature (25 ℃), the step 2) is carried out to automatically stabilize the gain, and the chip enters a stable working state;
32) if the total gain of the chip changes from the normal temperature (25 ℃), whether the total gain is increased is judged.
15. The millimeter wave chip gain high-low temperature adaptive biasing method according to claim 13, wherein: step 32) if the total gain of the chip is increased compared with the normal temperature (25 ℃) and the temperature is increased, manually reducing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced and the temperature is increased compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is increased and the temperature is reduced compared with the normal temperature (25 ℃), manually increasing the temperature coefficient of the mixed reference current; if the total gain of the chip is reduced compared with the normal temperature (25 ℃) and the temperature is reduced, the temperature coefficient of the mixed reference current is manually reduced.
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