CN111885431A - Communication control method and device - Google Patents
Communication control method and device Download PDFInfo
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- CN111885431A CN111885431A CN202010766852.7A CN202010766852A CN111885431A CN 111885431 A CN111885431 A CN 111885431A CN 202010766852 A CN202010766852 A CN 202010766852A CN 111885431 A CN111885431 A CN 111885431A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q9/00—Arrangements in telecontrol or telemetry systems for selectively calling a substation from a main station, in which substation desired apparatus is selected for applying a control signal thereto or for obtaining measured values therefrom
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
Abstract
The invention discloses a communication control method and device, and relates to the technical field of photoelectricity. The method comprises the following steps: after receiving a command sent by an upper computer, a first communication control board writes data carried by the command into a first cache and sends an interrupt signal to a second communication control board; after receiving the interrupt signal, the second communication control board reads the data carried by the command from the first cache, writes the data carried by the command into the image processing board at the appointed moment when the command is an image processing starting command, and writes first communication state information into the second cache; and the first communication control board reads the first communication state information from the second cache, generates a first response data frame according to the first communication state information and sends the first response data frame to the upper computer. By the method, the problem that the communication fault is mistakenly reported due to time sequence delay caused by communication by adopting the traditional asynchronous control communication chip is solved.
Description
Technical Field
The present invention relates to the field of optoelectronic technologies, and in particular, to a communication control method and apparatus.
Background
Existing optoelectronic systems typically consist of two hardware circuit boards: one is a communication control board, and the other is an image processing board. The communication control board and the upper computer adopt an asynchronous communication mode, and the communication control board is mainly used for receiving a control command of the upper computer, analyzing the control command, sending the control command to the image processing board to control image processing, and outputting an image processing result to the upper computer.
In the process of implementing the invention, the inventor of the invention finds that the prior art has at least the following problems: the traditional communication control panel is realized by a communication control chip, when an asynchronous communication mode is adopted between an upper computer and the traditional communication control chip and the information time sequence is strictly required to be returned, the communication control panel possibly returns the upper computer untimely after receiving data, and the communication fault is mistakenly reported.
Therefore, in view of the above disadvantages, it is desirable to provide a new communication control method and apparatus to solve the problem of communication failure due to timing delay caused by communication using a conventional asynchronous control communication chip.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is to solve the problem of communication fault false alarm caused by time sequence delay caused by communication by adopting the traditional asynchronous control communication chip.
(II) technical scheme
In order to solve the above technical problem, in one aspect, the present invention provides a communication control method.
The communication control method of the present invention is applied to a communication control apparatus including a first communication control board and a second communication control board; the method comprises the following steps: after receiving a command sent by an upper computer, a first communication control board writes data carried by the command into a first cache and sends an interrupt signal to a second communication control board; after receiving the interrupt signal, the second communication control board reads the data carried by the command from the first cache; when the command is an image processing starting command, the second communication control board writes data carried by the command into the image processing board at an appointed moment and writes first communication state information into a second cache; the first communication state information is used for indicating that the communication between the communication control device and the upper computer is normal; and the first communication control board reads first communication state information from the second cache, generates a first response data frame according to the first communication state information, and sends the first response data frame to the upper computer.
Optionally, the writing, by the first communication control board, the data carried by the command into the first buffer, and sending the interrupt signal to the second communication control board includes: the first communication control board decodes the command; after detecting a preset frame header identifier from the command, the first communication control board starts to receive serial data positioned behind the frame header identifier and writes the serial data into a first cache until detecting the preset frame tail identifier from the command; and after detecting the preset frame tail identification from the command, the first communication control board sends an interrupt signal to the second communication control board.
Optionally, the method further comprises: after receiving the command sent by the upper computer, the first communication control board performs CRC on the data carried by the command and writes a CRC result into a first cache.
Optionally, the method further comprises: and the second communication control board confirms that the CRC result stored in the first cache corresponding to the data carried by the command indicates that the CRC passes before the second communication control board writes the data carried by the command into the image processing board at the appointed moment.
Optionally, the method further comprises: the second communication control board writes second communication state information into the second cache under the condition that a CRC result stored in the first cache corresponding to the data carried by the command indicates that the CRC fails; the second communication state information is used for indicating that the communication between the communication control device and the upper computer is abnormal; and the first communication control board reads second communication state information from the second cache, generates a second response data frame according to the second communication state information, and sends the second response data frame to the upper computer.
Optionally, the method further comprises: the first communication control board starts timing after receiving a command sent by the upper computer; the first communication control board confirms that the current time has reached the timing end time before reading the first communication state information.
Optionally, the writing, by the second communication control board, the data carried by the command into the image processing board at the appointed time includes: and the second communication control board writes the data carried by the command into the dual-port memory at the appointed moment, and then the image processing board reads the data carried by the command from the dual-port memory.
Optionally, the method further comprises: when the command is an image processing result query command, the second communication control board reads an image processing result from the dual-port memory and writes the image processing result into a second cache; and the first communication control board reads an image processing result from the second cache, generates a third response data frame according to the image processing result, and sends the third response data frame to the upper computer.
Optionally, the first communication control board is an FPGA chip, and the second communication control board is a DSP chip.
In order to solve the above technical problem, in another aspect, the present invention further provides a communication control apparatus.
The communication control device of the present invention includes: the first communication control panel is used for writing data carried by a command into a first cache after receiving the command sent by the upper computer and sending an interrupt signal to the second communication control panel; the second communication control board is used for reading the data carried by the command from the first cache after receiving the interrupt signal; the second communication control board is also used for writing data carried by the command into the image processing board at an appointed moment and writing first communication state information into a second cache when the command is an image processing starting command; the first communication state information is used for indicating that the communication between the communication control device and the upper computer is normal; and the first communication control board is used for reading first communication state information from the second cache, generating a first response data frame according to the first communication state information, and sending the first response data frame to the upper computer.
(III) advantageous effects
The technical scheme of the invention has the following advantages: different from the traditional method that one communication control panel is directly interacted with an upper computer and an image control panel, the invention is provided with a first communication control panel and a second communication control panel, the first communication control panel is responsible for receiving an image processing starting command of the upper computer and storing command data into the first cache, and is responsible for reading first communication state information from the second cache, generating a first response data frame according to the first communication state information and returning the first response data frame to the upper computer, reading command data from the first buffer at a given time through the second communication control board, and writing the command data to the image processing board, and writing the first communication state information into the second cache, the problem of communication fault error due to time sequence delay caused by communication by adopting a traditional asynchronous control communication chip can be solved, and normal communication with an upper computer is ensured.
Drawings
Fig. 1 is a schematic main flow chart of a communication control method according to a first embodiment of the present invention;
fig. 2 is a partial flow chart of a communication control method according to a second embodiment of the present invention;
fig. 3 is a partial flowchart of a communication control method according to a second embodiment of the present invention;
fig. 4 is a partial flowchart of a communication control method according to a second embodiment of the present invention;
fig. 5 is a schematic diagram of main constituent modules of a communication control apparatus according to a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
Example one
The communication control method of the embodiment of the invention is applied to a communication control device, and the communication control device comprises the following steps: the first communication control panel, second communication control panel. As shown in fig. 1, a communication control method provided in an embodiment of the present invention includes the following steps:
step S101: after receiving a command sent by an upper computer, the first communication control board writes data carried by the command into a first cache and sends an interrupt signal to the second communication control board.
In an alternative embodiment, step S101 comprises: the first communication control board decodes the command; after detecting a preset frame header identifier from the command, the first communication control board starts to receive serial data positioned behind the frame header identifier and writes the serial data into a first cache until detecting the preset frame tail identifier from the command; and after detecting the preset frame tail identification from the command, the first communication control board sends an interrupt signal to the second communication control board. The first buffer may also be referred to as a "receiving buffer", which may adopt a FIFO (first in first out) buffer structure or other buffer structures.
For example, assuming that the communication protocol used when the first communication control board and the upper computer perform asynchronous communication is an HDLC (high-level data link control) protocol, after receiving a command of the upper computer, the first communication control board first decodes the command of the upper computer according to the HDLC protocol, and detects a "7E" frame header identifier of the communication interface serial. After detecting the frame head mark, the first communication control board starts to receive serial data behind the frame head and writes the serial data into the first cache until detecting the frame tail mark. After the frame tail identification is detected, the first communication control board considers that the reception of one frame of data is finished, and sends an interrupt signal to the second communication control board.
Further, the first communication control board can adopt an FPGA chip, and the second communication control board can adopt a DSP chip. In specific implementation, the first communication control board and the second communication control board can also adopt other chips. For example, the first communication control board and the second communication control board both use FPGA chips.
Step S102: after receiving the interrupt signal, the second communication control board reads the data carried by the command from the first cache; and when the command is an image processing starting command, the second communication control board writes data carried by the command into the image processing board at an appointed moment and writes first communication state information into the second cache.
The first communication state information is used to indicate that the communication between the communication control device and the upper computer is normal, for example, the first communication state information may be specifically "correct communication".
Exemplarily, step S102 may include: after receiving an interrupt signal sent by the first communication control board, the second communication control board reads the data carried by the command from the first cache and analyzes the data carried by the command according to a communication protocol; when the command is analyzed to be an image processing starting command, the second communication control board writes data carried by the command into a memory between the second communication control board and the image processor at an appointed moment, then the image processor can read the data carried by the command from the memory, and the second communication control board writes first communication state information into the second cache. The memory can be a dual-port memory or other physical memories; the second buffer, which may also be referred to as a "transmit buffer," may optionally employ a FIFO buffer structure or other buffer structure.
Step S103: and the first communication control board reads first communication state information from the second cache, generates a first response data frame according to the first communication state information, and sends the first response data frame to the upper computer.
In this step, the first communication control board reads the data information from the second buffer. And when the read state data is first communication state information, the first communication control board generates a first response data frame according to the first communication state information. Wherein the generating of the first response data frame according to the first communication state information corresponds to a data encoding process, which may include: and adding a frame head identifier, performing CRC (cyclic redundancy check) calculation on the first communication state data, adding a calculated CRC value into the data frame, and adding a frame tail identifier to obtain a first response data frame. And then, the first communication control panel sends the obtained first response data frame to the upper computer.
In the embodiment of the invention, the communication control device is provided with a first communication control panel and a second communication control panel, the first communication control panel is responsible for receiving an image processing starting command of an upper computer and storing command data into a first cache, and is responsible for reading first communication state information from a second cache to generate a first response data frame according to the command data, and returns the first response data frame to the upper computer, the second communication control panel is responsible for reading the command data from the first cache at an appointed time, writing the command data into the image processing panel, and writing the first communication state information into the second cache, so that the problem of communication fault misrepresentation caused by time sequence delay caused by communication by adopting a traditional asynchronous control communication chip can be solved, and normal communication between the communication control device and the upper computer is ensured.
Example two
The communication control method of the embodiment of the invention is applied to a communication control device, and the communication control device comprises the following steps: the first communication control panel, second communication control panel. The communication control method according to the embodiment of the present invention is described in detail below with reference to fig. 2 to 4.
Fig. 2 is a partial flowchart of a communication control method according to a second embodiment of the present invention. As shown in fig. 2, the communication control method in the embodiment of the present invention includes the following steps:
step S201: after receiving a command sent by an upper computer, a first communication control board writes data carried by the command into a first cache.
In an alternative embodiment, step S201 includes: the first communication control board decodes the command; after detecting the preset frame head identification from the command, the first communication control board starts to receive serial data positioned behind the frame head identification and writes the serial data into a first cache until detecting the preset frame tail identification from the command. The first buffer may also be referred to as a "receiving buffer", which may adopt a FIFO (first in first out) buffer structure or other buffer structures.
For example, assuming that the communication protocol used when the first communication control board and the upper computer perform asynchronous communication is an HDLC (high-level data link control) protocol, after receiving a command of the upper computer, the first communication control board first decodes the command of the upper computer according to the HDLC protocol, and detects a "7E" frame header identifier of the communication interface serial. After detecting the frame head mark, the first communication control board starts to receive serial data behind the frame head and writes the serial data into the first cache until detecting the frame tail mark. After detecting the end-of-frame flag, the first communications board considers that reception of one frame of data is finished.
Further, the first communication control board can adopt an FPGA chip, and the second communication control board can adopt a DSP chip. In specific implementation, the first communication control board and the second communication control board can also adopt other chips. For example, the first communication control board and the second communication control board both use FPGA chips.
Step S202: and the first communication control panel performs CRC on the data carried by the command and writes a CRC result into a first cache.
Specifically, the steps include: the first communication control board performs CRC calculation according to the data carried by the command, and compares the calculated CRC value with the CRC value carried by the command; if the two are the same, confirming that the CRC passes, and writing a first CRC result into a first cache; if the two are different, the CRC check is confirmed to be not passed, and the second CRC check result is written into the first cache. Wherein the first CRC result indicates that the CRC check passes, and the second CRC result indicates that the CRC check passes. Illustratively, the first CRC check result may be represented by "1" and the second CRC check result may be represented by "0".
In the embodiment of the invention, the normal communication between the command and the upper computer can be further ensured by performing CRC check on the data carried by the command and writing the CRC check result into the first cache.
Step S203: the first communication control board sends an interrupt signal to the second communication control board.
And after detecting the preset frame tail identification from the command, the first communication control board sends an interrupt signal to the second communication control board. Thereafter, the process flow shown in FIG. 3 may be executed.
Fig. 3 is a partial flowchart of a communication control method according to a second embodiment of the present invention. As shown in fig. 3, the communication control method in the embodiment of the present invention further includes the following steps:
step S301: the second communication control board receives the interrupt signal.
Step S302: and the second communication control board reads the data carried by the command from the first cache.
And after receiving the interrupt signal sent by the first communication control board, the second communication control board reads the data carried by the command from the first cache and analyzes the data carried by the command according to a communication protocol. Executing step S303 if it is analyzed that the command is an image processing start command; in case that it is analyzed that the command is an image processing result query command, step S306 is performed.
Step S303: the second communication control board judges whether the CRC check passes or not.
Specifically, the second communication control board reads the CRC check result in the command data from the first buffer. When the CRC check result is the first CRC check result, confirming that the CRC check is passed, and performing step S304; when the CRC check result is the second CRC check result, it is confirmed that the check is not passed, and step S305 is performed.
Step S304: and the second communication control board writes the data carried by the command into the image processing board at the appointed moment and writes the first communication state information into the second cache.
For example, the writing of the data carried by the command into the image processing board at the appointed time by the second communication control board may include: and the second communication control board writes the data carried by the command into the dual-port memory at the appointed moment, and then the image processing board reads the data carried by the command from the dual-port memory. Meanwhile, the second communication control board writes the first communication state information into the second cache. The first communication state information is used to indicate that the communication between the communication control device and the upper computer is normal, for example, the first communication state information may be specifically "correct communication".
Further, after step S304, step S307 is executed.
Step S305: and the second communication control board writes the second communication state information into the second cache.
The second communication status information is used to indicate that the communication between the communication control device and the upper computer is abnormal, for example, the second communication status information may be specifically "communication failure". Further, after step S305, step S307 is executed.
Step S306: and reading an image processing result from the dual-port memory, and writing the image processing result into a second cache.
And under the condition that the command is an image processing result query command, the second communication control board reads the image processing result from the dual-port memory and writes the image processing result into a second cache.
Step S307: the interrupt is ended.
Fig. 4 is a partial flowchart of a communication control method according to a second embodiment of the present invention. As shown in fig. 4, the communication control method in the embodiment of the present invention further includes the following steps:
step S401: and the first communication control panel performs timing after receiving the command sent by the upper computer.
In this step, the first communication control board starts timing after receiving one frame of command data transmitted from the upper computer. The time period of the timing can be flexibly set, for example, it can be set to 2.5ms or 3ms, etc.
Step S402: the first communication control board judges whether the current time reaches the timing end time.
When the current time has reached the counting end time, step S403 is executed; otherwise, the step S402 is continuously executed.
Step S403: and the first communication control board reads data from the second buffer.
In the step, the first communication control board reads data which needs to be sent to the upper computer from the second cache. Wherein the data is first communication state information, second communication state information or image processing result data.
Step S404: and the first communication control board generates a response data frame according to the read data and sends the response data frame to the upper computer.
In the step, when the read data is first communication state information, the first communication control board generates a first response data frame according to the first communication state information and sends the first response data frame to the upper computer; when the read data is second communication state information, the first communication control board generates a second response data frame according to the second communication state information and sends the second response data frame to the upper computer; and when the read data is image processing result data, the first communication control board generates a third response data frame according to the image processing result data and sends the third response data frame to the upper computer.
In the embodiment of the invention, the problem of communication fault error due to time sequence delay caused by communication by adopting the traditional asynchronous control communication chip can be solved through the steps, and normal communication with an upper computer is ensured.
EXAMPLE III
Fig. 5 is a schematic diagram of main constituent modules of a communication control apparatus according to a third embodiment of the present invention. As shown in fig. 5, the communication control apparatus 500 in the embodiment of the present invention includes: a first communication control board 501 and a second communication control board 502.
The first communication control board 501 is configured to, after receiving a command sent by an upper computer, write data carried by the command into a first cache, and send an interrupt signal to the second communication control board 502.
In an optional embodiment, the writing, by the first communication board, the data carried by the command into the first buffer, and sending the interrupt signal to the second communication board 502 includes: the first communication control board 501 decodes the command; after detecting the preset frame header identifier from the command, the first communication control board 501 starts to receive serial data located behind the frame header identifier and write the serial data into the first cache until detecting the preset frame end identifier from the command; after detecting the preset end-of-frame flag from the command, the first communication board 501 sends an interrupt signal to the second communication board 502. The first buffer may also be referred to as a "receiving buffer", which may adopt a FIFO (first in first out) buffer structure or other buffer structures.
For example, assuming that the communication protocol used when the first communication control board and the upper computer perform asynchronous communication is an HDLC (high-level data link control) protocol, after receiving a command of the upper computer, the first communication control board first decodes the command of the upper computer according to the HDLC protocol, and detects a "7E" frame header identifier of the communication interface serial. After detecting the frame head mark, the first communication control board starts to receive serial data behind the frame head and writes the serial data into the first cache until detecting the frame tail mark. After the frame tail identification is detected, the first communication control board considers that the reception of one frame of data is finished, and sends an interrupt signal to the second communication control board.
Further, the first communication control board 501 may employ an FPGA chip, and the second communication control board 502 may employ a DSP chip. In specific implementation, the first communication control board and the second communication control board can also adopt other chips. For example, the first communication control board and the second communication control board both use FPGA chips.
The second communication control board 502 is configured to read data carried by the command from the first cache after receiving the interrupt signal; the second communication control board 502 is further configured to, when the command is an image processing start command, write data carried by the command into the image processing board at an appointed time, and write first communication state information into the second cache.
Specifically, after receiving an interrupt signal sent by the first communication control board 501, the second communication control board 502 reads the data carried by the command from the first buffer, and analyzes the data carried by the command according to a communication protocol; when the command is analyzed to be an image processing start command, the second communication control board 502 writes the data carried by the command into a memory between the second communication control board and the image processor at an appointed time, then the image processor can read the data carried by the command from the memory, and the second communication control board 502 writes the first communication state information into the second cache.
The first communication state information is used to indicate that the communication between the communication control device and the upper computer is normal, for example, the first communication state information may be specifically "correct communication".
The memory can be a dual-port memory or other physical memories; the second buffer, which may also be referred to as a "transmit buffer," may optionally employ a FIFO buffer structure or other buffer structure.
The first communication control board 501 is further configured to read first communication state information from the second cache, generate a first response data frame according to the first communication state information, and send the first response data frame to the upper computer.
Illustratively, the first communication control board 501 reads data information from the second buffer. When the read status data is the first communication status information, the first communication control board 501 generates a first response data frame according to the first communication status information. Wherein the generating of the first response data frame according to the first communication state information corresponds to a data encoding process, which may include: and adding a frame head identifier, performing CRC (cyclic redundancy check) calculation on the first communication state data, adding a calculated CRC value into the data frame, and adding a frame tail identifier to obtain a first response data frame. Then, the first communication control board 501 sends the obtained first response data frame to the upper computer.
In the embodiment of the invention, the communication control device is provided with a first communication control panel and a second communication control panel, the first communication control panel is responsible for receiving an image processing starting command of an upper computer and storing command data into a first cache, and is responsible for reading first communication state information from a second cache to generate a first response data frame according to the command data, and returns the first response data frame to the upper computer, the second communication control panel is responsible for reading the command data from the first cache at an appointed time, writing the command data into the image processing panel, and writing the first communication state information into the second cache, so that the problem of communication fault misrepresentation caused by time sequence delay caused by communication by adopting a traditional asynchronous control communication chip can be solved, and normal communication between the communication control device and the upper computer is ensured.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A communication control method is applied to a communication control apparatus including a first communication control board and a second communication control board; the method comprises the following steps:
after receiving a command sent by an upper computer, a first communication control board writes data carried by the command into a first cache and sends an interrupt signal to a second communication control board;
after receiving the interrupt signal, the second communication control board reads the data carried by the command from the first cache; when the command is an image processing starting command, the second communication control board writes data carried by the command into the image processing board at an appointed moment and writes first communication state information into a second cache; the first communication state information is used for indicating that the communication between the communication control device and the upper computer is normal;
and the first communication control board reads first communication state information from the second cache, generates a first response data frame according to the first communication state information, and sends the first response data frame to the upper computer.
2. The method of claim 1, wherein the first communication board writing the data carried by the command to a first buffer, and sending an interrupt signal to a second communication board comprises:
the first communication control board decodes the command; after detecting a preset frame header identifier from the command, the first communication control board starts to receive serial data positioned behind the frame header identifier and writes the serial data into a first cache until detecting the preset frame tail identifier from the command; and after detecting the preset frame tail identification from the command, the first communication control board sends an interrupt signal to the second communication control board.
3. The method of claim 2, further comprising:
after receiving the command sent by the upper computer, the first communication control board performs CRC on the data carried by the command and writes a CRC result into a first cache.
4. The method of claim 3, further comprising:
and the second communication control board confirms that the CRC result stored in the first cache corresponding to the data carried by the command indicates that the CRC passes before the second communication control board writes the data carried by the command into the image processing board at the appointed moment.
5. The method of claim 4, further comprising:
the second communication control board writes second communication state information into the second cache under the condition that a CRC result stored in the first cache corresponding to the data carried by the command indicates that the CRC fails; the second communication state information is used for indicating that the communication between the communication control device and the upper computer is abnormal;
and the first communication control board reads second communication state information from the second cache, generates a second response data frame according to the second communication state information, and sends the second response data frame to the upper computer.
6. The method of claim 1, further comprising:
the first communication control board starts timing after receiving a command sent by the upper computer; the first communication control board confirms that the current time has reached the timing end time before reading the first communication state information.
7. The method of claim 1, wherein the second communication control board writing the data carried by the command to the image processing board at the appointed time comprises: and the second communication control board writes the data carried by the command into the dual-port memory at the appointed moment, and then the image processing board reads the data carried by the command from the dual-port memory.
8. The method of claim 7, further comprising:
when the command is an image processing result query command, the second communication control board reads an image processing result from the dual-port memory and writes the image processing result into a second cache;
and the first communication control board reads an image processing result from the second cache, generates a third response data frame according to the image processing result, and sends the third response data frame to the upper computer.
9. The method of claim 1,
the first communication control panel is an FPGA chip, and the second communication control panel is a DSP chip.
10. A communication control apparatus, characterized in that the apparatus comprises:
the first communication control panel is used for writing data carried by a command into a first cache after receiving the command sent by the upper computer and sending an interrupt signal to the second communication control panel;
the second communication control board is used for reading the data carried by the command from the first cache after receiving the interrupt signal; the second communication control board is also used for writing data carried by the command into the image processing board at an appointed moment and writing first communication state information into a second cache when the command is an image processing starting command; the first communication state information is used for indicating that the communication between the communication control device and the upper computer is normal;
the first communication control panel is further used for reading first communication state information from the second cache, generating a first response data frame according to the first communication state information, and sending the first response data frame to the upper computer.
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