CN111866408B

CN111866408B - Graphic processing chip and video decoding display method

Info

Publication number: CN111866408B
Application number: CN202010751241.5A
Authority: CN
Inventors: 周敏龙; 邓智鸿
Original assignee: Changsha Jingmei Integrated Circuit Design Co ltd; Changsha Jingjia Microelectronics Co ltd
Current assignee: Changsha Jingmei Integrated Circuit Design Co ltd; Changsha Jingjia Microelectronics Co ltd
Priority date: 2020-07-30
Filing date: 2020-07-30
Publication date: 2022-09-20
Anticipated expiration: 2040-07-30
Also published as: CN111866408A

Abstract

The graphic processing chip and the video decoding display method, the graphic processing chip includes: the DDR SDRAM comprises a DDR SDRAM, a DDR controller, a DEC and a video window overlapping module, wherein the DDR controller acquires video data and stores the video data to the DDR SDRAM; DEC decodes the video data, and writes the decoded data into DDR SDRAM; and the video window overlapping module overlaps and displays the video picture corresponding to the decoded data on the local graphic picture according to the preset video picture parameter. By adopting the scheme in the application, the video picture and the graphic picture are superposed and displayed by utilizing another independent hardware module in the display card, the video data decoded by the hardware is directly sent to the hardware for processing and then output and display, and the hardware module is independent, so that the hardware module for drawing the graphic is not influenced, and further the consumption of a CPU is reduced.

Description

Graphic processing chip and video decoding display method

Technical Field

The present application relates to computer graphics processing technologies, and in particular, to a graphics processing chip and a video decoding display method.

Background

The video card provides video decoding function besides computer graphics acceleration function. During computer graphics processing, the decoded picture of the display card needs to be superimposed on the graphics picture for display.

In a conventional mode, a picture after video decoding is stored in a GPU frame memory or a system memory, and a video picture display mode includes the following two modes:

one is to copy the decoded picture to the screen frame memory, which increases the CPU consumption;

alternatively, the video frame is rendered as a texture using a graphics rendering pipeline, which increases GPU consumption.

Problems existing in the prior art:

when the picture decoded by the display card is displayed on the graphic picture, the decoded picture is copied to the screen frame memory, so that the consumption of a CPU is increased.

Disclosure of Invention

The embodiment of the application provides a graphic processing chip and a video decoding display method, so as to solve the technical problems.

According to a first aspect of embodiments of the present application, there is provided a graphics processing chip, including: the DDR SDRAM is connected with the DDR controller, and the DDR controller is connected with the DEC and the video window superposition module; wherein the content of the first and second substances,

the DDR controller is used for acquiring video data and storing the video data to the DDR SDRAM;

the DEC is used for reading the video data in the DDR SDRAM, decoding the video data and writing the decoded data into the DDR SDRAM;

and the video window overlapping module is used for overlapping and displaying the video picture corresponding to the decoded data on the local graphic picture according to the preset video picture parameter.

According to a second aspect of the embodiments of the present application, there is provided a video decoding display method, including:

a DDR (double data rate) controller of the graphics processing chip acquires video data from a computer memory and stores the video data into a DDR SDRAM (double data rate synchronous dynamic random access memory);

a video decoding module DEC of the graphic processing chip reads the video data in the DDR SDRAM, decodes the video data and writes the decoded data into the DDR SDRAM;

and a video window overlapping module of the graphic processing chip overlaps and displays the video picture corresponding to the decoded data on the local graphic picture according to the preset video picture parameters.

By adopting the graphic processing chip and the video decoding display method provided by the embodiment of the application, the video picture and the graphic picture are superimposed and displayed by utilizing another independent hardware module (video window superimposing module) in the display card, and the video data decoded by the hardware is directly sent to the hardware for processing and then output and display.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

FIG. 1 is a schematic diagram illustrating a graphics processing chip according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram illustrating another structure of a graphics processing chip according to an embodiment of the present disclosure;

FIG. 3 is a schematic flowchart illustrating an implementation of a video decoding and displaying method according to a second embodiment of the present application;

FIG. 4 is a schematic diagram illustrating a video decoding display architecture according to a third embodiment of the present application;

fig. 5 is a schematic diagram illustrating a video frame display of a graphics window in the fourth embodiment of the present application.

Detailed Description

In the process of implementing the present application, the inventors found that:

when displaying a picture decoded by a graphics card to a graphics picture, an image processing system adopted in the prior art includes: a memory stores a source image in a high resolution digital format; the display screen has a low resolution digital format; the media acceleration hardware unit increases the color depth values from the source image and generates a plurality of temporally displaced images from the source image by sequentially displacing the origin of the frames applied to the source image and scaling the source image pixel values from each frame, thereby generating a plurality of displaced images having a second, relatively lower resolution for display on the display screen. The video data decoded by the method needs to be copied to a screen frame through a CPU and then a drawing process is carried out, and the video display speed of the copied picture is low.

Aiming at the technical problems in the prior art, the embodiment of the application provides a method for efficiently displaying the decoded pictures of the video, so that the CPU consumption is reduced, and the complex video display speed is increased.

In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following further detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings makes it clear that the described embodiments are only a part of the embodiments of the present application, and are not exhaustive of all embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

Example one

Fig. 1 shows a schematic structural diagram of a graphics processing chip according to a first embodiment of the present application.

As shown, the graphics processing chip includes: the DDR SDRAM is connected with the DDR controller, and the DDR controller is connected with the DEC and the video window overlapping module; wherein the content of the first and second substances,

By adopting the graphics processing chip provided by the embodiment of the application, the video picture and the graphics picture are superposed and displayed by utilizing another independent hardware module (video window superposition module) in the display card, and the video data decoded by the hardware is directly sent to the hardware for output and display after being processed.

In one embodiment, the DDR SDRAM, DEC and video window overlay module are connected by a local data bus AXI, the AXI connected to the system bus by a PCIe bus, the AXI connected to the display by a graphics interface.

In one embodiment, the graphics interface comprises a high definition multimedia interface, HDMI, or video graphics array, VGA.

In one embodiment, the DEC, comprises:

the reading unit is used for reading the video data in the DDR SDRAM;

the decoding unit is used for decoding the video data to obtain YUV data;

the processing unit is used for converting the YUV data into RGB data;

and the sending unit is used for writing the RGB data into the DDR SDRAM.

In an embodiment, the video window overlaying module is further configured to scale or rotate the video picture corresponding to the decoded data before displaying the video picture corresponding to the decoded data in an overlay manner on the local graphics picture.

In one embodiment, the displaying, by the video window overlay module, the video picture in the local graphic picture in an overlay manner specifically includes: and acquiring a hardware address of the decoded data, and configuring the hardware address of the data of the local graphic picture according to the hardware address of the data corresponding to the video picture to be superposed and preset video picture parameters.

In one embodiment, the preset video picture parameters include a video address and a rectangular frame of a video picture, and the configuring a hardware address of data of a local graphic picture includes:

when an enabling register of the video window overlapping module is arranged at an enabling bit, zooming or rotating the source video according to a source video rectangular frame and a target video rectangular frame;

and performing frame writing operation on the destination video address, and placing the zoomed or rotated picture to the position of the destination video address according to the source video address.

In an embodiment, the video window overlapping module is correspondingly provided with a hardware start address, and when the hardware start address is set to a preset value, the video window overlapping module is started.

Fig. 2 is a schematic diagram illustrating another structure of a graphics processing chip according to a first embodiment of the present application.

In one embodiment, the graphics processing chip further comprises:

and the graphics drawing module is used for finishing graphics drawing according to the received graphics drawing command and displaying the graphics drawing on a local graphics picture.

Example two

Based on the same inventive concept, the embodiment of the application provides a video decoding display method, the principle of the method for solving the technical problem is similar to that of a graphic processing chip, and repeated parts are not repeated.

Fig. 3 is a flowchart illustrating an implementation of a video decoding display method in the second embodiment of the present application.

As shown in the figure, the video decoding display method comprises:

301, a random access memory DDR controller of the graphic processing chip acquires video data from a computer memory and stores the video data to a double-rate synchronous dynamic random access memory DDR SDRAM;

step 302, a video decoding module DEC of the graphic processing chip reads the video data in the DDR SDRAM, decodes the video data, and writes the decoded data into the DDRSDRAM;

and step 303, the video window overlapping module of the graphics processing chip overlaps and displays the video picture corresponding to the decoded data on the local graphics picture according to the preset video picture parameter.

By adopting the video decoding display method provided by the embodiment of the application, the video image and the graphic image are superimposed and displayed by utilizing another independent hardware module (video window superimposing module) in the display card, the video data decoded by the hardware is directly sent to the hardware for processing and then output and display, and the hardware module does not influence the hardware module for drawing the graphic because the hardware module is independent, thereby reducing the consumption of a CPU.

In one embodiment, a video decoding module DEC of a graphics processing chip reads video data in the DDR SDRAM, decodes the video data, and writes the decoded data into the DDR SDRAM, including:

a video decoding module DEC of the graphic processing chip reads video data in the DDR SDRAM; decoding the video data to obtain YUV data; converting the YUV data into RGB data; and writing the RGB data into the DDR SDRAM.

In one embodiment, the method further comprises:

before the video picture corresponding to the decoded data is displayed in an overlaid manner on the local graphics picture, a video decoding module DEC of the graphics processing chip scales or rotates the video picture corresponding to the decoded data.

In one embodiment, the method further comprises:

and the graphics drawing module of the graphics processing chip finishes graphics drawing according to the received graphics drawing command and displays the graphics drawing on a local graphics picture.

In one embodiment, the method further comprises:

receiving a hardware starting address set by an application layer;

and when the hardware starting address is set to be a preset value, the video window overlapping module is started.

EXAMPLE III

In order to facilitate the implementation of the present application, the embodiments of the present application are described with a specific example.

Fig. 4 is a schematic diagram illustrating a video decoding display architecture in the third embodiment of the present application.

As shown in the figure, the CPU, the memory DDR, the GPU chip, the display, and the like are respectively connected to the system bus. The GPU chip comprises the following hardware processing units:

the high-definition video decoding module DEC is connected with the DDR3 storage controller and the PCI-E bus through a multi-level on-chip interconnection structure;

the DDR3 storage controller manages the DDR3 and is used for storing data before and after decoding;

and the graph drawing module is used for receiving the graph drawing command, drawing the graph according to the graph drawing command and outputting the graph to the display for displaying.

And the Video decoding module DEC and the Video data after the graphic drawing are subjected to scaling, superposition, rotation and other processing by the independent hardware unit of the Video window superposition module, and then are sent to a graphic Interface such as HDMI (High Definition Multimedia Interface) or VGA (Video Graphics Array) and the like to be output to a display for display.

Each hardware unit in the GPU chip is connected via an axi (advanced eXtensible interface) bus.

And the PCI-E bus interface is an entrance for interaction between a display card (GPU chip) and equipment such as a CPU (central processing unit).

Specifically, the process of video decoding and displaying includes:

1) the CPU reads the video data into the memory DDR.

2) The video data is transmitted to DDR3 inside the GPU chip (DDR inside the GPU chip may also be referred to as a video Memory or a frame Memory), and the transmission mode may be Direct Memory Access (DMA).

3) And a video decoding module DEC inside the GPU chip reads the video data of the DDR3 video memory through a local data bus and starts decoding.

4) And the DEC writes the decoded YUV data into a video memory.

5) And a PP (Post Processing) submodule inside the DEC performs Post Processing on the decoded data, and converts the YUV data into RGB data.

6) The software sets the source data address (decoded video data), the source rectangle, the destination address and the destination rectangle parameter to the register of the video window overlapping module, and starts the video overlapping window module. And the video window overlapping module is used for overlapping and displaying the decoded video picture on the local graphic picture.

By adopting the scheme provided by the embodiment of the application, the decoded video picture is not required to be copied into the memory by the CPU and fused with the screen frame memory, the driver is only required to set the register and the parameters of the video overlapping module, the video window overlapping module performs hardware overlapping and outputting, and the memory copying or texture drawing process is not required to be executed, so that the CPU consumption is reduced, and the display speed of the complex picture is improved.

Example four

In order to facilitate the implementation of the present application, the embodiments of the present application are described with another specific example.

The user opens video playing software, such as an mplayer, and needs to play a video file of a.mp 4. And the video playing software transmits the video data before decoding to the display card driver. The video card driver stores the data in a frame memory, and then starts a hardware decoding DEC module to obtain decoded YUV data. And then the display card drives to start the PP sub-module of the DEC again, convert YUV into RGB, and store the RGB in the frame memory. And then, the display card driver sets a register of the video overlapping module according to window information, such as position and size information of a window, transmitted by the video playing software, and starts the video overlapping module. And the video superposition module is responsible for zooming the processed RGB video data to the size and the position corresponding to the window. And finally, the graphic display module displays the final desktop and the video window.

In particular, the method comprises the following steps of,

when a user opens a video by using the video player software, the CPU reads the compressed video data into the memory. In the player software, if hardware decoding (such as VDPAU) and display are enabled, the video data is sent to the video card driver, and the video card driver performs subsequent operations.

And the video data is transmitted to DDR3 of the GPU chip for storage, and a decoding hardware module of the GPU chip reads the video data in the DDR3 for decoding to obtain YUV data, converts the YUV data into RGB data and writes the RGB data back to DDR 3.

The video window overlapping module register comprises an enabling register and a parameter register, wherein parameters comprise a source video address, a source video rectangular frame (X coordinate, Y coordinate, width and height), a destination address and a destination rectangular frame (X coordinate, Y coordinate, width and height). And after the video superposition module is enabled, the video superposition module reads the corresponding register parameters and starts working.

When the rotate enable bit in the enable register is set to 1, a rotation is performed. The rotation angle is determined by a rotation parameter register and is transmitted to the display card by player software to drive. The rotation information includes: source address, source rectangle, rotation angle, destination address, destination rectangle box.

The video decoded picture can be displayed in a reduced or enlarged scale. When the source size and the destination size are the same, the video overlay window does not need to be scaled, and only the data need to be simply moved. When the source size and the destination size are not the same, the zoom function is enabled. Scaling the contained information: video source address, source rectangle, destination address, destination rectangle.

And the video superposition module is used for carrying out hardware frame writing operation on the initial position of a target picture in the display frame memory through the AXI bus and placing the zoomed picture at the position. If there is only a single display, the frame memory address is the address of the desktop display frame memory.

As shown in the following figure, the input data of the video overlay module has two:

1. address of source video, rectangle size, location.

2. Destination address, destination video player window size, location.

The output of the video overlapping module is the overlapped graphic picture. And finally, the display card outputs the graphic picture.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The scheme in the embodiment of the application can be implemented by adopting various computer languages, such as object-oriented programming language Java and transliterated scripting language JavaScript.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the present application.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. A graphics processing chip, comprising: the DDR SDRAM is connected with the DDR controller, and the DDR controller is connected with the DEC and the video window superposition module; wherein the content of the first and second substances,

2. The graphics processing chip of claim 1 wherein said DDR SDRAM, DEC and video window overlay module are connected by a local data bus AXI, said AXI connected to a system bus by a PCIe bus, said AXI connected to a display by a graphics interface.

3. The graphics processing chip of claim 2 wherein the graphics interface comprises a High Definition Multimedia Interface (HDMI) or a Video Graphics Array (VGA).

4. The graphics processing chip of claim 1, wherein the DEC, comprises:

the reading unit is used for reading the video data in the DDR SDRAM;

the decoding unit is used for decoding the video data to obtain YUV data;

the processing unit is used for converting the YUV data into RGB data;

and the sending unit is used for writing the RGB data into the DDR SDRAM.

5. The graphics processing chip of claim 1, wherein the video window overlay module is further configured to scale or rotate a video picture corresponding to the decoded data before displaying the video picture corresponding to the decoded data in an overlay manner on the local graphics picture.

6. The graphics processing chip according to claim 1 or 5, wherein the video window overlay module displays the video frame to the local graphics frame in an overlay manner, specifically comprising: and acquiring a hardware address of the decoded data, and configuring the hardware address of the data of the local graphic picture according to the hardware address of the data corresponding to the video picture to be superposed and preset video picture parameters.

7. The graphics processing chip according to claim 6, wherein the preset video picture parameters include a display position and a display size of a video picture, and the configuring the hardware address of the data of the local graphics picture comprises:

8. The graphics processing chip of claim 1, further comprising:

9. The graphics processing chip according to claim 1, wherein the video window overlay module is correspondingly provided with a hardware start address, and when the hardware start address is set to a preset value, the video window overlay module is started.

10. A video decoding display method, comprising:

a random access memory DDR controller of the graphic processing chip acquires video data from a computer memory and stores the video data to a double-rate synchronous dynamic random access memory DDR SDRAM;