CN111830400A

CN111830400A - Chip testing device

Info

Publication number: CN111830400A
Application number: CN202010838831.1A
Authority: CN
Inventors: 顾培东; 张彤
Original assignee: SHANGHAI TESTRONG ELECTRONIC TECHNOLOGY CO LTD
Current assignee: SHANGHAI TESTRONG ELECTRONIC TECHNOLOGY CO LTD
Priority date: 2020-08-19
Filing date: 2020-08-19
Publication date: 2020-10-27

Abstract

The embodiment of the invention discloses a chip testing device, wherein the surface of a guide frame, which is far away from a PCB (printed Circuit Board), comprises a concave structure, and the concave structure is used for placing a chip to be tested; the bottom surface of the recessed structure comprises a plurality of first through holes, and the test needle head is detachably and fixedly arranged in the first through holes in a penetrating manner; when the test needle head is damaged or different types of test needle heads need to be adopted to test the chip to be tested, the test needle head can be conveniently detached from the guide frame, and the test needle head is convenient to replace. And, including first test syringe needle and second test syringe needle in a plurality of test syringe needles, first test syringe needle is connected with the first radio frequency signal line electricity on the PCB board, and the second test syringe needle is connected with the second radio frequency signal line electricity on the PCB board, and then can realize the capability test to the chip that awaits measuring. In addition, the chip testing device provided by the embodiment of the invention has the advantages that the structure of the guide frame is simple, and the difficulty in manufacturing the guide frame is low.

Description

Chip testing device

Technical Field

The embodiment of the invention relates to the technical field of chip testing, in particular to a chip testing device.

Background

With the rapid development of 5G technology and big data, the frequency and the speed of chip operation are higher and higher.

During or after the chip is manufactured, the chip needs to be tested to obtain the working performance of the chip, for example, the high-speed and high-frequency indexes of the chip need to be tested. Different chips may need to be matched with different test needles for testing due to different sizes and packaging forms of the chips, and the test needles may be damaged as the service time of the test needles is prolonged. Therefore, it is an urgent need to solve the problem of designing a chip testing device with a testing needle that is easy to replace.

Disclosure of Invention

The invention provides a chip testing device, which is convenient to replace a testing needle head and has a simpler structure.

The embodiment of the invention provides a chip testing device, which comprises: the test device comprises a guide frame, a plurality of test needles and a PCB, wherein the guide frame is arranged on one side of the PCB;

the surface of the guide frame, which is far away from the PCB, comprises a concave structure, and the concave structure is used for placing a chip to be tested; the bottom surface of the recessed structure comprises a plurality of first through holes, and the test needle head is detachably and fixedly arranged in the first through holes in a penetrating manner;

the plurality of test needles comprise a first test needle and a second test needle, the first test needle is electrically connected with a first radio frequency signal wire on the PCB, and the second test needle is electrically connected with a second radio frequency signal wire on the PCB.

Optionally, the plurality of test needles further include a third test needle and a fourth test needle, the third test needle is electrically connected to the first digital signal line on the PCB, the fourth test needle is electrically connected to the second digital signal line on the PCB, and the first radio frequency signal line, the second radio frequency signal line, the first digital signal line and the second digital signal line are disposed on the same PCB.

Optionally, the test needle comprises a needle tip portion, a needle body portion and a fixing portion, wherein the needle body portion is located between the needle tip portion and the fixing portion, the needle tip portion is conical in shape, and the needle tip portion is used for contacting with a chip to be tested;

the needle body part and the fixing part are cylindrical, the needle body part is positioned in the first through hole, the fixing part is positioned on one side of the guide frame close to the PCB, and the diameter of the fixing part is larger than that of the first through hole;

optionally, the diameter of the needle body ranges from greater than or equal to 0.01 mm to less than or equal to 1 mm; the diameter of the fixing part ranges from more than 0.01 mm to less than or equal to 1.5 mm.

Optionally, the chip testing device further includes a grounding copper block, the grounding copper block is disposed on the bottom surface of the recessed structure, and the area of the grounding copper block is smaller than the area of the bottom surface of the recessed structure; the grounding copper block comprises a plurality of second through holes, the plurality of test needles further comprise fifth test needles, and the fifth test needles penetrate through the second through holes;

the bottom surface of the concave structure comprises a central area and an edge area surrounding the central area, wherein the grounding copper block is located in the central area, and the first test needle head, the second test needle head, the third test needle head and the fourth test needle head are located in the edge area.

Optionally, the chip testing device further includes a testing seat shell, the testing seat shell and the guide frame are arranged on the same side of the PCB, the testing seat shell is located around the guide frame, the testing seat shell and the guide frame form a testing seat, and the testing seat shell is fixedly connected with the guide frame, or the testing seat shell and the guide frame are of an integrated structure.

Optionally, the PCB is a radio frequency PCB, and the chip testing device further includes a digital PCB and a testing seat housing; the test seat shell and the guide frame form a test seat, and the test seat shell is fixedly connected with the guide frame or the test seat shell and the guide frame are of an integrated structure;

the testing seat shell is arranged on one side of the digital PCB, the guide frame is arranged on one side of the testing seat far away from the digital PCB, and the surface of one side of the guide frame far away from the digital PCB comprises a concave structure; the radio frequency PCB is partially arranged between the guide frame and the test seat; at the position of the sunken structure, a first through hole penetrates through the guide frame;

the plurality of test needles further comprise a third test needle and a fourth test needle, the third test needle is electrically connected with the first digital signal line, and the fourth test needle is electrically connected with the second digital signal line; the first digital signal line and the second digital signal line are arranged on the digital PCB, and the first radio frequency signal line and the second radio frequency signal line are arranged on the radio frequency PCB.

Optionally, the chip testing apparatus further includes an elastic supporting structure;

the test seat shell comprises a third through hole, the third through hole is in one-to-one correspondence with the first through hole in the thickness direction of the chip testing device, and the elastic supporting structure is arranged in the third through hole corresponding to the first through hole where the first testing needle head and the second testing needle head are located.

Optionally, the radio frequency PCB includes a first radio frequency PCB and a second radio frequency PCB, and a gap exists between the guide frame and the test socket housing;

the third test needle head and the fourth test needle head are conductive spring needles, the test seat shell comprises third through holes, the third through holes correspond to the first through holes one to one in the thickness direction of the chip test device, the conductive spring needles penetrate through the third through holes and the first through holes corresponding to the third through holes, and the conductive spring needles are located between the first radio frequency PCB and the second radio frequency PCB.

Optionally, the first test needle and the second test needle each include a needle tip portion, a needle body portion and a fixing portion, wherein the needle body portion is located between the needle tip portion and the fixing portion, one side of the needle tip portion, which is far away from the needle body portion, includes a groove, and the needle tip portion is used for contacting with a chip to be tested;

the needle body part and the fixing part are cylindrical, the needle body part is positioned in the first through hole, the fixing part is positioned on one side of the guide frame close to the radio frequency PCB, and the diameter of the fixing part is larger than that of the first through hole;

Optionally, the height of the test needle is greater than or equal to 0.01 mm and less than or equal to 3 mm.

Optionally, the guide frame and/or the test socket housing further include fourth via holes, fifth via holes are formed in the PCB, and the fifth via holes correspond to the fourth via holes one to one in the thickness direction of the chip testing device; the chip testing device also comprises a fixing structure, wherein the fixing structure penetrates through the fourth through hole and the fifth through hole and is used for fixing the testing seat and the PCB;

the guide frame and/or the test seat shell further comprises a sixth through hole, a seventh through hole is formed in the PCB, and the seventh through hole and the sixth through hole are in one-to-one correspondence in the thickness direction of the chip testing device; the chip testing device further comprises a positioning structure, wherein the positioning structure penetrates through the sixth through hole and the seventh through hole and is used for positioning the test seat and the PCB.

Optionally, the guide frame and/or the test socket housing further include fourth via holes, fifth via holes are formed in the digital PCB, and the fifth via holes correspond to the fourth via holes one to one in the thickness direction of the chip testing device; the chip testing device also comprises a fixing structure, wherein the fixing structure penetrates through the fourth through hole and the fifth through hole and is used for fixing the testing seat and the digital PCB;

the guide frame and/or the test seat shell further comprises sixth through holes, seventh through holes are formed in the radio frequency PCB and the digital PCB, and the seventh through holes correspond to the sixth through holes in a one-to-one mode in the thickness direction of the chip testing device; the chip testing device further comprises a positioning structure, wherein the positioning structure penetrates through the sixth through hole and the seventh through hole and is used for positioning the test seat and the PCB.

Optionally, the chip testing device further includes a first radio frequency connector and a second radio frequency connector, the first radio frequency connector is electrically connected to the first radio frequency signal line, and the second radio frequency connector is electrically connected to the second radio frequency signal line.

According to the chip testing device provided by the embodiment of the invention, the surface of the guide frame, which is far away from the PCB, comprises the concave structure, and the concave structure is used for placing the chip to be tested; the bottom surface of the recessed structure comprises a plurality of first through holes, and the test needle head is detachably and fixedly arranged in the first through holes in a penetrating manner; when the test needle head is damaged or different types of test needle heads need to be adopted to test the chip to be tested, the test needle head can be conveniently detached from the guide frame, and the test needle head is convenient to replace. And, including first test syringe needle and second test syringe needle in a plurality of test syringe needles, first test syringe needle is connected with the first radio frequency signal line electricity on the PCB board, and the second test syringe needle is connected with the second radio frequency signal line electricity on the PCB board, and then can realize the capability test to the chip that awaits measuring. In addition, the chip testing device provided by the embodiment has a simple structure of the guide frame, so that the difficulty in manufacturing the guide frame is low.

Drawings

Fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of a test needle provided in an embodiment of the present invention;

FIG. 3 is an enlarged view of a portion of FIG. 1;

FIG. 4 is a top view of the bottom surface of the recessed structure of FIG. 1;

FIG. 5 is a schematic structural diagram of another chip testing apparatus according to an embodiment of the present invention;

FIG. 6 is an enlarged partial view of FIG. 5;

FIG. 7 is a cross-sectional view of a chip testing apparatus according to an embodiment of the present invention;

FIG. 8 is an enlarged partial view of FIG. 6;

FIG. 9 is a schematic structural diagram of a test needle provided in accordance with an embodiment of the present invention;

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present invention, referring to fig. 1, the chip testing apparatus includes a guide frame 110, a plurality of testing needles 120, and a PCB 130, wherein the guide frame 110 is disposed on one side of the PCB 130;

the surface of the guide frame 110 away from the PCB 130 includes a recessed structure 111, and the recessed structure 111 is used for placing a chip to be tested; the bottom surface of the recessed structure 111 includes a plurality of first via holes 101, and the test needle 120 is detachably fixed through the first via holes 101;

the plurality of test needles 120 include a first test needle 121 and a second test needle 122, the first test needle 121 is electrically connected to a first rf signal line 141 on the PCB 130, and the second test needle 122 is electrically connected to a second rf signal line 142 on the PCB 130.

Specifically, the guide frame 110 may be made of an insulating material such as plastic. The PCB board 130 may have a circuit structure thereon. One side of the guide frame 110 away from the PCB 130 has a concave structure 111, and the concave structure 111 is used for placing a chip to be tested. That is, when testing the chip to be tested, the chip to be tested can be placed in the recessed structure 111. The bottom surface of the recessed structure 111 includes a plurality of first via holes 101, wherein the bottom surface of the recessed structure 111, that is, the surface of the recessed structure 111 parallel to the surface of the guide frame 110 of the PCB 130, and the testing needle 120 is detachably fixed to penetrate through the first via holes 101, so that when the testing needle 120 is damaged or a different type of testing needle 120 is required to test a chip to be tested, the testing needle 120 can be conveniently detached from the guide frame 110, thereby facilitating the replacement of the testing needle 120.

Referring to fig. 1, the PCB 130 is provided with a first rf signal line 141 and a second rf signal line 142, the first test pin 121 is electrically connected to the first rf signal line 141, and the second test pin 122 is electrically connected to the second rf signal line 142. The first rf signal line 141 and the second rf signal line 142 may be used to transmit high frequency signals. When the chip is tested, the chip to be tested can be placed in the concave structure 111, wherein the surface of the chip to be tested contacting the test needle 120 can comprise a metal pad, and after the chip to be tested is placed in the concave structure 111, the pad of the chip to be tested can be contacted with the test needle 120 by pressing the chip to be tested. For different chips to be tested, different guide frames 110 or different PCB boards 130 can be used for testing, so that the chips to be tested and the PCB boards 130 can be matched with the chips to be tested. The size of the recessed structure 111 of the guide frame 110 is not limited in the invention, and the recessed structures 111 of different guide frames 110 can be different in size, so that different guide frames 110 can be selected to match with chips to be tested with different sizes. The chip to be tested generally includes two rf signal terminals, and for chips to be tested with the rf signal terminals at different positions, the PCB 130 with the rf signal lines corresponding to the rf signal terminals may be selected for testing.

With continued reference to fig. 1, optionally, the chip testing apparatus further includes a first rf connector 210 and a second rf connector 220, wherein the first rf connector 210 is electrically connected to the first rf signal line 141, and the second rf connector 220 is electrically connected to the second rf signal line 142. When testing a chip to be tested, one of the first rf connector 210 and the second rf connector 220 may be connected to an oscilloscope or a network analyzer, and the other may be connected to an rf signal. Illustratively, the first rf connector 210 is connected to an rf signal, and the second rf connector 220 is connected to an oscilloscope or a network analyzer, so that the high-speed and high-frequency performance of the chip can be analyzed by observing waveforms of the oscilloscope and the network analyzer and by capturing the rf signal by the first rf connector 210.

In the chip testing device provided by the embodiment, the surface of the guide frame, which is far away from the PCB, comprises a recessed structure, and the recessed structure is used for placing a chip to be tested; the bottom surface of the recessed structure comprises a plurality of first through holes, and the test needle head is detachably and fixedly arranged in the first through holes in a penetrating manner; when the test needle head is damaged or different types of test needle heads need to be adopted to test the chip to be tested, the test needle head can be conveniently detached from the guide frame, and the test needle head is convenient to replace. And, including first test syringe needle and second test syringe needle in a plurality of test syringe needles, first test syringe needle is connected with the first radio frequency signal line electricity on the PCB board, and the second test syringe needle is connected with the second radio frequency signal line electricity on the PCB board, and then can realize the capability test to the chip that awaits measuring. In addition, the chip testing device provided by the embodiment has a simple structure of the guide frame, so that the difficulty in manufacturing the guide frame is low.

With reference to fig. 1, optionally, the plurality of test needles 120 further includes a third test needle 123 and a fourth test needle 124, the third test needle 123 is electrically connected to the first digital signal line 151 on the PCB 130, the fourth test needle 124 is electrically connected to the second digital signal line 152 on the PCB 130, and the first rf signal line 141, the second rf signal line 142, the first digital signal line 151, and the second digital signal line 152 are disposed on the same PCB 130.

Specifically, the existing PCB 130 may include a digital PCB and a radio frequency PCB. In the chip testing apparatus shown in fig. 1, the digital PCB and the radio frequency PCB are the same PCB 130, and the PCB 130 includes both the digital signal line and the radio frequency signal line. The first digital signal line 151 and the second digital signal line 152 may be used to transmit digital signals. Optionally, the chip to be tested may include two digital signal ports, and when the chip to be tested is tested, the chip to be tested may be placed in the recessed structure 111, and the two test ports of the chip to be tested may be respectively contacted with the third test pin 123 and the fourth test pin 124, so that the performance test on the digital signal port of the chip to be tested is implemented through the electrical connection of the third test pin 123, the first digital signal line 151, the fourth test pin 124, and the second digital signal line 152.

Fig. 2 is a schematic structural diagram of a test probe according to an embodiment of the present invention, referring to fig. 2, optionally, the test probe 120 includes a tip portion 1201, a body portion 1202 and a fixing portion 1203, where the body portion 1202 is located between the tip portion 1201 and the fixing portion 1203, the tip portion 1201 is conical, and the tip portion 1201 is used for contacting a chip to be tested;

the pin body part 1202 and the fixing part 1203 are cylindrical, the pin body part 1202 is located in the first via hole 101, the fixing part 1203 is located on one side, close to the PCB 130, of the guide frame 110, and the diameter of the fixing part 1203 is larger than that of the first via hole 101;

Alternatively, the testing tip 120 shown in fig. 2 can be applied to a QFN (Quad Flat No-lead Package) and a QFP (Quad Flat Package) chip to be tested. Specifically, in the chips to be tested of QFN and LGA, the pad surface of the bottom surface of the chip to be tested is usually flat, and the tip portion 1201 of the testing probe 120 shown in fig. 2 is conical, and the tip of the cone contacts the pad of the bottom surface of the chip to be tested during testing. Alternatively, the extreme tip of the needle tip is semi-spherical as shown in fig. 2. When the test needle 120 is installed, the guide frame 110 may be reversed, and then the test needle 120 passes through the first via hole 101 of the recessed structure 111 by pressing, optionally, the diameter of the needle body 1202 is equal to the diameter of the first via hole 101, so that the test needle 120 may contact with the sidewall of the first via hole 101 and have a force action, and the test needle 120 may not fall out of the first via hole 101. After the mounting, the fixing portion 1203 is located on a side of the guide frame 110 close to the PCB 130, so that the test needles 120 do not fall off from the surface of the guide frame 110 having the recessed structure 111.

Fig. 3 is a partial enlarged view of fig. 1, fig. 4 is a top view of the bottom surface of the recessed structure in fig. 1, and in combination with fig. 1, fig. 3 and fig. 4, optionally, the chip testing apparatus further includes a grounding copper block 160, the grounding copper block 160 is disposed on the bottom surface of the recessed structure 111, and the area of the grounding copper block 160 is smaller than that of the bottom surface of the recessed structure 111; the grounding copper block 160 comprises a plurality of second through holes 102, the plurality of test needles 120 further comprises a fifth test needle 125, and the fifth test needle 125 penetrates through the second through holes 102;

wherein the bottom surface of the recess 111 includes a central region 1111 and an edge region 1112 surrounding the central region 1111, wherein the grounding copper block 160 is located in the central region 1111, and the first test tip 121, the second test tip 122, the third test tip 123 and the fourth test tip 124 are located in the edge region 1112.

Specifically, the middle portion of the to-be-tested chip of QFN and LGA usually includes the ground pad, and the chip testing apparatus shown in fig. 1 and 3 can be used for the to-be-tested chip of QFN and LGA, and includes the ground chip corresponding to the ground pad, so that when the chip testing apparatus of this embodiment is used to test the to-be-tested chip, the to-be-tested chip can be reliably grounded.

With reference to fig. 1, optionally, the chip testing apparatus further includes a testing seat housing 170, the testing seat housing 170 and the guide frame 110 are disposed on the same side of the PCB 130, and the testing seat housing 170 is located around the guide frame 110, the testing seat housing 170 and the guide frame 110 form a testing seat, the testing seat housing 170 is fixedly connected to the guide frame 110, or the testing seat housing 170 and the guide frame 110 are an integrated structure.

With reference to fig. 1, optionally, the guide frame 110 and/or the test socket housing 170 further include fourth through holes 104, a fifth through hole 105 is disposed on the PCB 130, and the fifth through hole 105 corresponds to the fourth through hole 104 in the thickness direction y of the chip testing apparatus; the chip testing device further comprises a fixing structure 201, wherein the fixing structure 201 penetrates through the fourth through hole 104 and the fifth through hole 105 and is used for fixing the test socket with the PCB 130;

optionally, the guide frame 110 and/or the test socket housing 170 further include sixth via holes 106, a seventh via hole 107 is disposed on the PCB 130, and the seventh via holes 107 correspond to the sixth via holes 106 in the thickness direction y of the chip testing apparatus one to one; the chip testing device further comprises a positioning structure 202, and the positioning structure 202 penetrates through the sixth through hole 106 and the seventh through hole 107 and is used for positioning the test socket and the PCB 130.

Specifically, when assembling the chip testing apparatus, the test socket with the test needle 120 and the grounding copper block 160 mounted thereon may be first aligned with the seventh via hole 107 through the sixth via hole 106, and a positioning structure 202, such as a positioning pin, may be inserted into the sixth via hole 106 and the seventh via hole 107. The fixing structure 201 is then inserted into the fourth via hole 104 and the fifth via hole 105, wherein the fixing structure 201 may be a screw, and is mounted and locked on the test socket PCB 130 by the screw. When the chip is tested, the concave structure 111 of the guide frame 110 can limit the position of the chip, and when the chip to be tested is placed in the concave structure 111, the chip to be tested can be placed in the concave structure 111 according to the pin 1. The pin1 angle can be a set pin of the chip to be tested, and the chip to be tested is placed in the recessed structure 111 according to the set pin position, so that the relative position of the chip to be tested and each test needle 120 can be ensured to be accurate.

In the above embodiments, the test socket housing 170 and the guide frame 110 are of a same-layer structure, but in other embodiments of the present invention, the test socket housing 170 and the guide frame 110 may be of different-layer structures, which can be referred to in the following embodiments.

Fig. 5 is a schematic structural diagram of another chip testing device according to an embodiment of the present invention, fig. 6 is a partial enlarged view of fig. 5, and referring to fig. 5 and 6, optionally, the PCB 130 is an rf PCB 131, and the chip testing device further includes a digital PCB 132 and a test socket housing 170; the test socket housing 170 and the guide frame 110 form a test socket, the test socket housing 170 is fixedly connected with the guide frame 110, or the test socket housing 170 and the guide frame 110 are an integrated structure;

the test socket housing 170 is disposed on one side of the digital PCB 132, the guide frame 110 is disposed on one side of the test socket away from the digital PCB 132, and the surface of the guide frame 110 away from the digital PCB 132 includes a recessed structure 111; the radio frequency PCB 131 is partially arranged between the guide frame 110 and the test socket; at the recessed structure 111, the first via 101 penetrates through the guide frame 110;

the plurality of test needles 120 further includes a third test needle 123 and a fourth test needle 124, the third test needle 123 being electrically connected to the first digital signal line 151, the fourth test needle 124 being electrically connected to the second digital signal line 152; the first and second

digital signal lines

151 and 152 are disposed on the digital PCB 132, and the first and second

rf signal lines

141 and 142 are disposed on the rf PCB 131.

Specifically, the test socket housing 170 and the guide frame 110 may be separate structures, and the test socket housing 170 and the guide frame 110 are connected and fixed by a connection structure; the test socket housing 170 and the guide frame 110 may be a unitary structure, i.e., may be secured without other connecting structures.

Referring to fig. 5, in the present embodiment, the digital PCB 132 and the rf PCB 131 are different boards, wherein the digital signal lines (including the first digital signal line 151 and the second digital signal line 152) are disposed on the digital PCB 132, so that the digital signals can be transmitted through the digital signal lines on the digital PCB 132. Radio frequency signal lines (including a first radio frequency signal line 141 and a second radio frequency signal line 142) are disposed on the radio frequency PCB 131, and a high frequency signal may be transmitted through the radio frequency signal lines on the radio frequency PCB 131.

It should be noted that, in this embodiment, the electrical connection between the third test probe head 123 and the first digital signal line 151 may be a direct electrical connection or an indirect electrical connection; the electrical connection of the fourth test needle 124 to the second digital signal line 152 may be a direct electrical connection or an indirect electrical connection.

Referring to fig. 5, optionally, the rf PCB 131 may include two parts, specifically, a first rf PCB provided with a first rf signal line 141 and a second rf PCB provided with a second rf signal line 142, wherein the first rf PCB extends from below the first test pin 121 to the first rf connector 210, and the second rf PCB extends from below the second test pin 122 to the second rf connector 220.

Fig. 7 is a cross-sectional view of a chip testing apparatus according to an embodiment of the present invention, fig. 7 is a cross-sectional view taken along B-B' corresponding to fig. 6, fig. 8 is a partial enlarged view of fig. 6, and in conjunction with fig. 5 to 8, optionally, the chip testing apparatus further includes an elastic support structure 180;

the test socket housing 170 includes third via holes 103, the third via holes 103 correspond to the first via holes 101 one to one in the thickness direction y of the chip testing device, and the elastic support structure 180 is disposed in the third via holes 103 corresponding to the first via holes 101 where the first test needles 121 and the second test needles 122 are located.

Alternatively, the elastic support structure 180 may be a structure having elasticity such as a spring, a gel, etc., and the radio frequency PCB 131 itself may have elasticity. When the chip is tested, after the chip to be tested is placed into the recessed structure 111 of the guide frame 110, the chip to be tested can be pressed, and the elastic supporting structure 180 is arranged in the third via hole 103 corresponding to the first via hole 101 where the first testing needle 121 and the second testing needle 122 are located, so that after the chip to be tested is pressed, the chip to be tested can be reliably contacted with the first testing needle 121 and the second testing needle 122, and the first testing needle 121 and the second testing needle 122 can transmit high-frequency signals.

With continued reference to fig. 6-8, the rf PCB 130 includes a first rf PCB 1311 and a second rf PCB 1312, the first rf PCB 1311 and the second rf PCB 1312 being spaced apart between the bezel 110 and the test socket housing 170; the third and fourth test needles are conductive pogo pins 190, the test socket housing 170 includes third vias 103, the third vias 103 correspond to the first vias 101 one by one in the thickness direction y of the chip testing device, the conductive pogo pins 190 penetrate the third vias 103 and the first vias 101 corresponding to the third vias 103, and the conductive pogo pins 190 are located between the first radio frequency PCB 1311 and the second radio frequency PCB 1312.

Specifically, the radio frequency PCB 131 is not disposed between the third test needle 123 and the test socket housing 170 and between the fourth test needle 124 and the test socket housing 170, the conductive pogo pin 190 can directly pass through the third via 103 of the test socket housing 160 and the first via 101 corresponding to the third via 103, and the third test needle protrude out of the recessed structure 111 of the guide frame 110, and can be used for measuring a digital signal. When the chip is tested, the chip to be tested is placed in the concave structure 111 of the guide frame 110 and then pressed, and the conductive spring needle 190 has elasticity, so that after the chip to be tested is pressed, the chip to be tested can be reliably contacted with the third testing needle 123 and the fourth testing needle 124, and the reliability of the third testing needle 123 and the fourth testing needle 124 in transmitting digital signals is guaranteed.

It should be noted that, for clarity of illustrating the structure of the conductive pogo pins 190, only a part of the structure of the chip testing apparatus is shown in fig. 8.

Wherein, for the chip testing device shown in fig. 6-8, the heights of the third and fourth test needles are higher than the heights of the first and second test needles.

Fig. 9 is a schematic structural diagram of a test probe head according to an embodiment of the present invention, fig. 9 may show a structure of a first test probe head and a second test probe head, and referring to fig. 9, optionally, the first test probe head and the second test probe head include a tip portion 1201, a needle portion 1202 and a fixing portion 1203, where the needle portion 1202 is located between the tip portion 1201 and the fixing portion 1203, a side of the tip portion 1201 away from the needle portion 1202 includes a groove, and the tip portion 1201 is used for contacting a chip to be tested;

the needle body part 1202 and the fixing part 1203 are cylindrical, the needle body part 1202 is located in the first through hole 101, the fixing part 1203 is located on one side, close to the radio frequency PCB, of the guide frame, and the diameter of the fixing part 1203 is larger than that of the first through hole 101;

Alternatively, the test probe 120 shown in fig. 9 may be applied to a chip to be tested of LGA (Land Grid Array) or BGA (Ball Grid Array Package). Specifically, for the chips to be tested of LGA and BGA, the pad surface of the bottom surface of the chip to be tested is usually a convex spherical shape, the tip portion 1201 of the testing probe 120 shown in fig. 9 has a groove, and the convex spherical pad of the chip to be tested can be embedded into the groove of the tip portion 1201 during testing. Alternatively, the recess of the needle tip 1201 may be crown shaped as shown in fig. 9. When the test needle 120 is installed, the guide frame 110 may be reversed, and then the test needle 120 passes through the first via hole 101 of the recessed structure 111 by pressing, optionally, the diameter of the needle body 1202 is equal to the diameter of the first via hole 101, so that the test needle 120 may contact with the sidewall of the first via hole 101 and have a force action, and the test needle 120 may not fall out of the first via hole 101. After the mounting, the fixing portion 1203 is located on a side of the guide frame 110 close to the PCB 130, so that the test needles 120 do not fall off from the surface of the guide frame 110 having the recessed structure 111.

On the basis of the above embodiments, with reference to fig. 2 and 9, optionally, the height h of the test needle 120 is greater than or equal to 0.01 mm and less than or equal to 3 mm, so that the height of the test needle 120 is smaller, and correspondingly, parasitic parameters such as resistance, capacitance, inductance and the like of the test needle 120 are smaller, so that the loss when the test needle 120 transmits a signal is smaller, which is more favorable for improving the transmission accuracy of a high-frequency signal and reducing the transmission distortion of the high-frequency signal. Preferably, the height h of the test needle 120 is greater than or equal to 0.2 mm and less than or equal to 3 mm.

With reference to fig. 5, optionally, the guide frame 110 and/or the test socket housing 170 further includes a fourth via hole 104, a fifth via hole 105 is disposed on the digital PCB 132, and the fifth via hole 105 corresponds to the fourth via hole 104 in the thickness direction of the chip testing apparatus; the chip testing device further comprises a fixing structure 201, wherein the fixing structure 201 penetrates through the fourth through hole 104 and the fifth through hole 105 and is used for fixing the testing seat with the digital PCB 132;

the guide frame 110 and/or the test socket housing 170 further include sixth via holes 106, the radio frequency PCB 131 and the digital PCB 132 are both provided with seventh via holes 107, and the seventh via holes 107 are in one-to-one correspondence with the sixth via holes 106 in the thickness direction of the chip testing device; the chip testing device further comprises a positioning structure 202, wherein the positioning structure 202 penetrates through the sixth through hole 106 and the seventh through hole 107 and is used for positioning the test socket and the radio frequency PCB 131 or positioning the test socket and the digital PCB 132.

Specifically, when assembling the chip testing apparatus, the test socket pair with the test needle 120 and the grounding copper block 160 can be aligned with the seventh via 107 through the sixth via 106, and the positioning structure 202, such as a positioning pin, can be inserted into the sixth via 106 and the seventh via 107. The fixing structure 201 is then inserted into the fourth via hole 104 and the fifth via hole 105, wherein the fixing structure 201 may be a screw, and is mounted and locked on the test socket PCB 130 by the screw. When the chip is tested, the concave structure 111 of the guide frame 110 can limit the position of the chip, and when the chip to be tested is placed in the concave structure 111, the chip to be tested can be placed in the concave structure 111 according to the pin1 position. The pin1 angle can be a set pin of the chip to be tested, and the chip to be tested is placed in the recessed structure 111 according to the set pin position, so that the relative position of the chip to be tested and each test needle 120 can be ensured to be accurate.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A chip testing apparatus, comprising: the test device comprises a guide frame, a plurality of test needles and a PCB, wherein the guide frame is arranged on one side of the PCB;

a plurality of including first test syringe needle and second test syringe needle in the test syringe needle, first test syringe needle with first radio frequency signal line on the PCB board is connected, the second test syringe needle with second radio frequency signal line on the PCB board is connected.

2. The chip test apparatus according to claim 1, wherein the plurality of test pins further includes a third test pin electrically connected to the first digital signal line on the PCB and a fourth test pin electrically connected to the second digital signal line on the PCB, and the first rf signal line, the second rf signal line, the first digital signal line and the second digital signal line are disposed on the same PCB.

3. The chip testing device according to claim 2, wherein the testing needle comprises a needle tip portion, a needle body portion and a fixing portion, wherein the needle body portion is located between the needle tip portion and the fixing portion, the needle tip portion is conical in shape, and the needle tip portion is used for contacting with the chip to be tested;

preferably, the diameter of the needle body ranges from greater than or equal to 0.01 mm to less than or equal to 1 mm; the diameter range of the fixing part is more than 0.01 mm and less than or equal to 1.5 mm.

4. The chip testing device according to claim 3, further comprising a grounding copper block, wherein the grounding copper block is disposed on the bottom surface of the recessed structure, and the area of the grounding copper block is smaller than the area of the bottom surface of the recessed structure; the grounding copper block comprises a plurality of second through holes, the plurality of test needles further comprise fifth test needles, and the fifth test needles penetrate through the second through holes;

wherein the bottom surface of the recessed structure includes a central region and an edge region surrounding the central region, wherein the grounding copper block is located in the central region, and the first test needle, the second test needle, the third test needle and the fourth test needle are located in the edge region.

5. The chip testing device according to claim 2, further comprising a testing seat housing, wherein the testing seat housing and the guide frame are disposed on the same side of the PCB, the testing seat housing is disposed around the guide frame, the testing seat housing and the guide frame form a testing seat, and the testing seat housing is fixedly connected to the guide frame, or the testing seat housing and the guide frame are integrated.

6. The chip testing device according to claim 1, wherein the PCB board is a radio frequency PCB board, the chip testing device further comprising a digital PCB board and a test socket housing; the test seat shell and the guide frame form a test seat, and the test seat shell is fixedly connected with the guide frame, or the test seat shell and the guide frame are of an integrated structure;

the testing seat shell is arranged on one side of the digital PCB, the guide frame is arranged on one side of the testing seat far away from the digital PCB, and the surface of one side of the guide frame far away from the digital PCB comprises the concave structure; the radio frequency PCB is partially arranged between the guide frame and the test seat; at the sunken structure, the first via hole penetrates through the guide frame;

the plurality of test needles further comprise a third test needle and a fourth test needle, the third test needle is electrically connected with the first digital signal line, and the fourth test needle is electrically connected with the second digital signal line; the first digital signal line and the second digital signal line are arranged on the digital PCB board, and the first radio frequency signal line and the second radio frequency signal line are arranged on the radio frequency PCB board.

7. The chip testing apparatus according to claim 6, further comprising a resilient support structure;

the test seat shell comprises a third through hole, the third through hole corresponds to the first through hole in a one-to-one mode in the thickness direction of the chip testing device, and the elastic supporting structure is arranged in the third through hole corresponding to the first testing needle head and the first through hole where the second testing needle head is located.

8. The chip testing device according to claim 6, wherein the radio frequency PCB board comprises a first radio frequency PCB board and a second radio frequency PCB board, and a distance exists between the guide frame and the test socket shell;

the third test syringe needle with the fourth test syringe needle is electrically conductive pogo pin, the test seat casing includes the third via hole on the chip testing arrangement thickness direction, the third via hole with first via hole one-to-one, electrically conductive pogo pin runs through the third via hole with the first via hole that the third via hole corresponds, just electrically conductive pogo pin is located first radio frequency PCB board with between the second radio frequency PCB board.

9. The chip testing device according to claim 6, wherein the first testing needle and the second testing needle each comprise a needle tip portion, a needle body portion and a fixing portion, wherein the needle body portion is located between the needle tip portion and the fixing portion, one side of the needle tip portion away from the needle body portion comprises a groove, and the needle tip portion is used for contacting with the chip to be tested;

the needle body part and the fixing part are cylindrical, the needle body part is positioned in the first via hole, the fixing part is positioned on one side of the guide frame close to the radio frequency PCB, and the diameter of the fixing part is larger than that of the first via hole;

10. The chip testing apparatus according to claim 1, wherein the height of the test needle is greater than or equal to 0.01 mm and less than or equal to 3 mm.

11. The chip testing device according to claim 5, wherein the guide frame and/or the test socket housing further comprises a fourth via hole, a fifth via hole is formed in the PCB, and the fifth via hole and the fourth via hole are in one-to-one correspondence in the thickness direction of the chip testing device; the chip testing device also comprises a fixing structure, and the fixing structure penetrates through the fourth through hole and the fifth through hole and is used for fixing the testing seat and the PCB;

the guide frame and/or the test seat shell further comprises sixth through holes, seventh through holes are formed in the PCB, and the seventh through holes correspond to the sixth through holes in a one-to-one mode in the thickness direction of the chip testing device; the chip testing device further comprises a positioning structure, wherein the positioning structure penetrates through the sixth through hole and the seventh through hole and is used for positioning the test seat and the PCB.

12. The chip testing device according to claim 6, wherein the guide frame and/or the test socket housing further comprises a fourth via hole, a fifth via hole is formed in the digital PCB, and the fifth via hole and the fourth via hole are in one-to-one correspondence in the thickness direction of the chip testing device; the chip testing device also comprises a fixing structure, wherein the fixing structure penetrates through the fourth through hole and the fifth through hole and is used for fixing the testing seat and the digital PCB;

13. The chip test apparatus according to any one of claims 1 to 12, further comprising a first rf connector electrically connected to the first rf signal line and a second rf connector electrically connected to the second rf signal line.