CN111799169A - Process for processing TGV by combining femtosecond laser with HF wet etching - Google Patents
Process for processing TGV by combining femtosecond laser with HF wet etching Download PDFInfo
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- CN111799169A CN111799169A CN202010693932.4A CN202010693932A CN111799169A CN 111799169 A CN111799169 A CN 111799169A CN 202010693932 A CN202010693932 A CN 202010693932A CN 111799169 A CN111799169 A CN 111799169A
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000012545 processing Methods 0.000 title claims abstract description 22
- 238000001039 wet etching Methods 0.000 title claims abstract description 14
- 239000011521 glass Substances 0.000 claims abstract description 80
- 238000005530 etching Methods 0.000 claims abstract description 28
- 239000002184 metal Substances 0.000 claims abstract description 10
- 238000007747 plating Methods 0.000 claims abstract description 6
- 230000035515 penetration Effects 0.000 claims abstract description 5
- 239000000126 substance Substances 0.000 claims abstract description 4
- 239000010410 layer Substances 0.000 claims description 14
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 239000012790 adhesive layer Substances 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000003960 organic solvent Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 abstract description 15
- 239000011248 coating agent Substances 0.000 abstract description 4
- 238000000576 coating method Methods 0.000 abstract description 4
- 238000000227 grinding Methods 0.000 abstract description 4
- 239000000463 material Substances 0.000 description 5
- 230000010354 integration Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/352—Working by laser beam, e.g. welding, cutting or boring for surface treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
Abstract
The invention discloses a process for processing TGV by combining femtosecond laser with HF wet etching, which comprises the following steps: s1, bonding the wafer with the glass carrier plate, scanning the periphery of the hole on the glass surface by adopting femtosecond laser, and etching the annular etching hole by using HF; s2, thinning the back of the wafer and performing element engineering; s3, performing secondary pattern etching processing on the glass surface by using HF etching, and completing perforation; s4, peeling off the glass of the middle island area to complete the whole TGV penetration; s5 using O2Plasma etches the adhesion layer and the release layer to make TGV completely connected to the front surface of the wafer, and then chemical plating and metal plating processes are performed. The invention adopts the mode of combining femtosecond laser with HF wet etching, and the perforated glass carrier plate is formed by two times of etching, the influence on the whole strength is very small, the stress during grinding can still be born, the coating surface is flat, and the femtosecond laser is used for forming the perforated glass carrier plateThe laser deconstructs a circle of glass structure bonding at the periphery of the hole, so that the processing area is greatly reduced, the efficiency is improved, and a double-sided processing technology can be carried out.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a process for processing TGV by combining femtosecond laser with HF wet etching.
Background
With the rise of communication electronics, people have increasingly high demands on miniaturization and high-sensitivity modules or systems, and the requirements on signal quality are also increasingly strict. High-density integration technologies, such as System-in-Package (SiP) technologies, have been rapidly developed, but the miniaturized integrated Package of the mixed-signal multi-chip System has become one of the technical difficulties in this field. In addition to technologies such as three-dimensional chip stacking (Stacked chip), Package On Package (POP), and the like, the application of some new materials and new technologies brings opportunities for Package miniaturization, and for example, a flexible substrate, a Through Silicon Via (TSV) interposer technology and a Through Glass Via (TGV) interposer technology become one of hot research directions for vertical 3D interconnection.
The Glass material and the ceramic material have no freely moving charges, the dielectric property is excellent, the thermal expansion coefficient is close to that of silicon, the problem of poor insulating property of TSV can be avoided by using a Glass Through Glass Via (TGV) technology of replacing silicon materials with Glass, and the three-dimensional integration solution is ideal. The Through Glass Via (TGV) technology is considered as a key technology for next generation three-dimensional integration, and the core of the technology is a deep hole forming process. In addition, the TGV technology does not need to manufacture an insulating layer, thereby reducing the process complexity and the processing cost. TGV and related technologies have broad application prospects in the fields of optical communication, radio frequency, microwave, micro-electro-mechanical systems, micro-fluidic devices and three-dimensional integration.
The conventional tgv (window) process uses either Sand Blasting or Femtosecond Laser (Femtosecond Laser) to complete the through via. However, this process has the following disadvantages: (1) when the area is large during processing the through hole, the laser scanning time is long, and the processing number rate is poor; (2) the supporting force of the glass carrier plate is greatly weakened after the glass carrier plate is subjected to large-area through hole punching, and the glass carrier plate cannot bear the action of huge stress during the thinning and grinding processing of a manufactured wafer; (3) after the hole is completely punched, when a release layer (release layer) or an adhesive layer (adhesive layer) must be coated on the glass carrier in the Bonding process, the solvent and the coating material will leak from the hole or partially adhere to the hole, which causes the problem of coating uniformity.
Disclosure of Invention
In order to solve the above mentioned drawbacks in the background art, the present invention provides a process for processing TGV by femtosecond laser combined with HF wet etching, which adopts a manner of femtosecond laser combined with HF wet etching, only part of the thickness of the periphery of the pattern is removed in the first etching, so that the through hole is not completed, but the through hole pattern is completely formed into the glass carrier plate which is not completely through-hole, the whole strength is not influenced, the whole strength is extremely small, and the glass carrier plate can still bear the stress during grinding, the coating surface is flat (no holes are formed), the femtosecond laser only needs to decompose one circle of glass structure bonding around the holes, the processing area is greatly reduced, the efficiency is improved, then a release layer or an adhesion layer can be coated smoothly, temporary or permanent bonding with a Si wafer can be completed smoothly, and then the wafer is thinned to the minimum (thin) thickness by adopting the grinding and etching technology, and then the double-sided processing technology can be carried out.
The purpose of the invention can be realized by the following technical scheme:
a process for processing TGV by femtosecond laser combined with HF wet etching comprises the following steps:
s1, bonding the front surface of the wafer with a glass carrier plate, then turning over the glass carrier plate to the glass surface, scanning the peripheral region of the hole of the glass carrier plate by femtosecond laser, deconstructing the glass bond of the modified region, and etching the region by HF to form an annular etched hole;
s2, overturning to the wafer surface, and thinning and performing element engineering on the back surface of the wafer;
s3, turning over the glass surface again, and performing pattern etching processing for the second time by HF etching until the perforation is completed;
s4, debonding the middle island glass area through laser, then putting the wafer and the glass carrier plate into pure water, and peeling the middle island glass through water flow to complete the whole TGV penetration;
s5 using O2Plasma etches the adhesion layer to stop the through hole on the surface of the wafer until the TGV is completely communicated with the front surface of the wafer, and then chemical plating and metal electroplating processes are performed.
Preferably, the depth of the etching holes in step (1) is 50-90% of the thickness of the glass carrier plate.
Preferably, the femtosecond laser has a central wavelength of 750--15-500×10-15s, the repetition frequency is tuned between 1 and 103 kHz.
Preferably, the bonding of the front surface of the wafer to the glass carrier plate in the step (1) is temporary bonding or permanent bonding.
Preferably, the bonding of the glass carrier plate on the front surface of the wafer in the step (1) is temporary bonding, after the metal process in the step (5) is completed, the glass carrier plate is turned over to be upward, the ultrathin wafer is attached to the UV film frame, the release layer is deconstructed by laser scanning, then the glass carrier plate is removed, the adhesive layer is removed by an organic solvent, and after the cleaning is completed, the wafer is cut and packaged.
Preferably, in the step (5), the metal process is performed on one side of the wafer or simultaneously performed on both sides of the wafer and the glass.
The invention has the beneficial effects that:
1. the femtosecond laser of the invention decomposes the main bonding of the glass, and the etching rate of the area after laser treatment is more than ten times of that of other areas, so that the whole glass can be etched to form processed hole patterns smoothly.
2. The invention only removes part of the thickness of the periphery of the pattern in the first etching, the thickness of the etched glass part is more than 50%, and less glass in other areas can be lost in the second etching.
3. The glass carrier plate has the function of a carrier plate, and the wafer thinning and metal manufacturing processes can be carried out on a single surface of a wafer or on two surfaces of the wafer and the glass simultaneously. Meanwhile, the glass carrier plate can also have the function of a permanently bonded transfer plate (TGV), and has the function of the transfer plate (TGV) after bearing the thinned wafer.
Drawings
The invention will be further described with reference to the accompanying drawings.
FIG. 1 is a schematic view of the forming process of example 1 and example 2, step 1 of the present invention;
FIG. 2 is a schematic view of the forming process of example 1 and step 2 of example 2;
FIG. 3 is a schematic view of the forming process of example 1 and example 2, step 3 of the present invention;
FIG. 4 is a schematic view of the step 4 process of examples 1 and 2 of the present invention;
FIG. 5 is a schematic view of the step 5 process of example 1 of the present invention;
FIG. 6 is a schematic view of the step 5 process of example 2 of the present invention;
FIG. 7 is a schematic view of the step 6 process of example 2 of the present invention.
In the figure:
1-wafer, 2-glass carrier plate, 3-first etching through hole, 4-adhesion layer, 5-release layer, 6-second etching through hole, 7-middle island glass, 8-TGV through hole, 9-UV film frame, and 10-grain.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "opening," "upper," "lower," "thickness," "top," "middle," "length," "inner," "peripheral," and the like are used in an orientation or positional relationship that is merely for convenience in describing and simplifying the description, and do not indicate or imply that the referenced component or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the present invention.
Example 1
A process for processing TGV by femtosecond laser combined with HF wet etching comprises the following steps:
s1, permanently bonding the front surface of the wafer with the glass carrier plate, then turning over to the glass surface, scanning the peripheral area of the hole of the glass carrier plate by femtosecond laser, deconstructing the glass bond in the area, and etching by HFEtching the region to form annular etching holes with depth of 85% of the thickness of the glass carrier, femtosecond laser center wavelength of 810nm and pulse width of 320 × 10-15s, repetition frequency of 100 kHz;
s2, overturning to the wafer surface, and thinning and performing element engineering on the back surface of the wafer;
s3, turning over the glass surface again, and performing pattern etching processing for the second time by HF etching until the perforation is completed;
s4, debonding the middle island glass area through laser, then putting the wafer and the glass carrier plate into pure water, and peeling the middle island glass through water flow to complete the whole TGV penetration;
s5 using O2Plasma etches the adhesion layer to stop the through hole on the surface of the wafer until the TGV is completely communicated with the front surface of the wafer, and then double-sided plating and metal electroplating processes of the wafer surface and the glass surface are manufactured.
Example 2
A process for processing TGV by femtosecond laser combined with HF wet etching comprises the following steps:
s1, temporarily bonding the front surface of the wafer to the glass carrier plate, then turning over to the glass surface, scanning the peripheral area of the hole of the glass carrier plate by femtosecond laser, deconstructing the glass bond in the area, etching the area by HF to form an annular etching hole, wherein the depth of the etching hole is 80% of the thickness of the glass carrier plate, the center wavelength of the femtosecond laser is 780nm, and the pulse width is 92 × 10-15s, repetition frequency 85 kHz;
s2, overturning to the wafer surface, and thinning and performing element engineering on the back surface of the wafer;
s3, turning over the glass surface again, and performing pattern etching processing for the second time by HF etching until the perforation is completed;
s4, debonding the middle island glass area through laser, then putting the wafer and the glass carrier plate into pure water, and peeling the middle island glass through water flow to complete the whole TGV penetration;
s5 using O2Plasma etching the adhesive layer to stop the through hole on the wafer surface, so that the TGV is fully connected to the front surface of the waferThen, the wafer surface chemical plating and metal electroplating processes are manufactured;
s6, turning the glass carrying plate upwards, attaching the ultrathin wafer to the UV film frame, scanning by laser to deconstruct the release layer, removing the glass carrying plate, removing the adhesion layer by using an organic solvent, and cutting and packaging the wafer after cleaning.
In the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.
Claims (6)
1. A process for processing TGV by femtosecond laser combined with HF wet etching is characterized by comprising the following steps:
s1, bonding the front surface of the wafer with a glass carrier plate, then turning over the glass carrier plate to the glass surface, scanning the peripheral region of the hole of the glass carrier plate by femtosecond laser, deconstructing the glass bond of the modified region, and etching the region by HF to form an annular etched hole;
s2, overturning to the wafer surface, and thinning and performing element engineering on the back surface of the wafer;
s3, turning over the glass surface again, and performing pattern etching processing for the second time by HF etching until the perforation is completed;
s4, debonding the middle island glass area through laser, then putting the wafer and the glass carrier plate into pure water, and peeling the middle island glass through water flow to complete the whole TGV penetration;
s5 using O2Plasma etches the adhesion layer to stop the through hole on the surface of the wafer until the TGV is completely communicated with the front surface of the wafer, and then chemical plating and metal electroplating processes are performed.
2. The femtosecond laser combined HF wet etching process TGV according to claim 1, wherein the depth of the etched hole in the step (1) is 50-90% of the thickness of the glass carrier plate.
3. The process of claim 1, wherein the femtosecond laser has a center wavelength of 750-850nm and a pulse width of 50 × 10-15-500×10-15s, the repetition frequency is tuned between 1 and 103 kHz.
4. The femtosecond laser combined HF wet etching process TGV as claimed in claim 1, wherein the wafer front bonding glass carrier plate in the step (1) is temporary bonding or permanent bonding.
5. The process of claim 4, wherein the bonding of the front surface of the wafer to the glass carrier plate in step (1) is temporary bonding, the metal process in step (5) is completed, the glass carrier plate is turned upside down, the ultra-thin wafer is attached to the UV film frame, the release layer is deconstructed by laser scanning, the glass carrier plate is removed, the adhesive layer is removed by organic solvent, and the wafer is cut and packaged after cleaning.
6. The process of femtosecond laser combined HF wet etching to process TGV according to claim 1, wherein the metal process in the step (5) is performed on a single wafer side or simultaneously on both wafer side and glass side.
Priority Applications (1)
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CN202010693932.4A CN111799169A (en) | 2020-07-17 | 2020-07-17 | Process for processing TGV by combining femtosecond laser with HF wet etching |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112864026A (en) * | 2021-03-23 | 2021-05-28 | 成都迈科科技有限公司 | Process for processing TGV through hole by combining laser and HF wet etching |
CN113035756A (en) * | 2021-03-24 | 2021-06-25 | 绍兴同芯成集成电路有限公司 | Method for radiating substrate in ultrathin wafer processing by using glass carrier plate |
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