CN111785627B - Manufacturing method of IGBT device with trench gate - Google Patents
Manufacturing method of IGBT device with trench gate Download PDFInfo
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- CN111785627B CN111785627B CN202010594542.1A CN202010594542A CN111785627B CN 111785627 B CN111785627 B CN 111785627B CN 202010594542 A CN202010594542 A CN 202010594542A CN 111785627 B CN111785627 B CN 111785627B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 83
- 229920005591 polysilicon Polymers 0.000 claims abstract description 66
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 40
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 18
- 230000003647 oxidation Effects 0.000 claims abstract description 17
- 230000007547 defect Effects 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims 1
- 238000001125 extrusion Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 31
- 238000010586 diagram Methods 0.000 description 7
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 4
- 238000005429 filling process Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 210000000746 body region Anatomy 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
Abstract
The application discloses a manufacturing method of an IGBT device with a trench gate, and relates to the field of semiconductor manufacturing. The method includes forming a trench on a substrate; forming an oxide layer, wherein the oxide layer covers the bottom and the side wall of the groove; filling the groove with polysilicon twice, and forming a gap with a preset width in the middle of the upper layer of the filled groove; the preset width is equal to the thickness increased by the oxidation of the polycrystalline silicon in the groove after the oxidation process treatment; forming a base region, an active region and a collector region of the IGBT device; the problem that the threshold voltage stability of an IGBT device is affected due to the fact that cavities, gaps and the like are prone to occurring at the top of a trench gate of an existing IGBT is solved; the extrusion of the top of the trench gate on the channel is avoided, the mass production of the short-channel IGBT is realized, and the performance of the IGBT device is improved.
Description
Technical Field
The application relates to the field of semiconductor manufacturing, in particular to a manufacturing method of an IGBT device with a trench gate.
Background
An Insulated Gate Bipolar Transistor (IGBT) is a core device in power electronic products, and has been widely popularized in recent years, and application products are changed from traditional power electronic device products such as white appliances, industrial frequency conversion, welding machines, and the like to electronic device products in high-end stores such as new energy automobiles, new energy equipment, and the like.
The trench IGBT vertically digs the grid inside a silicon wafer in a trench mode, so that the on-resistance of the IGBT can be reduced, the area of each unit cell unit is reduced, and the current density is increased. For the trench type IGBT device, trench etching and polysilicon filling in the substrate are the important factors in the manufacturing process, and are related to the performance of the whole device.
In the process of filling the polysilicon, after the polysilicon is filled, unreasonable phenomena such as gaps and cracks may occur on the top appearance of the trench, which is easy to affect the trench in the subsequent oxidation process, and the threshold voltage is unstable. In addition, in the increase of the density of the IGBT device, the loss of the device is reduced by further reducing the saturation voltage, and since the saturation voltage is proportional to the channel length, a short channel length is an important method for reducing the saturation voltage, but after the polysilicon filling, the squeezing of the trench channel may be aggravated.
Disclosure of Invention
In order to solve the problems in the related art, the present application provides a method for manufacturing an IGBT device having a trench gate. The technical scheme is as follows:
in one aspect, an embodiment of the present application provides a method for manufacturing an IGBT device with a trench gate, where the method includes:
forming a trench on a substrate;
forming an oxide layer, wherein the oxide layer covers the bottom and the side wall of the groove;
filling the groove by utilizing polycrystalline silicon twice, and forming a gap with a preset width in the middle of the upper layer of the filled groove; the preset width is equal to the thickness increased by the oxidation of the polycrystalline silicon in the groove after the oxidation process treatment;
and forming a base region, an active region and a collector region of the IGBT device.
Optionally, filling the trench with polysilicon twice, and forming a gap with a predetermined width in the middle of the upper layer of the filled trench, including:
carrying out first polysilicon filling, wherein the thickness of the first filled polysilicon is smaller than the depth of the groove;
etching and removing the polysilicon at the position above the preset depth in the groove;
filling polysilicon for the second time, and forming a gap with a preset width in the middle of the polysilicon filled for the second time in the groove;
and removing the polysilicon on the surface of the substrate.
Optionally, the etching to remove the polysilicon at a position above the predetermined depth in the trench includes:
determining a predetermined depth according to the depth of the defect in the trench gate with the defect, wherein the predetermined depth is greater than or equal to the depth of the defect;
and etching to remove the polysilicon at the position above the preset depth in the groove.
Optionally, forming a trench on the substrate includes:
a trench is formed in the substrate by a photolithography and etching process.
Optionally, the gap in the middle of the upper position of the trench is filled with oxide.
Optionally, forming the base region, the source region and the collector region of the IGBT device includes:
forming base regions on two sides of the trench, wherein the base regions are positioned in a drift region in the substrate;
forming a source region in the base region;
and forming a collector region on the back surface of the substrate.
Optionally, after forming the source region in the base region, the method further includes:
and forming a front metal layer on the front surface of the substrate, and leading out a source region and a trench gate of the IGBT device through the front metal layer.
Optionally, after forming the collector region on the back surface of the substrate, the method further includes:
and forming a back metal layer on the back of the substrate, and leading out a collector region of the IGBT device through the back metal layer.
The technical scheme at least comprises the following advantages:
forming a groove on a substrate, forming an oxide layer covering the bottom and the side wall of the groove, filling the groove by using polycrystalline silicon twice, forming a gap with a preset degree in the middle of the upper layer of the filled groove, wherein the preset width is equal to the thickness increased by oxidizing the polycrystalline silicon in the groove after the oxidization treatment; the problem that the threshold voltage stability of an IGBT device is affected due to the fact that cavities, gaps and the like are prone to occurring at the top of a trench gate of an existing IGBT is solved; the extrusion of the top of the trench gate on the channel is avoided, the mass production of the short-channel IGBT is realized, and the performance of the IGBT device is improved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a cross-sectional SEM view of a prior art trench after filling;
fig. 2 is a flowchart of a method for manufacturing an IGBT device with a trench gate according to an embodiment of the present application;
fig. 3 is an implementation schematic diagram of a manufacturing method of an IGBT device with a trench gate according to an embodiment of the present application;
fig. 4 is an implementation schematic diagram of a manufacturing method of an IGBT device with a trench gate according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a trench gate provided in an embodiment of the present application;
fig. 6 is a schematic diagram of a trench gate portion of an IGBT device provided by an embodiment of the present application;
fig. 7 is an implementation schematic diagram of a manufacturing method of an IGBT device with a trench gate according to an embodiment of the present application;
fig. 8 is an implementation schematic diagram of a manufacturing method of an IGBT device with a trench gate according to an embodiment of the present application;
fig. 9 is an implementation schematic diagram of a manufacturing method of an IGBT device with a trench gate according to an embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
In the manufacturing process of the IGBT device with the trench gate, the trench is filled with polysilicon to form the trench gate. In the conventional process, after the polysilicon filling, voids, gaps, cracks and other problems may occur on the upper portion of the trench gate, and as shown in fig. 1, a void 11 may occur on the upper portion of the trench gate. In the subsequent oxidation process, oxide can be generated in the hollow hole, and the generated oxide can extrude the side wall of the groove, namely, the groove of the IGBT device, so that the threshold voltage of the IGBT device is unstable, and the performance of the IGBT device is further influenced.
In order to solve the problems in the prior art, an embodiment of the present application provides a method for manufacturing an IGBT device with a trench gate, as shown in fig. 2, the method at least includes the following steps:
A substrate is provided, a drift region is formed on the substrate, and a trench is formed in the drift region.
As shown in fig. 3, a substrate 31 has a trench 32 formed therein.
Optionally, an oxide layer is formed by a thermal oxidation process, the formed oxide layer covers the bottom and the sidewall of the trench, and an oxide layer is also formed on the surface of the substrate.
As shown in fig. 4, an oxide layer 23 is formed to cover the bottom and sidewalls of the trench 22, and the oxide layer 23 is also formed on the surface of the substrate 21.
The predetermined width is equal to the increased thickness of the polysilicon in the trench after the oxidation process.
As shown in fig. 5, the polysilicon 24 is polysilicon filled for the first time, the polysilicon 24 completely fills the bottom of the trench 22, the polysilicon 25 is polysilicon filled for the second time, the polysilicon 25 filled for the second time forms a gap 26 at the middle position of the upper layer in the trench, and the width of the gap 26 is a predetermined width.
The width of the gap required to be reserved is controlled by adjusting the thickness of the polycrystalline silicon deposited for the second time.
It should be noted that the first filling polysilicon 24 and the second filling polysilicon 25 are made of the same material, and the filling process of the polysilicon is only twice as shown in fig. 5 by using different filling patterns.
Due to the appearance defects such as holes and gaps on the top of the polysilicon after the trench is filled, oxides are generated at the appearance defects such as holes and gaps in the subsequent processes such as body region ion implantation, N-type ion implantation and P-type ion implantation which involve a thermal oxidation process, and the generated oxides extrude the side wall of the trench. In order to avoid the phenomenon that the side wall of the groove is extruded by oxide generated at the hollow position, when the groove is filled with polycrystalline silicon, the filling process is divided into two times, the lower layer of the groove is completely filled in the first polycrystalline silicon filling process, the polycrystalline silicon is filled to the top of the groove in the second polycrystalline silicon filling process, and a gap with a preset width is formed in the middle of the upper layer of the groove after filling; in the subsequent oxidation process, oxide is generated in the gap with the preset width in the groove, the thickness of the generated oxide is equal to the preset width, namely, the oxide generated in the subsequent oxidation process just completely fills the gap with the preset width in the groove, the generated oxide cannot extrude the side wall of the groove, and the polycrystalline silicon in the groove cannot have appearance defects such as gaps, holes and the like.
And after the trench gate is manufactured, continuing to perform the subsequent process of manufacturing the IGBT device, wherein the gap in the middle of the upper layer position in the trench is filled with oxide, and the oxide is obtained by oxidizing polysilicon.
After a subsequent oxidation process, the gap in the trench 22 is completely filled with the grown oxide 27, as shown in fig. 6.
And 104, forming a base region, an active region and a collector region of the IGBT device.
The groove filled with the polysilicon forms a groove gate of the IGBT device, base regions of the IGBT device are formed on two sides of the groove gate, source regions of the IGBT device are formed in the base regions, and a collector region is formed on the back of the substrate.
In summary, in the method for manufacturing the IGBT device with the trench gate provided in the embodiment of the present application, the trench is formed on the substrate, the oxide layer covering the bottom and the sidewall of the trench is formed, the trench is filled with polysilicon twice, a gap with a predetermined degree is formed in the middle of the upper layer of the filled trench, and the predetermined width is equal to the thickness increased by oxidation of the polysilicon in the trench after the oxidation treatment; the problem that the threshold voltage stability of an IGBT device is affected due to the fact that cavities, gaps and the like are prone to occurring at the top of a trench gate of an existing IGBT is solved; the extrusion of the top of the trench gate on the channel is avoided, the mass production of the short-channel IGBT is realized, and the performance of the IGBT device is improved.
In an alternative embodiment based on the embodiment shown in fig. 2, the step "filling the trench with polysilicon twice, and forming a gap with a predetermined width in the middle of the upper layer of the filled trench", that is, the step 103, may be implemented by:
and step 1031, performing first polysilicon filling, wherein the thickness of the first filled polysilicon is smaller than the depth of the trench.
And depositing polycrystalline silicon, wherein the thickness of the deposited polycrystalline silicon is less than the depth of the groove, and the side wall of the groove is covered by the polycrystalline silicon filled for the first time.
As shown in fig. 7, after the first polysilicon deposition, the trench 22 is filled with polysilicon 24, the surface of the substrate is also deposited with polysilicon 24, and the sidewalls of the trench 22 are covered with polysilicon 24.
And 1032, etching to remove the polysilicon at the position above the preset depth in the groove.
The groove gate with the defects refers to the groove gate with the appearance problems of holes, gaps, cracks and the like, the defects of the groove gate generally extend downwards from the top of the groove by a certain depth, and the thickness of the polycrystalline silicon to be reserved in the groove after the first polycrystalline silicon deposition is determined to be t1 according to historical data of the depth of the defects in the groove gate with the defects, wherein t1 is less than H-H2, H represents the depth of the groove, and H2 represents the depth of the defects.
The predetermined depth is determined according to the depth of the defect in the trench gate having the defect, and the predetermined depth is greater than or equal to the depth of the defect.
To avoid the generation of topographical defects such as voids, seams, cracks, etc., the predetermined depth determined needs to be greater than or equal to the depth of the defect.
And etching to remove the polysilicon at the position above the preset depth in the groove, wherein the polysilicon on the surface of the substrate is also etched and removed.
For example, the determined predetermined depth is H1, as shown in fig. 7, after the polysilicon at the position above the depth H1 in the trench is removed by etching, the structure in the trench is as shown in fig. 8.
Step 1033, a second polysilicon filling is performed, and a gap with a predetermined width is formed between the second polysilicon filling in the trench.
Carrying out second-time polysilicon deposition, wherein the polysilicon deposited for the second time is used for filling the top of the groove; because the gap width in the middle of the polysilicon formed by the second deposition is different from the preset width, the polysilicon in the groove is etched by an etching process, so that the gap with the preset width is formed in the middle of the polysilicon filled for the second time.
As shown in fig. 9, after the second polysilicon filling, a gap 26 is formed in the middle of the polysilicon 25 in the trench 22, the width of the gap 26 is a predetermined width, and the predetermined width is a thickness increased by oxidizing the polysilicon in the trench after the oxidation process; the surface of substrate 22 is also deposited with polysilicon 25.
Step 1034, the polysilicon on the surface of the substrate is removed.
And etching to remove the residual polysilicon on the surface of the substrate to form a trench gate of the IGBT device, as shown in FIG. 5.
In an alternative embodiment based on the embodiment shown in fig. 2, the step "forming trenches on the substrate" may be implemented as follows:
a trench is formed in the substrate by a photolithography and etching process.
In an alternative embodiment based on the embodiment shown in fig. 2, the step "forming the base region, the source region and the collector region of the IGBT device", that is, the step 104, can be implemented by the following steps:
and 1041, forming base regions of the IGBT device on two sides of the trench, where the base regions are located in the drift region in the substrate.
1042, forming a source region in the base region.
Step 1043, forming a collector region on the back side of the substrate.
In an alternative embodiment based on the embodiment shown in fig. 2, the method further comprises:
after the step 1042, depositing an interlayer dielectric layer on the surface of the substrate, forming contact holes in the interlayer dielectric layer, wherein the source region and the trench gate respectively correspond to the contact holes; and forming a front metal layer on the front surface of the substrate, and leading out a source region and a trench gate of the IGBT device through the front metal layer.
Before the step 1043, back thinning is performed on the substrate; after the above step 1043, a back metal layer is formed on the back surface of the substrate, and the collector region of the IGBT device is led out through the back metal layer.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.
Claims (8)
1. A method of fabricating an IGBT device having a trench gate, the method comprising:
forming a trench on a substrate;
forming an oxide layer, wherein the oxide layer covers the bottom and the side wall of the groove;
filling the groove with polysilicon twice, and forming a gap with a preset width in the middle of the upper layer of the filled groove; the preset width is equal to the thickness increased by the oxidation of the polycrystalline silicon in the groove after the oxidation process treatment;
and forming a base region, an active region and a collector region of the IGBT device.
2. The method of claim 1, wherein the filling the trench with polysilicon twice, and forming a gap with a predetermined width in the middle of the upper layer of the filled trench comprises:
carrying out first polysilicon filling, wherein the thickness of the first filled polysilicon is smaller than the depth of the groove;
etching to remove the polysilicon at the position above the preset depth in the groove;
filling polysilicon for the second time, and forming a gap with a preset width in the middle of the polysilicon filled for the second time in the groove;
and removing the polysilicon on the surface of the substrate.
3. The method of claim 2, wherein the etching to remove polysilicon above a predetermined depth within the trench comprises:
determining the predetermined depth according to the depth of the defect in the trench gate with the defect, wherein the predetermined depth is greater than or equal to the depth of the defect;
and etching to remove the polysilicon at the position above the preset depth in the groove.
4. The method of claim 1, wherein forming a trench on a substrate comprises:
and forming a groove on the substrate through photoetching and etching processes.
5. A method according to any of claims 1 to 3, wherein the gap in the middle of the upper position of the trench is filled with an oxide.
6. The method of claim 1, wherein forming the base, source and collector regions of the IGBT device comprises:
forming the base region on two sides of the trench, wherein the base region is positioned in a drift region in the substrate;
forming the source region in the base region;
and forming a collector region on the back surface of the substrate.
7. The method as claimed in claim 6, further comprising, after forming the source region in the base region:
and forming a front metal layer on the front surface of the substrate, and leading out the source region and the trench gate of the IGBT device through the front metal layer.
8. The method of claim 6, further comprising, after forming the collector region on the back side of the substrate:
and forming a back metal layer on the back of the substrate, and leading out the collector region of the IGBT device through the back metal layer.
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| CN202010594542.1A CN111785627B (en) | 2020-06-28 | 2020-06-28 | Manufacturing method of IGBT device with trench gate |
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| CN202010594542.1A CN111785627B (en) | 2020-06-28 | 2020-06-28 | Manufacturing method of IGBT device with trench gate |
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| CN111785627B true CN111785627B (en) | 2023-03-14 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| GB0129450D0 (en) * | 2001-12-08 | 2002-01-30 | Koninkl Philips Electronics Nv | Trenched semiconductor devices and their manufacture |
| JP2007180310A (en) * | 2005-12-28 | 2007-07-12 | Toshiba Corp | Semiconductor device |
| US7956411B2 (en) * | 2008-01-15 | 2011-06-07 | Fairchild Semiconductor Corporation | High aspect ratio trench structures with void-free fill material |
| WO2011148427A1 (en) * | 2010-05-27 | 2011-12-01 | Fuji Electric Co., Ltd. | Mos-driven semiconductor device and method for manufacturing mos-driven semiconductor device |
| CN109273534A (en) * | 2018-10-30 | 2019-01-25 | 贵州恒芯微电子科技有限公司 | A kind of device of novel shielding gate power MOS |
| CN110600371A (en) * | 2019-08-23 | 2019-12-20 | 中芯集成电路制造(绍兴)有限公司 | Polycrystalline silicon filling method, semiconductor device manufacturing method and semiconductor device |
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