CN111755423B

CN111755423B - Embedded word line structure

Info

Publication number: CN111755423B
Application number: CN201910245895.8A
Authority: CN
Inventors: 陈皇男; 许明智
Original assignee: Winbond Electronics Corp
Current assignee: Winbond Electronics Corp
Priority date: 2019-03-28
Filing date: 2019-03-28
Publication date: 2021-10-22
Anticipated expiration: 2039-03-28
Also published as: CN111755423A

Abstract

The invention provides an embedded word line structure, which comprises a substrate, an isolation structure and an embedded word line. The isolation structure is located in the substrate and defines a plurality of active regions separated from each other. The active region extends in a first direction. The embedded word line is located in the substrate. The embedded word line extends through the isolation structure and the active region in the second direction. The first direction intersects the second direction. The embedded word lines are isolated from the substrate. The same embedded word line includes a first portion and a second portion. The first portion is located in the active region. The second part is positioned in the isolation structure between two adjacent active regions in the first direction. The width of the first portion is greater than the width of the second portion. The embedded word line structure can effectively prevent the generation of leakage current between the embedded word line and the active region.

Description

Embedded word line structure

Technical Field

The present invention relates to semiconductor structures, and more particularly to a buried word line structure.

Background

Generally, the buried word line extends through an active region (active region) and an isolation structure. However, in the case of the deviation of the embedded word lines, the embedded word lines that should be located in the isolation structure are deviated to the outside of the isolation structure, and a leakage current is generated between the embedded word lines and the active region.

Disclosure of Invention

The invention provides a buried word line structure which can effectively prevent leakage current from being generated between a buried word line and an active region.

The invention provides an embedded word line structure, which comprises a substrate, an isolation structure and an embedded word line. The isolation structure is located in the substrate and defines a plurality of active regions separated from each other. The active region extends in a first direction. The embedded word line is located in the substrate. The embedded word line extends through the isolation structure and the active region in the second direction. The first direction intersects the second direction. The embedded word lines are isolated from the substrate. The same embedded word line includes a first portion and a second portion. The first portion is located in the active region. The second part is positioned in the isolation structure between two adjacent active regions in the first direction. The width of the first portion is greater than the width of the second portion.

Based on the above, in the embedded word line structure provided by the present invention, since the second portion of the embedded word line is located in the isolation structure between two adjacent active regions in the first direction and has a narrower width, an overlap margin (overlap margin) between the second portion of the embedded word line and the isolation structure can be effectively increased. Therefore, when the embedded word line is deviated, the second part of the embedded word line can be prevented from being deviated to the outside of the isolation structure, and further, the leakage current can be prevented from being generated between the embedded word line and the active region.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1A to fig. 1K are top views illustrating a manufacturing process of a buried word line structure according to an embodiment of the invention.

Fig. 2A to 2K are sectional views taken along line I-I' in fig. 1A to 1K.

[ notation ] to show

10: embedded word line structure

100: substrate

102: isolation structure

104. 106, 108a, 108b, 110a, 120: mask layer

108 p: mask pattern

112: patterned mask layer

114: spacer layer

114 a: spacer wall

116: patterning photoresist layer

118. 122: opening of the container

124: dielectric layer

126: barrier layer

128: embedded word line

AA: active region

D: distance between two adjacent plates

D1: a first direction

D2: second direction

P1: the first part

P2: the second part

W1, W2: width of

Detailed Description

Fig. 1A to fig. 1K are top views illustrating a manufacturing process of a buried word line structure according to an embodiment of the invention. Fig. 2A to 2K are sectional views taken along line I-I' in fig. 1A to 1K. In fig. 1A to 1K, some components in fig. 2A to 2K are omitted to clearly describe the arrangement relationship of the remaining components with respect to the isolation structure and the active region. For example, in fig. 1A, mask layer 104, mask layer 106, mask layer 108, and mask layer 110 in fig. 2A are omitted.

Referring to fig. 1A and fig. 2A, an isolation structure 102 is formed in a substrate 100 to define a plurality of active regions AA separated from each other. The substrate 100 may be a semiconductor substrate, such as a silicon substrate. The isolation structure 102 is, for example, a Shallow Trench Isolation (STI) structure. The material of the isolation structure 102 is, for example, silicon nitride or silicon oxide. In the present embodiment, the isolation structure 102 is made of silicon nitride as an example.

Further, the active area AA extends in the first direction D1. The active areas AA may be arranged in the first direction D1. The active areas AA may be arranged in a staggered manner in the second direction D2. The first direction D1 intersects the second direction D2. The top view shape of the active area AA is, for example, a parallelogram, but the invention is not limited thereto. In addition, the first direction D1 may be parallel to the long side of the active area AA, and the second direction D2 may be parallel to the short side of the active area AA.

Next, a mask layer 104, a mask layer 106, a mask layer 108, and a mask layer 110 are sequentially formed on the substrate 100. The mask layer 104 is made of diamond-like carbon (DLC), the mask layer 106 is made of nitrogen-rich silicon oxynitride (SiON-N), the mask layer 108 is made of silicon oxide, and the mask layer 110 is made of oxygen-rich silicon oxynitride (SiON-O), but the invention is not limited thereto.

Then, a patterned mask layer 112 is formed on the mask layer 110. The patterned mask layer 112 may extend in the second direction. The material of the patterned mask layer 112 is, for example, polysilicon, silicon oxide, silicon nitride, carbon, or silicon oxynitride. The patterned mask layer 112 may be formed by performing a deposition process, a photolithography process, and an etching process.

Referring to fig. 1B and fig. 2B, a spacer layer 114 is formed on the mask layer 110 and the patterned mask layer 112. The spacer layer 114 may be conformally formed on the patterned mask layer 112. The material of the spacer layer 114 is, for example, silicon oxide.

Referring to fig. 1C and fig. 2C, the spacer layer 114 is etched back to form a spacer 114a on the sidewall of the patterned mask layer 112. The patterned mask layer 112 is then removed.

Referring to fig. 1D and fig. 2D, a portion of the mask layer 110 is removed by using the spacers 114a as a mask, so as to form the mask layer 110 a. Then, the mask layer 108a is formed by removing a portion of the mask layer 108 using the spacers 114a and the mask layer 110a as masks. In addition, in the process of removing a portion of the mask layer 108, the spacers 114a may be removed at the same time.

Referring to fig. 1E and fig. 2E, the mask layer 110a is removed. The mask layer 110a may be removed by a wet etching process. In addition, since the wet etching process has an etching selectivity ratio with respect to the mask layer 110a and the mask layer 106, the mask layer 110a may be removed and the mask layer 106 may remain by the wet etching process.

Then, a patterned photoresist layer 116 is formed. The patterned photoresist layer 116 has an opening 118, and the opening 118 exposes the mask layer 108a between two adjacent active areas AA in the first direction D1.

Referring to fig. 1F and fig. 2F, a wet etching process is performed on the mask layer 108a exposed by the opening 118 to form a mask layer 108 b. The mask layer 108a and the mask layer 108b located in the second direction D2 may form a mask pattern 108 p. The mask pattern 108p may extend in the second direction D2. The same mask pattern 108p may include a mask layer 108a and a mask layer 108 b. The mask layer 108a may be located in the active area AA. The mask layer 108b may be located between two adjacent active areas AA in the first direction D1. The width of the mask layer 108a may be greater than the width of the mask layer 108 b. The height of the mask layer 108a may be greater than the height of the mask layer 108 b. The top view shape of the mask pattern 108p is, for example, a chain shape with intervals between thick and thin. The etchant used in the wet etching process is, for example, buffered hydrofluoric acid (BHF) or diluted hydrofluoric acid (DHF).

Referring to fig. 1G and fig. 2G, the patterned photoresist layer 116 is removed. Next, a mask layer 120 is formed to cover the mask layer 108a and the mask layer 108 b. The material of the mask layer 120 is, for example, polysilicon.

Referring to fig. 1H and fig. 2H, the mask layer 120 is etched back to remove a portion of the mask layer 120 until the mask layer 108a and the mask layer 108b are exposed.

Referring to fig. 1I and 2I, the mask layer 108a and the mask layer 108b are removed, and an opening 122 is formed in the mask layer 120. The opening 122 may extend in the second direction D2. Since the opening 122 is formed by removing the mask layer 108a and the mask layer 108b, the pattern of the mask pattern 108p may be transferred to the opening 122.

Referring to fig. 1J and fig. 2J, the opening 122 in the mask layer 120 is extended into the substrate 100 and the isolation structure 102. For example, the method of extending the opening 122 into the substrate 100 and the isolation structure 102 may include the following steps, but the invention is not limited thereto. The mask layer 106 and the mask layer 104 are patterned by removing a portion of the mask layer 106 and a portion of the mask layer 104 by dry etching using the mask layer 120 as a mask. The mask layer 120 may be removed simultaneously with the process of patterning the mask layer 106 and the mask layer 104 or by another etching process. Next, the mask layer 106 is removed by wet etching. Then, a portion of the substrate 100 and a portion of the isolation structure 102 are removed by dry etching using the patterned mask layer 104 as a mask, so as to extend the opening 122 into the substrate 100 and the isolation structure 102.

Next, a dielectric layer 124 is formed on the surface of the substrate 100 in the opening 122. The material of the dielectric layer 124 is, for example, silicon oxide. The dielectric layer 124 is formed by, for example, in-situ steam generation (ISSG).

Then, the barrier layer 126 and the buried word line 128 are formed in the opening 122. The formation of the barrier layer 126 and the buried word line 128 may include the following steps, but the invention is not limited thereto. First, a barrier material layer (not shown) may be conformally formed in the opening 122. Next, a buried word line material layer (not shown) is formed on the barrier material layer to fill the opening 122. Then, the buried word line material layer and the barrier material layer are etched back to form the barrier layer 126 and the buried word line 128 in the opening 122. In the above etching back process, the mask layer 104 may be used to protect the substrate 100 to prevent the substrate 100 from being damaged.

The barrier layer 126 is located between the buried word line 128 and the dielectric layer 124. The top of the barrier layer 126 may be lower than the top of the substrate 100. The material of the barrier layer 126 is, for example, Ti, TiN, Ta, TaN, or a combination thereof.

The buried word line 128 extends through the isolation structure 102 and the active area AA in the second direction D2. The material of the buried word line 128 may be a conductive material. For example, the material of the buried word line 128 is a metal such as tungsten. The buried word lines 128 are isolated from the substrate 100. The same embedded word line 128 includes a first portion P1 and a second portion P2. The first portion P1 is located in the active area AA. The second portion P2 is located in the isolation structure 102 between two adjacent active regions AA in the first direction D1. The width W1 of the first portion P1 is greater than the width W2 of the second portion P2. The first portion P1 and the second portion P2 may be connected in series in the second direction D2. The embedded word lines 128 are, for example, in a chain shape with different thicknesses in the top view, but the invention is not limited thereto. The width W2 of the second portion P2 may be less than the distance D between two adjacent active areas AA located in the first direction D1. The width W1 of the first portion P1 may be less than the distance D between two adjacent active areas AA located in the first direction D1. The top of the buried word line 128 may be lower than the top of the substrate 100.

In addition, the dielectric layer 124 is located between the buried word line 128 and the substrate 100, so that the buried word line 128 and the substrate 100 can be isolated. The top of the dielectric layer 124 may be higher than the top of the buried word line 128.

Referring to fig. 1K and fig. 2K, after the formation of the buried word lines 128, the mask layer 104 may be removed. The mask layer 104 may be removed by an ashing process or an etching process.

The embedded word line structure 10 of the present embodiment is described below with reference to fig. 1K and fig. 2K. In the present embodiment, although the method for forming the embedded word line structure 10 is described by taking the above method as an example, the invention is not limited thereto.

Referring to fig. 1K and fig. 2K, the buried word line structure 10 includes a substrate 100, an isolation structure 102 and a buried word line 128, and may further include at least one of a dielectric layer 124 and a barrier layer 126. The buried word line structure 10 can be applied to various semiconductor devices, such as a Dynamic Random Access Memory (DRAM). The isolation structure 102 is disposed in the substrate 100 and defines a plurality of active regions AA separated from each other. The active area AA extends in a first direction D1. The buried word line 128 is located in the substrate 100. The buried word line 128 extends through the isolation structure 102 and the active area AA in the second direction D2. The first direction D1 intersects the second direction D2. The buried word lines 128 are isolated from the substrate 100. The same embedded word line 128 includes a first portion P1 and a second portion P2. The first portion P1 is located in the active area AA. The second portion P2 is located in the isolation structure 102 between two adjacent active regions AA in the first direction D1. The width W1 of the first portion P1 is greater than the width W2 of the second portion P2. The dielectric layer 124 is located between the buried word line 128 and the substrate 100. The barrier layer 126 is located between the buried word line 128 and the dielectric layer 124. In addition, the materials, the arrangement, the forming method and the effects of the components in the embedded word line structure 10 are described in detail in the above embodiments, and will not be repeated herein.

Based on the above embodiments, in the buried word line structure 10, since the second portion P2 of the buried word line 128 is located in the isolation structure 102 between two adjacent active regions AA in the first direction D1 and has a narrower width, the overlap margin between the second portion P2 of the buried word line 128 and the isolation structure 102 can be effectively increased. As a result, when the buried word line 128 is shifted, the second portion P2 of the buried word line 128 is prevented from being shifted to the outside of the isolation structure 102, and thus, the leakage current between the buried word line 128 and the active area AA can be prevented.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims

1. A buried word line structure, comprising:

a substrate;

an isolation structure in the substrate defining a plurality of active regions separated from each other, wherein the plurality of active regions extend in a first direction; and

a buried word line in the substrate and extending through the isolation structure and the active regions in a second direction, wherein the first direction intersects the second direction, the buried word line and the substrate are isolated from each other, and

the same embedded word line includes a first portion and a second portion, wherein the first portion is located in the plurality of active regions, the second portion is located in the isolation structure between two adjacent active regions in the first direction, and a width of the first portion is greater than a width of the second portion.

2. The buried word line structure of claim 1, wherein the plurality of active regions are arranged along the first direction.

3. The buried word line structure of claim 1, wherein the plurality of active regions are staggered in the second direction.

4. The buried word line structure of claim 1, wherein a material of the buried word line includes a conductor material.

5. The buried word line structure of claim 1, wherein the first portion and the second portion are concatenated in the second direction.

6. The buried word line structure of claim 5, wherein an upper view shape of the buried word line includes a chain shape of thick and thin lines.

7. The buried word line structure of claim 1, wherein a width of the second portion is smaller than a distance between two adjacent active regions located in the first direction.

8. The buried word line structure of claim 1, wherein a width of the first portion is smaller than a distance between two adjacent active regions located in the first direction.

9. The buried word line structure of claim 1, further comprising:

a dielectric layer between the embedded word line and the substrate.

10. The buried word line structure of claim 9, further comprising:

a barrier layer between the buried word line and the dielectric layer.