CN111710286B

CN111710286B - Display panel, driving control method thereof and display device

Info

Publication number: CN111710286B
Application number: CN202010617735.4A
Authority: CN
Inventors: 金慧俊
Original assignee: Shanghai AVIC Optoelectronics Co Ltd
Current assignee: Shanghai AVIC Optoelectronics Co Ltd
Priority date: 2020-06-30
Filing date: 2020-06-30
Publication date: 2023-01-24
Anticipated expiration: 2040-06-30
Also published as: CN111710286A

Abstract

The invention discloses a display panel, a driving control method thereof and a display device, and relates to the technical field of display, wherein a display area comprises at least one sub-display area; the display panel comprises a first starting trigger signal line, a plurality of cascaded shift registers, a second starting trigger signal line, a first clock signal line group and a second clock signal line group, wherein the first starting trigger signal line, the plurality of cascaded shift registers, the first clock signal line group and the second clock signal line group are positioned in a non-display area; the first clock signal line group comprises at least one first clock signal line, and the second clock signal line group comprises at least one second clock signal line; the shift registers corresponding to the scanning lines in the sub-display area form a first shift register group, wherein the shift registers in the first shift register group are electrically connected with the first clock signal line, and the shift registers outside the first shift register group are electrically connected with the second clock signal line; the shift register in the first stage in the first shift register group is also electrically connected with the second start triggering signal line. Thus, the power consumption is reduced and the standby time is prolonged.

Description

Display panel, driving control method thereof and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel, a driving control method thereof, and a display device.

Background

From the CRT (Cathode Ray Tube) era to the liquid crystal era, and then to the current O backlight (Organic Light-Emitting Diode) era, the display industry has been developing for decades. The display industry is closely related to our lives, and display technologies cannot be separated from traditional mobile phones, flat panels, televisions and PCs, to current intelligent wearable devices and VRs.

TFT-LCD (Thin Film Transistor Liquid Crystal Display) and AMOLED (Active Matrix Driving OLED) Display devices are increasingly applied to the field of high performance Display because of their features of small size, low power consumption, no radiation, relatively low manufacturing cost, etc.

In the display device, each pixel in the panel is generally driven by a driving circuit to perform display. The driving circuit mainly comprises a grid driving circuit and a data driving circuit. The data driving circuit is used for latching input data and a clock signal in a timing sequence, converting the latched data into an analog signal and inputting the analog signal to a data line of the panel. The grid driving circuit is used for converting the clock signal into an on/off voltage through the shift register and outputting the on/off voltage to each grid line of the panel respectively. With the development of application technologies, people have increasingly high requirements on low power consumption performance of display devices.

Therefore, it is an urgent need to solve the technical problem of the art to provide a display panel with low power consumption and capable of avoiding the waste of panel power.

Disclosure of Invention

In view of this, the present invention provides a display panel, a driving control method thereof, and a display device, which are beneficial to reducing power consumption of a display state of a screen and prolonging standby time of the display panel and the display device while realizing screen display.

In a first aspect, the present application provides a display panel, which is provided with a display area and a non-display area, wherein the display area includes at least one sub-display area; the display panel includes:

a plurality of scanning lines located in the display area;

the shift register comprises a shift signal input end, a shift signal output end and a scanning signal output end; the scanning signal output end of each shift register is electrically connected with the scanning line respectively; the shift signal input end of the shift register of the first stage is connected with the first starting trigger signal line; in any two adjacent shifting registers, the shifting signal input end of the next shifting register is electrically connected with the shifting signal output end of the previous shifting register;

the display device comprises a first starting trigger signal line, a first clock signal line group and a second clock signal line group, wherein the second starting trigger signal line, the first clock signal line group and the second clock signal line group are positioned in the non-display area; the shift registers corresponding to the scanning lines in one sub-display area form a first shift register group, wherein the shift registers in the first shift register group are electrically connected with the first clock signal line, and the shift registers outside the first shift register group are electrically connected with the second clock signal line; the shift register at the first stage in the first shift register group is also electrically connected with the second start trigger signal line.

In a second aspect, based on the same inventive concept, the present application further provides a display device, including a display panel and a backlight module, where the display panel is the display panel provided by the present application;

the backlight module comprises a substrate and a plurality of light-emitting elements arranged on the substrate; the backlight module is provided with a plurality of backlight subareas, each backlight subarea comprises at least one light-emitting element, and the light-emitting elements in the backlight subareas are electrically connected with different light-emitting control lines respectively;

one sub-display area is arranged corresponding to at least one backlight subarea.

In a third aspect, based on the same inventive concept, the present application further provides a driving control method of a display panel, the driving control method including a first display state and a second display state;

in a first display state, sending a first starting trigger signal to the first starting trigger signal line, sending a first clock signal to the second clock signal line group, sending a second clock signal to the first clock signal line group, sequentially transmitting scanning signals to scanning lines of a display area through cascaded shift registers, and displaying pictures in the display area;

in a second display state, sending a second starting trigger signal to the second starting trigger signal line, sending a second clock signal to the first clock signal line, sequentially transmitting scanning signals to scanning lines of a sub-display area through a shifting register in a first shifting register group, wherein the sub-display area carries out picture display, and areas except the sub-display area in the display area are in a black state.

Compared with the prior art, the display panel, the driving control method thereof and the display device provided by the invention at least realize the following beneficial effects:

in the display panel, the driving control method thereof and the display device provided by the application, the display area comprises at least one sub-display area, the non-display area of the display panel is provided with a plurality of cascaded shift registers, a first start trigger signal line, a second start trigger signal line, a first clock signal line group and a second clock signal line group, wherein the first start trigger signal line is connected with the shift register at the first level in all the shift registers on the display panel, when the display area of the display panel normally displays, the first start trigger signal line is used for sending a start trigger signal to the shift register at the first level in the whole non-display area, and under the cooperation effect of the second clock signal line, the cascaded shift registers are triggered to scan the scanning lines in the display area. Particularly, a second starting trigger signal line and a first clock signal line group corresponding to the sub-display area are introduced, the shift register connected with the scanning line of the sub-display area is independently started through the second starting trigger signal line, the sub-display area is controlled to be independently displayed, the function of independently displaying the sub-display area on the display panel, namely the information screen display function of the display panel is realized, the whole display panel does not need to be lightened, corresponding information can be obtained through the sub-display area, and therefore the power consumption of the display panel is favorably reduced. In addition, the first clock signal line group is introduced into the shift register connected with the scanning lines in the sub-display area, and in the display process of the sub-display area, only the first clock signal line group needs to be started without starting the second clock signal line group corresponding to the whole display area, so that the power consumption of the information screen display state of the display panel is further reduced, and the standby time of the display panel and the display device is further prolonged.

Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

FIG. 2 is a schematic diagram illustrating a connection of a shift register in a display panel according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of a display area of a display panel including two sub-display areas;

FIG. 4 is a schematic diagram of a connection of a shift register when two sub-display regions are included in a display panel;

FIG. 5 is a schematic diagram of another connection of a shift register in a display panel including two sub-display areas;

FIG. 6 is a schematic diagram showing a connection between a shift register at a first stage of the first shift register group and a start control unit;

FIG. 7 is a timing diagram of the shift register with 9T2C structure;

FIG. 8 is a schematic diagram of a connection between a shift register at a first stage of a first shift register group and a start control unit;

FIG. 9 is a schematic diagram showing a connection between the shift register of the last stage in the first shift register group and the shutdown control unit;

fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present application;

FIG. 11 is a cross-sectional view AA' of the display device of FIG. 10;

fig. 12 is a top view structural diagram of a backlight module in a display device according to an embodiment of the present disclosure;

fig. 13 is a flowchart illustrating a driving control method of a display panel according to an embodiment of the present disclosure;

FIG. 14 is a schematic diagram showing clock signals on any one of the first clock signal line group and the second clock signal line group in a full-screen display state;

fig. 15 is a schematic diagram showing clock signals on any one of the first clock signal line group and the second clock signal line group in the information screen display state.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be discussed further in subsequent figures.

Fig. 1 is a schematic structural diagram of a display panel provided in an embodiment of the present application, and fig. 2 is a schematic connection diagram of a shift register in the display panel provided in the embodiment of the present application, please refer to fig. 1, a display panel 100 provided in the present application is provided with a display area 10 and a non-display area 20, the display area 10 includes at least one sub-display area 11; the display panel 100 includes:

a plurality of scanning lines G located in the display area 10;

a first start trigger signal line STV1 located in the non-display area 20 and a plurality of cascaded shift registers ASG, the shift registers ASG including a shift signal input terminal, a shift signal output terminal, and a scan signal output terminal; the scanning signal output end of each shift register ASG is respectively and electrically connected with a scanning line G; the shift signal input end of the first-stage shift register ASG is connected with a first starting trigger signal line STV1; in any adjacent two-stage shift register ASG, the shift signal input end of the next-stage shift register ASG is electrically connected with the shift signal output end of the previous-stage shift register ASG;

a second start trigger signal line STV2, a first clock signal line group 51 and a second clock signal line group 52 in the non-display area 20, the first clock signal line group 51 including at least one first clock signal line CK1, the second clock signal line group 52 including at least one second clock signal line CK2; the shift registers ASG corresponding to the scanning lines G in one sub-display area 11 form a first shift register group 40, wherein the shift registers ASG in the first shift register group 40 are electrically connected to the first clock signal line CK1, and the shift registers ASG outside the first shift register group 40 are electrically connected to the second clock signal line CK2; the shift register ASG at the first stage in the first shift register group 40 is also electrically connected to a second start trigger signal line STV 2.

It should be noted that fig. 1 only shows one frame structure of the shift register ASG, and does not represent an actual configuration of the shift register ASG, and fig. 1 and fig. 2 only illustrate the shift register and the scanning line, and do not represent an actual number of shift registers included in the display area and the sub-display area. In addition, fig. 1 only shows that one sub-display region 11 is included in the display region 10 of the display panel 100, in some other embodiments of the present application, two or more sub-display regions 11 may also be included in the display region 10, and the sub-display regions 11 are introduced on the display panel 100 for displaying in a breath screen state, for example, some auxiliary information, such as time, temperature, etc., may be displayed by using the sub-display regions 11 in the breath screen display state. It should be noted that fig. 2 shows a case where the first clock signal line group 51 includes two first clock signal lines CK1, and the second clock signal line group 52 includes two second clock signal lines CK2, in some other embodiments of the present application, the number of clock signal lines included in the first clock signal line group 51 and the second clock signal line group 52 may also be adjusted according to the actual configuration of the shift register ASG, for example, the first clock signal line group 51 and the second clock signal line group 52 may respectively include one clock signal line, or respectively include more than two clock signal lines, which is not specifically limited in this application. Fig. 1 shows only one position of the sub-display area 11 in the display area 10, and in some other embodiments of the present application, the sub-display area 11 may also be located in other positions of the display area 10, which is not specifically limited in the present application.

Specifically, with continuing reference to fig. 1 and fig. 2, in the display panel 100 provided by the present application, the display area 10 includes at least one sub-display area 11, and the non-display area 20 of the display panel 100 is provided with a plurality of cascaded shift registers ASG, a first start trigger signal line STV1, a second start trigger signal line STV2, a first clock signal line group 51, and a second clock signal line group 52, wherein the first start trigger signal line STV1 is connected to the shift register ASG located at the first level among all the shift registers ASG on the display panel 100, when the display area 10 of the display panel 100 displays normally, the first start trigger signal line STV1 is used to send a start trigger signal to the shift register ASG located at the first level among the entire non-display area 20, and under the cooperation of the second clock signal line group 52, the cascaded shift register ASG is triggered to scan the scan lines G in the display area 10. Particularly, the present application further introduces a second start trigger signal line STV2 and a first clock signal line group 51 corresponding to the sub-display area 11, separately starts the shift register ASG connected to the scan line G of the sub-display area 11 through the second start trigger signal line STV2, controls the sub-display area 11 to display separately, and implements a function of separately displaying the sub-display area 11 on the display panel 100, that is, a function of information display of the display panel 100, so that the whole display panel 100 does not need to be lighted, and corresponding information can be obtained through the sub-display area 11, thereby being beneficial to reducing power consumption of the display panel 100. In addition, the shift register ASG connected to the scan line G in the sub-display region 11 introduces the first clock signal line group 51, and only the first clock signal line group 51 needs to be started in the display process of the sub-display region 11, and the second clock signal line group 52 corresponding to the whole display region 10 does not need to be started, which is beneficial to avoiding unnecessary power consumption caused by starting the second clock signal line group 52, so that the power consumption of the display state of the display panel 100 on the screen is further reduced, and the standby time of the display panel 100 is further prolonged.

In an alternative embodiment of the present invention, referring to fig. 2, the length of the first clock signal line CK1 is smaller than the length of the second clock signal line group 52.

Specifically, when the line diameters are the same, the longer the signal trace length is, the larger the power consumption required for the signal transmission on the signal trace is, and conversely, the shorter the signal trace is, the smaller the power consumption required for the signal transmission on the signal trace is. The length of the first clock signal line CK1 corresponding to the sub-display area 11 is set to be smaller than the length of the second clock signal line group 52 corresponding to the whole display area 10, and when information screen display is performed, power consumption required by the first clock signal line CK1 with the shorter length is smaller, so that unnecessary power consumption caused when the longer clock signal line is adopted as the clock signal line in the information screen display state is avoided, and power consumption in the information screen display state is further reduced.

In an alternative embodiment of the present invention, fig. 3 is a schematic diagram illustrating that the display area 10 of the display panel 100 includes two sub-display areas 11, fig. 4 is a schematic diagram illustrating a connection of the shift register ASG when the display panel 100 includes two sub-display areas 11, fig. 5 is a schematic diagram illustrating another connection of the shift register ASG when the display panel 100 includes two sub-display areas 11, please refer to fig. 3, fig. 4, and fig. 5, the display area 10 includes at least two sub-display areas 11, and each sub-display area 11 corresponds to a different first shift register group 40;

each of the first shift register groups 40 is electrically connected to the first clock signal line CK1 in a different first clock signal line group 51; alternatively, each of the first shift register groups 40 is electrically connected to the first clock signal line CK1 in the same first clock signal line group 51.

Specifically, fig. 3 shows a case where the display area 10 includes two sub-display areas 11, and the two sub-display areas 11 correspond to two different first shift register groups 40, respectively. Fig. 4 shows a situation that two first shift register groups 40 corresponding to two sub-display regions 11 are electrically connected to the first clock signal line CK1 in different first clock signal line groups 51, when different first clock signal line groups 51 are provided for different sub-display regions 11, the different first clock signal line groups 51 only need to transmit clock signals when the corresponding sub-display regions 11 perform display on screen, and do not need to transmit clock signals when the corresponding sub-display regions 11 do not perform display in the display on screen state, so that the first clock signal line groups 51 and the sub-display regions 11 are arranged in a one-to-one correspondence manner, which is beneficial to saving power consumption of the display panel 100 in the display on screen state.

Fig. 5 shows a situation that two first shift register groups 40 corresponding to two sub-display regions 11 in the display panel 100 are electrically connected to the first clock signal line CK1 in the same first clock signal line group 51, when two sub-display regions 11 display simultaneously, the first clock signal line CK1 can be used to respectively provide clock signals to the shift registers ASG corresponding to the two sub-display regions 11; when the two sub display sections 11 are displayed in a time-sharing manner, the clock signal is supplied to the shift registers ASG corresponding to the two sub display sections 11 in a time-sharing manner through the first clock signal line CK 1. When the shift registers ASG corresponding to different sub-display regions 11 share the same first clock signal line group 51, the number of the first clock signal lines CK1 in the display panel 100 is reduced, which is favorable for simplifying the wiring difficulty of the non-display region 20 of the display panel 100 and reducing the frame width of the non-display region where the first clock signal lines CK1 are located.

In an alternative embodiment of the present invention, the shift register ASG located at the first stage in each of the first shift register groups 40 is electrically connected to a different second start trigger signal line STV2, respectively.

For example, referring to fig. 3, fig. 4 and fig. 5, when there are two or more sub-display areas 11 in the display panel 100, in the first shift register group 40 corresponding to each sub-display area 11, the shift register ASG located at the first stage is electrically connected to different second start-up trigger signal lines STV2, so that the display of different sub-display areas 11 can be controlled by different second start-up trigger signal lines STV2, and thus, different sub-display areas 11 can select different start-up trigger times according to actual requirements, and can be started up simultaneously or not simultaneously, thereby making the information screen display function of the display panel 100 in the present application more flexible.

In an alternative embodiment of the present invention, fig. 6 is a schematic diagram illustrating a connection between a shift register ASG located at a first stage in the first shift register group 40 and a start control unit 60, where the shift register ASG further includes a charging node P, the display panel 100 further includes the start control unit 60, a control end and a first end of the start control unit 60 are both electrically connected to the second start trigger signal line STV2, and a second end of the start control unit 60 is electrically connected to the charging node P.

Specifically, referring to fig. 6, the shift register ASG with a 9T2C structure is taken as an example for explanation, where 9T2C represents that one shift register ASG includes 9 TFTs and two capacitors, a circuit corresponding to the shift register ASG includes a charging node P, and a start control unit 60 is introduced in the display panel 100, where the start control unit 60 is located between the second start trigger signal line STV2 and the shift register ASG of the first stage in the first shift register group 40, and is used for controlling start trigger of the sub-display area in the screen display state. The control terminal and the first terminal of the start control unit 60 are electrically connected to the second start trigger signal line STV2, and the second terminal is electrically connected to the charging node P. In the on-screen display state, the second start trigger signal line STV2 sends a control signal to the start control unit 60, the start control unit 60 is turned on, and the second start trigger signal line STV2 transmits the start trigger signal to the charging node P to charge the charging node P, thereby realizing the start trigger control of the sub-display area 11 in the on-screen display state.

The operation flow of the shift register ASG with the 9T2C structure will be briefly described with reference to fig. 6 and 7, where fig. 7 shows an operation timing chart of the shift register ASG with the 9T2C structure. In normal display, the operation of the shift register ASG is divided into a first stage t1, a second stage t2 and a third stage t3 within one frame time.

In a first stage T1, the first scanning signal terminal Gn-1 is at a high level, the first clock signal terminal CKB is at a low level, the transistor T0 is turned on, a high level signal of the first control potential terminal FW is transmitted to the charging node P, and the charging node P is at a high level state; at this time, the transistor T3 is turned on, the low level signal VGL is transmitted to the discharge node Q via the transistor T3, and the transistor T5 is turned off; the transistor T4 is turned on, and the clock signal CKB is transmitted to the output end Gout, so that the Gout outputs a low level signal;

in the second stage t2, the first scanning signal terminal Gn-1 is at a low level, the clock signal CKB is at a high level, and the clock signal CK is at a low level; the charging node P still keeps the high level potential of the first stage because no low level signal is input; transistors T3 and T4 are turned on; under the control of the transistor T3, a low level signal VGL is input to the discharge node Q, which is at a low level; because the clock signal CKB is at a high level, the transistor T4 is turned on, and the output end Gout outputs a high level; due to the bootstrap effect of the first capacitor C1 (the capacitor connected to point P), the potential of the charging node P is further pulled high;

in the third stage t3, the second scan signal terminal Gn +1 is at a high level, the clock signal CKB is at a low level, and the clock signal CK is at a high level. The transistor T1 is turned on, the charging node P writes the low potential of the second control potential terminal BW, and the transistors T3 and T4 are turned off; the clock signal CKB is low, the discharging node Q is still low and the transistor T5 is still turned off, coupled through the second capacitor C2. The clock signal CK is at a high level, and the output terminal Gout outputs a low level signal VGL.

In one frame time, after the third stage T3, the output terminal Gout maintains a low level, the charging node P maintains a low level, the discharging node Q swings with the clock signal CKB, the transistors T5 and T6 are alternately turned on, and the low level signal VGL is output to the output terminal Gout.

It should be noted that the clock signals CK and CKB connected to the shift register in fig. 6 correspond to the signals transmitted by the two first clock signal lines CK1 in fig. 2-4, respectively. The Reset signal terminal Reset is low throughout the scanning period, and thus the transistors T9 and T10 are always off. After the last row of scan lines G is output, the signal of the second scan signal terminal Gn +1 is equal to the signal of the Reset signal terminal Reset for the last stage of shift register ASG, and at this time, the signal of the Reset signal terminal Reset is adjusted to be a high level signal, since the shift register ASG of each stage is connected to the Reset signal terminal Reset, at this time, the transistors T9 and T10 are turned on, and the output terminals Gout of all the shift register ASG output low level signals VGL, thereby completing the Reset of all the shift register ASG. And entering the next frame after the reset is completed.

In an alternative embodiment of the present invention, fig. 8 is a schematic diagram illustrating a connection between the shift register ASG located at the first stage in the first shift register group 40 and the start control unit 60, where the shift register ASG further includes a charging node P and a first control potential terminal FW, the display panel 100 further includes the start control unit 60, a control terminal of the start control unit 60 is electrically connected to the second start trigger signal line STV2, a first terminal of the start control unit 60 is electrically connected to the first control potential terminal FW, and a second terminal of the start control unit 60 is electrically connected to the charging node P.

Specifically, the structure of the first shift register ASG in the embodiment shown in fig. 8 is the same as that of the first shift register ASG in fig. 6, and the operation principle of the first shift register ASG can refer to the operation principle of the first shift register ASG in the embodiments of fig. 6 and 7. In this embodiment, a start-up control unit 60 having another configuration is introduced, a control terminal of the start-up control unit 60 is electrically connected to the second start trigger signal line STV2, a first terminal of the start-up control unit 60 is electrically connected to the first control potential terminal FW in the first shift register ASG, and a second terminal is electrically connected to the charge node P. In the information screen display state, the second start trigger signal line STV2 sends a control signal to the start control unit 60, the start control unit 60 is turned on, and the signal of the first control potential terminal FW is transmitted to the charging node P as a start trigger signal to charge the charging node P, thereby realizing the start trigger control of the sub display area 11 in the information screen display state.

Alternatively, the start-up control unit 60 in the embodiments shown in fig. 7 and fig. 8 may include a transistor, and when the start-up control unit 60 is formed by the transistor, the transistor may be fabricated at the same time as other transistors in the shift register, so as to facilitate the simplification of the fabrication process of the shift register.

In an alternative embodiment of the present invention, referring to fig. 2, 4 and 5, the display panel 100 of the present application includes an off control signal line STVB, and the shift register ASG located at the last stage in the first shift register group 40 is electrically connected to the off control signal line STVB.

Specifically, with continuing reference to fig. 2, fig. 3, fig. 4 and fig. 5, in the embodiment, a cut-off control signal line STVB is introduced into the first shift register ASG corresponding to the sub-display area 11, and the cut-off control signal line STVB is electrically connected to the shift register ASG located at the last stage in the first shift register group 40, so that when the sub-display area 11 displays in the screen display state, the cut-off control signal line STVB can be used to control the scan cut-off region of the scan signal, and the shift signal is prevented from being transmitted to the other display areas 10 outside the sub-display area 11, so as to control the display range of the sub-display area 11 in the display area 10.

In an alternative embodiment of the present invention, fig. 9 is a schematic diagram illustrating a connection between the shift register ASG located at the last stage in the first shift register group 40 and the shutdown control unit 70, the shift register ASG further includes a charging node P, the display panel 100 further includes the shutdown control unit 70, a control terminal of the shutdown control unit 70 is electrically connected to the shutdown control signal line STVB, a first terminal of the shutdown control unit 70 is electrically connected to the charging node P, a second terminal of the shutdown control unit 70 is connected to the first level signal, and optionally, the second terminal of the shutdown control unit is connected to the low level signal VGL in the shift register.

Specifically, the structure of the first shift register ASG in the embodiment shown in fig. 9 is the same as that of the first shift register ASG in fig. 6, and the operation principle of the first shift register ASG can refer to the operation principle of the first shift register ASG in the embodiments of fig. 6 and 7. In this embodiment, a shutdown control unit 70 is introduced, a first terminal of the shutdown control unit 70 is electrically connected to the charging node P in the shift register ASG located at the last stage in the first shift register group 40, a second terminal of the shutdown control unit 70 is connected to the first level signal (i.e., the low level signal VGL), and a control terminal is electrically connected to the shutdown control signal line STVB. In the information screen display state, when the shift register ASG in the first shift register group 40 is used to scan the scan line G in the sub-display area 11, after the scan line G corresponding to the shift register ASG at the last stage is scanned, the control signal is sent to the turn-off control unit 70 through the turn-off control signal line STVB, so that the turn-off control unit 70 is turned on, the first level signal is further transmitted to the charging node P through the turn-off control unit 70, the potential of the charging node P is pulled down, the transmission of the shift signal to the shift register ASG at the next stage is avoided, and the display range of the sub-display area 11 in the display area 10 is accurately controlled.

Optionally, the shutdown control unit 70 provided in the present application may include a transistor, and when the shutdown control unit 70 is formed by the transistor, the transistor may be fabricated simultaneously with other transistors in the shift register, so as to facilitate a simplified fabrication process of the shift register.

In an alternative embodiment of the present invention, referring to fig. 4 and 5, when the display area 10 includes a plurality of first shift register groups 40, the shift register ASG at the last stage in each first shift register group 40 is connected to a different off control signal line STVB.

Specifically, fig. 4 and 5 show the case where the display panel 100 includes two sub display regions 11, and the first shift register groups 40 corresponding to the two sub display regions 11 correspond to different off control signal lines STVB, respectively. When the display panel 100 includes two or more sub-display areas 11, the shift register ASG at the last stage in each first shift register group 40 is connected to different cut-off control signal lines STVB, so that each cut-off control signal line STVB can control the cut-off scanning area of the corresponding sub-display area 11, and therefore, a plurality of sub-display areas 11 with the same or different area sizes can be set on the display panel 100 according to actual needs, so that the control of the display state of the display panel 100 on the display screen is more flexible.

Based on the same inventive concept, the present application further provides a display device 200, fig. 10 is a schematic structural diagram of the display device 200 provided in the embodiment of the present application, fig. 11 is an AA' cross-sectional view of the display device 200 in fig. 10, fig. 12 is a structural diagram of a backlight module 300 in the display device 200 provided in the embodiment of the present application, please refer to fig. 10 to 12, the display device 200 provided in the present application includes a display panel 100 and a backlight module 300, wherein the display panel 100 is the display panel 100 provided in any one of the embodiments of the present application;

the backlight module 300 includes a substrate 303 and a plurality of light emitting elements 90 disposed on the substrate 303; the backlight module 300 is provided with a plurality of backlight partitions 301, each backlight partition 301 comprises at least one light-emitting element 90, and the light-emitting elements 90 in each backlight partition 301 are electrically connected with different light-emitting control lines respectively; one sub-display section 11 is disposed corresponding to at least one backlight partition 301.

It should be noted that fig. 12 only shows a case where a plurality of light emitting elements 90 are included in one backlight partition 301, in some other embodiments of the present application, one backlight partition may further include only one light emitting element, and each light emitting element corresponds to one light emitting control line, that is, each light emitting element may be individually controlled, so as to make the backlight partition in the present application more fine and smooth.

Specifically, fig. 10-12 illustrate the display device 200 in the present application as an example of the liquid crystal display device 200, where the display panel 100 corresponding to the liquid crystal display device 200 does not emit light, and the backlight module 300 provides a light source for the display of the display panel 100. In the present application, the backlight module 300 includes a plurality of backlight partitions 301, please refer to fig. 1 and fig. 3, a sub-display area 11 in the display device is disposed corresponding to at least one backlight partition 301, in the information display state of the display device 200, when the sub-display area 11 displays, the light emitting elements 90 in the backlight partition 301 corresponding to the sub-display area 11 in the backlight module 300 can be controlled to emit light, and the light emitting elements 90 in other areas do not emit light, so as to avoid unnecessary light source waste caused when all the light emitting elements 90 in the backlight module 300 in the information display state of the display device 200 emit light, thereby being beneficial to reducing the power consumption of the display device 200 in the information display state and prolonging the standby time of the display device 200.

It should be noted that, for the embodiments of the display device 200 provided in the embodiments of the present application, reference may be made to the embodiments of the display panel 100, and repeated descriptions are not repeated. The display device 200 provided by the present application may be: any product or component with practical functions such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.

Based on the same inventive concept, the present application further provides a driving control method of a display panel 100, and fig. 13 is a flowchart of the driving control method of the display panel 100 according to the embodiment of the present application, where the driving control method is applied to any one of the display panels 100 in the embodiments, please refer to fig. 1, fig. 2, and fig. 13, and the driving control method includes a first display state and a second display state;

s01, in a first display state (corresponding to a full-screen display state), sending a first starting trigger signal to a first starting trigger signal line STV1, sending a first clock signal to a second clock signal line group 52, sending a second clock signal to a first clock signal line group 51, sequentially transmitting scanning signals to scanning lines G of a display area 10 through a cascaded shift register ASG, and displaying a picture in the display area 10;

s02, in a second display state (corresponding to the information display state), sending a second start trigger signal to the second start trigger signal line STV2, sending a second clock signal to the first clock signal line CK1, sequentially transmitting scan signals to the scan lines G of the sub-display area 11 through the shift registers ASG in the first shift register group 40, displaying images in the sub-display area 11, and displaying an area except for the sub-display area 11 in the display area 10 in a black state.

It should be noted that the first display state and the second display state mentioned in the present application only represent two working states of the display panel, the starting of the two working states is not strictly sequential, and the respective durations of the two working states can also be flexibly set according to actual situations.

Specifically, please refer to fig. 1, fig. 2, fig. 13, and fig. 14, wherein fig. 14 is a schematic diagram of clock signals on any one of the first clock signal line group and the second clock signal line group in a full-screen display state, and in the full-screen display state, that is, corresponding to the whole display area 10 of the display panel 100, at this time, the first start trigger signal line STV1 sends the first start trigger signal to the shift register ASG located at the first stage in the cascade shift register ASG, and the second clock signal line group 52 transmits the first clock signal, so as to control the cascade shift register ASG to scan the scan line G in the display area 10; when the scan signal reaches the shift register adjacent to the shift register at the first stage in the first shift register group 40, that is, when the scan line in the sub-display area 11 needs to be scanned, the second clock signal line CK2 in the second clock signal line group 52 stops transmitting the first clock signal, the first clock signal line CK1 in the first clock signal line group 51 transmits the second clock signal, and the cascaded shift registers in the first shift register group 40 are controlled to scan each scan line in the sub-display area 11; after the scanning of the scan lines in the sub-display area 11 is completed, the first clock signal line CK1 in the first clock signal line group 51 stops transmitting the second clock signal, the second clock signal line CK2 in the second clock signal line group 52 continues transmitting the first clock signal, and the scan lines in the display area located in the other display areas except the sub-display area 11 continue to be scanned, so that the full-screen display function of the display panel 100 is realized.

Referring to fig. 1, 2, 13 and 15, fig. 15 is a schematic diagram of clock signals on any one of the first clock signal line group and the second clock signal line group in the display state of the information screen, most of the area of the display area 10 in the display panel 100 is not displayed, and only the sub-display area 11 is displayed, at this time, the second clock signal line CK2 in the second clock signal line group 52 does not transmit the first clock signal, the second start trigger signal line STV2 transmits the second start trigger signal to the shift register ASG at the first level in the first shift register group 40 corresponding to the sub-display area 11, and the first clock signal line CK1 in the first clock signal line group 51 transmits the second clock signal, so as to control the scan lines G in each shift register ASG display area 11 in the first shift register group 40 to scan the sub-display area 11, thereby realizing the display function of the sub-display area 11 in the display state, and thus, the entire display area 100 is not required to be lighted, and the power consumption of the corresponding display panel 100 can be reduced. In addition, the first clock signal line group 51 is introduced into the shift register ASG connected to the scan line G in the sub-display region 11, and in the display process of the sub-display region 11, only the first clock signal line group 51 needs to be started, and the second clock signal line group 52 does not need to be started, which is beneficial to avoiding unnecessary power consumption caused by starting the second clock signal line group 52, so that the power consumption of the display state of the display panel 100 on the display screen is further reduced, and the standby time of the display panel 100 is further prolonged.

In an alternative embodiment of the present invention, referring to fig. 2, 4 and 5, the display panel 100 further includes an off control signal line STVB;

in the second display state, after the shift signal is transmitted to the shift register ASG located at the last stage in the first shift register group 40 within one frame time, the method further includes: the off control signal is sent to the shift register ASG located at the last stage in the first shift register group 40 through the off control signal line STVB.

Specifically, a cut-off control signal line STVB is introduced into the first shift register ASG corresponding to the sub-display area 11, and the cut-off control signal line STVB is electrically connected to the shift register ASG located at the last stage in the first shift register group 40, so that when the sub-display area 11 displays in the information screen display state, the cut-off signal line can be used to control the area where the scanning of the scanning signal is cut off, and the shifting signal is prevented from being transmitted to the other display areas 10 except the sub-display area 11, so as to accurately control the display range of the sub-display area 11 in the display area 10.

In summary, the display panel, the driving control method thereof and the display device provided by the invention at least achieve the following beneficial effects:

in the display panel, the driving control method thereof and the display device, the display area includes at least one sub-display area, and the non-display area of the display panel is provided with a plurality of cascaded shift registers, a first start trigger signal line, a second start trigger signal line, a first clock signal line group and a second clock signal line group, wherein the first start trigger signal line is connected with the shift register at the first level in all the shift registers on the display panel, when the display area of the display panel displays normally, the first start trigger signal line is used for sending a start trigger signal to the shift register at the first level in the whole non-display area, and under the cooperation of the second clock signal line, the cascaded shift registers are triggered to scan the scanning lines in the display area. Particularly, a second starting trigger signal line and a first clock signal line group corresponding to the sub-display area are introduced, the shift register connected with the scanning line of the sub-display area is independently started through the second starting trigger signal line, the sub-display area is controlled to be independently displayed, the function of independently displaying the sub-display area on the display panel, namely the information screen display function of the display panel is realized, the whole display panel does not need to be lightened, corresponding information can be obtained through the sub-display area, and therefore the power consumption of the display panel is favorably reduced. In addition, the first clock signal line group is introduced into the shift register connected with the scanning lines in the sub-display area, and in the display process of the sub-display area, only the first clock signal line group needs to be started without starting the second clock signal line group corresponding to the whole display area, so that the power consumption of the information screen display state of the display panel is favorably further reduced, and the standby time of the display panel and the display device is favorably prolonged.

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel is characterized in that a display area and a non-display area are arranged, and the display area comprises at least two sub-display areas; the display panel includes:

a plurality of scan lines located in the display area;

the shift register comprises a shift signal input end, a shift signal output end and a scanning signal output end; the scanning signal output end of each shift register is electrically connected with the scanning line respectively; the shift signal input end of the shift register of the first stage is connected with the first starting trigger signal line; in any two adjacent stages of shift registers, the shift signal input end of the next stage of shift register is electrically connected with the shift signal output end of the previous stage of shift register;

the display device comprises a first starting trigger signal line, a first clock signal line group and a second clock signal line group, wherein the second starting trigger signal line, the first clock signal line group and the second clock signal line group are positioned in the non-display area; the shift registers corresponding to the scanning lines in one sub-display area form a first shift register group, wherein the shift registers in the first shift register group are electrically connected with the first clock signal line, and the shift registers outside the first shift register group are electrically connected with the second clock signal line; the shift register at the first stage in the first shift register group is electrically connected with the second starting trigger signal wire;

the display panel also comprises a cut-off control signal line, and the shift register at the last stage in the first shift register group is electrically connected with the cut-off control signal line;

the length of the first clock signal line is less than that of the second clock signal line;

each sub-display area corresponds to a different first shift register group, and each first shift register group is electrically connected with a first clock signal line in a different first clock signal line group; or, each of the first shift register groups is electrically connected to the first clock signal lines in the same first clock signal line group;

the shift register at the last stage in each shift register group is connected to different cut-off control signal lines.

2. The display panel according to claim 1, wherein the shift register in the first stage of each of the first shift register groups is electrically connected to a different one of the second enable trigger signal lines.

3. The display panel according to claim 1, wherein the shift register further comprises a charging node, the display panel further comprises a start control unit, a control terminal and a first terminal of the start control unit are electrically connected to the second start trigger signal line, and a second terminal of the start control unit is electrically connected to the charging node.

4. The display panel according to claim 1, wherein the shift register further comprises a charge node and a first control potential terminal, the display panel further comprises a start control unit, a control terminal of the start control unit is electrically connected to the second start trigger signal line, a first terminal of the start control unit is electrically connected to the first control potential terminal, and a second terminal is electrically connected to the charge node.

5. The display panel according to claim 1, wherein the shift register further comprises a charging node, the display panel further comprises a turn-off control unit, a control terminal of the turn-off control unit is electrically connected to the turn-off control signal line, a first terminal of the turn-off control unit is electrically connected to the charging node, and a second terminal of the turn-off control unit is connected to a first level signal.

6. A display device, comprising a display panel and a backlight module, wherein the display panel is the display panel provided by any one of claims 1 to 5;

the backlight module comprises a substrate and a plurality of light-emitting elements arranged on the substrate; the backlight module is provided with a plurality of backlight subareas, each backlight subarea comprises at least one light-emitting element, and the light-emitting elements in the backlight subareas are respectively and electrically connected with different light-emitting control lines;

7. A drive control method applied to the display panel according to any one of claims 1 to 5, characterized in that the drive control method includes a first display state and a second display state;

in a second display state, sending a second starting trigger signal to the second starting trigger signal line, sending a second clock signal to the first clock signal line, sequentially transmitting scanning signals to scanning lines of a sub-display area through a shifting register in a first shifting register group, wherein the sub-display area performs picture display, and areas except the sub-display area in the display area are in a black state;

wherein the length of the first clock signal line is less than the length of the second clock signal line;

when the display area comprises at least two sub-display areas, each sub-display area corresponds to a different first shift register group respectively;

each first shift register group is electrically connected with the first clock signal wires in different first clock signal wire groups respectively; or, each of the first shift register groups is electrically connected to the first clock signal line in the same first clock signal line group.

8. The driving control method according to claim 7, further comprising, in the second display state, after a shift signal is transmitted to a shift register in a last stage of the first shift register group during one frame time: and transmitting a cut-off control signal to a shift register at the last stage in the first shift register group through the cut-off control signal line.