CN111710239B - Display panel, driving method of display panel and display device - Google Patents

Display panel, driving method of display panel and display device Download PDF

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Publication number
CN111710239B
CN111710239B CN202010556299.4A CN202010556299A CN111710239B CN 111710239 B CN111710239 B CN 111710239B CN 202010556299 A CN202010556299 A CN 202010556299A CN 111710239 B CN111710239 B CN 111710239B
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signal line
initialization
light
module
pixel unit
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CN111710239A (en
Inventor
朱正勇
贾溪洋
孙光远
赵欣
姚远
田苗苗
马志丽
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/86Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

Abstract

The invention discloses a display panel, a driving method of the display panel and a display device. The display panel comprises a display area, a non-display area and a light-transmitting area; the light-transmitting region comprises at least one sub light-transmitting region; the non-display area is arranged around the sub-light-transmitting area, and the display area is arranged around the non-display area; the display area is provided with a first initialization signal line and a second initialization signal line, and the first initialization signal line and the second initialization signal line extend along a first direction; the first initialization signal line is arranged around the light-transmitting area through the non-display area, the second initialization signal line comprises a first sub initialization signal line and a second sub initialization signal line, and the first sub initialization signal line and the second sub initialization signal line are respectively arranged on two sides of the light-transmitting area and are in one-to-one correspondence. Therefore, the phenomenon of display uniformity of the pixel units of the pixel unit row corresponding to the light-transmitting area along the first direction can be improved, and meanwhile, the width of the non-display area can be prevented from being increased, so that the narrow frame design of the non-display area can be ensured.

Description

Display panel, driving method of display panel and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel, a driving method of the display panel and a display device.
Background
The current display panels are moving towards full-screen. In the full screen, the display area needs to be provided with openings for placing cameras and other structures. However, the openings can block the signal lines and cause impedance differences of the display panels in different rows, so that mura phenomenon exists in the display area around the openings, and the uniformity of the display panel is poor.
Disclosure of Invention
The invention provides a display panel, a driving method of the display panel and a display device, aiming at improving the uniformity of the display panel on the basis of considering the frame width of a light-transmitting area.
In a first aspect, an embodiment of the present invention provides a display panel, including a display area, a non-display area, and a light-transmitting area; the light-transmitting area comprises at least one sub light-transmitting area; the non-display area is arranged around the sub-light-transmitting area, and the display area is arranged around the non-display area;
the display area is provided with a first initialization signal line and a second initialization signal line, and the first initialization signal line and the second initialization signal line extend along a first direction; the first initialization signal lines are arranged around the light-transmitting area through the non-display area, the second initialization signal lines comprise first sub initialization signal lines and second sub initialization signal lines, and the first sub initialization signal lines and the second sub initialization signal lines are respectively arranged on two sides of the light-transmitting area and are in one-to-one correspondence; wherein the first direction is an extending direction of the scanning signal line.
Optionally, the display area is further provided with a pixel unit; the first initialization signal line is electrically connected with a first initialization signal input end of the pixel unit and used for initializing a driving transistor in the pixel unit; the second initialization signal line is electrically connected with a second initialization signal input end of the pixel unit and is used for initializing a light emitting device of the pixel unit.
Optionally, the light-transmitting area includes at least two sub light-transmitting areas, the non-display area includes sub non-display areas, and the sub non-display areas are disposed between the sub light-transmitting areas; a compensation pixel unit is arranged in the sub non-display area; the compensation pixel unit is used for compensating the load of the row where the compensation pixel unit is located.
Optionally, the compensation pixel unit includes a first initialization module, a driving module, a compensation module, a data writing module, and a storage module;
the control end of the first initialization module is electrically connected with a first scanning signal line, the first end of the first initialization module is electrically connected with the first initialization signal line, the second end of the first initialization module is electrically connected with the control end of the driving module, the first end of the storage module and the second end of the compensation module, the first end of the driving module is electrically connected with the second end of the data writing module, the second end of the driving module is electrically connected with the first end of the compensation module, the control end of the compensation module is electrically connected with a second scanning signal line, the first end of the data writing module is electrically connected with a data signal line, the second end of the data writing module is electrically connected with the second scanning signal line, and the second end of the storage module is electrically connected with a first power signal line.
Optionally, the first initialization module includes a first transistor, the driving module includes a second transistor, the compensation module includes a third transistor, the data writing module includes a fourth transistor, and the storage module includes a storage capacitor;
a gate of the first transistor is a control terminal of the first initialization module, a first terminal of the first transistor is a first terminal of the first initialization module, and a second terminal of the first transistor is a second terminal of the first initialization module;
a gate of the second transistor is a control end of the driving module, a first pole of the second transistor is a first end of the driving module, and a second pole of the second transistor is a second end of the driving module;
the grid electrode of the third transistor is the control end of the compensation module, the first electrode of the third transistor is the first end of the compensation module, and the second electrode of the third transistor is the second end of the compensation module;
a gate of the fourth transistor is a control end of the data writing module, a first pole of the fourth transistor is a first end of the data writing module, and a second pole of the fourth transistor is a second end of the data writing module;
the first pole of the storage capacitor is the first end of the storage module, and the second pole of the storage capacitor is the second end of the storage module.
Optionally, the first transistor to the fourth transistor are disposed in the same layer as the transistors in the pixel unit.
Optionally, the light-transmitting areas include at least two sub light-transmitting areas, the second initialization signal line further includes a third sub initialization signal line, the third sub initialization signal line is disposed between the sub light-transmitting areas, the third sub initialization signal line corresponds to the first sub initialization signal line one to one along the first direction, and the first sub initialization signal line, the second sub initialization signal line, and the third sub initialization signal line are disposed in the same layer.
Optionally, the display panel further includes a scanning signal line; the scanning signal provided by the scanning signal line is a multi-clock signal.
In a second aspect, an embodiment of the present invention further provides a driving method of a display panel, for driving the display panel provided in any embodiment of the present invention, where the display panel includes a pixel unit, and a first initialization signal line, a second initialization signal line, a first scanning signal line, a second scanning signal line, a third scanning signal line, a data signal line, and a light emission control signal line, which provide a driving signal for the pixel unit; it is characterized by comprising:
in a first stage, a first scanning signal provided by the first scanning signal line controls a first initialization signal provided by the first initialization signal line to initialize a driving transistor in the pixel unit; the first scanning signal provided by the first scanning signal line is a multi-clock signal;
in a second phase, a second scanning signal provided by the second scanning signal line controls a data signal provided by the data signal line to be written into the driving transistor in the pixel unit; the second scanning signal provided by the second scanning signal line is a multi-clock signal;
in a third phase, a third scanning signal provided by the third scanning signal line controls a second initialization signal provided by the second initialization signal line to initialize a light emitting device of the pixel unit; a third scanning signal provided by the third scanning signal line is a multi-clock signal;
in the fourth stage, the light-emitting control signal provided by the light-emitting control signal line controls the light-emitting device in the pixel unit to emit light.
In a third aspect, an embodiment of the present invention further provides a display device including the display panel provided in any embodiment of the present invention.
According to the technical scheme of the embodiment of the invention, the first initialization signal line and the second initialization signal line are respectively arranged to initialize the grid of the driving transistor of the pixel unit and the anode of the light-emitting device, so that the phenomenon of display uniformity of the pixel units of the pixel unit row corresponding to the light-transmitting area along the first direction is improved. The first initialization signal line is arranged around the light-transmitting area through the non-display area, so that the difference between the impedance of the first initialization signal line in the pixel unit row corresponding to the light-transmitting area and the impedance of other pixel unit rows can be reduced, and the display uniformity of the pixel units in the pixel unit row corresponding to the light-transmitting area along the first direction is further improved on the basis that the first initialization signal line and the second initialization signal line are arranged to provide the first initialization signal and the second initialization signal respectively. Moreover, the first sub-initialization signal line and the second sub-initialization signal line of the second initialization signal line are respectively arranged at two sides of the light-transmitting area, namely the second initialization signal line is disconnected around the light-transmitting area, so that the second initialization signal line can be prevented from increasing the width of the non-display area through the non-display area, the narrow frame design of the non-display area can be ensured, and the requirements of users can be met.
Drawings
Fig. 1 is a schematic structural diagram of a conventional display panel;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is an enlarged view of a portion of FIG. 2;
fig. 4 is a schematic circuit diagram of a pixel unit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic circuit diagram of a compensation pixel unit according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 9 is a flowchart illustrating a driving method of a display panel according to an embodiment of the invention;
FIG. 10 is a timing diagram of a display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Along with display panel's comprehensive screen development, can set up the printing opacity district in display panel's the display area and be used for placing camera isotructure, realize display panel's the function of shooing, be favorable to display panel's narrow frame design simultaneously. Fig. 1 is a schematic structural diagram of a conventional display panel. As shown in fig. 1, the display panel includes a light-transmissive region 101, and the light-transmissive region 101 is disposed in the display region 10. Since the density of the pixel units in the transparent region 101 is less than that of the pixel units in the display region 10, even if there is no pixel unit in the transparent region 101, the pixel units in the pixel unit row corresponding to the transparent region 101 are less than the pixel units in the other pixel unit rows, so that the impedance of the pixel unit row corresponding to the transparent region 101 is different from the impedance of the other pixel unit rows, that is, the impedance of the pixel unit row corresponding to the transparent region 101 is less than the impedance of the other pixel unit rows, so that the initialization of the pixel units in the pixel unit row corresponding to the transparent region 101 is more sufficient, and the display luminance of the pixel units in the pixel unit row corresponding to the transparent region 101 is not uniform with the display luminance of the pixel units in the other pixel unit rows. For example, the gate of the driving transistor in the pixel unit is sufficiently initialized at high brightness by the pixel unit in the pixel unit row corresponding to the light-transmitting region 101, so that the pixel unit in the pixel unit row corresponding to the light-transmitting region 101 is displayed to be bright. The pixel units in the pixel unit row corresponding to the light-transmitting area 101 fully initialize the anodes of the light-emitting devices in the pixel units at low brightness, so that the pixel units in the pixel unit row corresponding to the light-transmitting area 101 are displayed darkly. Moreover, the display luminance of the pixel unit in the pixel unit row corresponding to the light-transmitting region 101 is not uniform with the display luminance of the pixel units in the other pixel unit rows due to the impedance delay and other factors. Similarly, the difference between the impedance of the pixel unit column corresponding to the light-transmitting area 101 and the impedance of the other pixel unit columns also causes the display luminance of the pixel units of the pixel unit column corresponding to the light-transmitting area 101 to be different from the display luminance of the pixel units of the other pixel unit columns. When the display panel displays at a high refresh rate, the phenomenon of non-uniformity of the brightness of the display panel is more obvious. In addition, a reference signal line 102 extending along the row is disposed in the display region 10, and the reference signal line 102 provides an initialization signal for the pixel unit. When the transparent regions 101 are disposed in the display region 10, the reference signal lines 102 can be connected to surround the transparent regions 101, respectively, so as to improve the problem of non-uniform display brightness of the pixel units in the pixel unit row corresponding to the transparent regions 101. However, the effect of improving the display brightness non-uniformity by connecting the reference signal lines 102 around the transparent regions 101 is poor, and the requirement of the display panel for uniformity cannot be satisfied.
In view of the above technical problems, an embodiment of the present invention provides a display panel. Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 3 is a partially enlarged view of fig. 2. As shown in fig. 2 and 3, the display panel includes a display region 110, a non-display region 120, and a light transmission region 130; the light-transmitting region 130 includes at least one sub light-transmitting region 131; the non-display area 120 is disposed around the sub-transmissive area 131, and the display area 110 is disposed around the non-display area 120; the display area 110 is provided with a first initialization signal line 111 and a second initialization signal line 112, the first initialization signal line 111 and the second initialization signal line 112 extending in the first direction X; the first initialization signal line 111 is disposed around the light transmissive region 130 through the non-display region 120, the second initialization signal line 112 includes a first sub initialization signal line 1121 and a second sub initialization signal line 1122, and the first sub initialization signal line 1121 and the second sub initialization signal line 1122 are respectively disposed at two sides of the light transmissive region 130 and are in one-to-one correspondence; the first direction X is an extending direction of the scanning signal lines.
Specifically, as shown in fig. 2 and 3, the light-transmitting region 130 illustratively includes a sub-light-transmitting region 131, and the sub-light-transmitting region 131 may be a blind hole or a through hole. The blind holes are light holes formed by reserving the substrate of the display panel, and the through holes are light holes formed by penetrating the display panel. The non-display area 120 is disposed around the sub-transmissive area 131 as a frame of the sub-transmissive area 131. The display panel further includes a pixel unit, and the display region 110 is provided with a first initialization signal line 111 and a second initialization signal line 112, which respectively initialize the gate of the driving transistor and the anode of the light emitting device in the pixel unit, so that the potentials of the initialization signal of the gate of the driving transistor and the initialization signal of the anode of the light emitting device are different, thereby improving the phenomena of over-brightness at high brightness and over-darkness at low brightness of the display panel, and improving the display uniformity of the display panel. Fig. 4 is a schematic circuit diagram of a pixel unit according to an embodiment of the present invention. As shown in fig. 4, the pixel unit is a circuit diagram of 7T1C, wherein 7 transistors are respectively a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first initialization transistor T4, a first light emission control transistor T5, a second light emission control transistor T6 and a second initialization transistor T7, and 1 capacitor is a storage capacitor Cp. The specific connection relationship is shown in fig. 4. The first initialization transistor T4 is electrically connected to the first initialization signal input terminal VREF1, and the second initialization transistor T7 is electrically connected to the second initialization signal input terminal VREF 2. During the operation of the pixel unit, since the initialization voltage required for the gate of the driving transistor T1 is different from the initialization voltage required for the anode of the light emitting device D1, the gate of the driving transistor T1 and the anode of the light emitting device D1 may be initialized respectively by the first initialization signal input terminal VREF1 and the second initialization signal input terminal VREF2 being electrically connected to the first initialization signal line 111 and the second initialization signal line 112, respectively, such that the first initialization signal input terminal VREF1 and the second initialization signal input terminal VREF2 provide different initialization voltages. Since the driving current generated by the driving transistor T1 is positively correlated to the gate initialization voltage of the driving transistor T1, the gate initialization voltage of the driving transistor T1 can be set to be relatively low, so as to increase the driving current generated by the driving transistor T1 and improve the display brightness of the display panel. Moreover, the anode initialization voltage of the light emitting device D1 can be set to be relatively high, the anode potential of the light emitting device D1 is close to 0V in the light emitting stage of the pixel unit, and the source-drain voltage difference of the second initialization transistor T7 can be reduced by increasing the anode initialization voltage of the light emitting device D1, so that the shunt of the second initialization transistor T7 to the driving current can be reduced, the phenomenon that the pixel unit of the display panel is dark in low brightness is improved, and the display uniformity of the display panel is improved.
In the above process, the first initialization signal line 111 and the second initialization signal line 112 may be disposed along the first direction X, and the first initialization signal line 111 is disposed around the light transmitting region 130 through the non-display region 120 while passing through the light transmitting region 130, so that a difference between the impedance of the first initialization signal line 111 in the pixel unit row corresponding to the light transmitting region 130 and the impedance of the other pixel unit rows may be reduced, and a phenomenon of display uniformity of the pixel units of the pixel unit row corresponding to the light transmitting region 130 along the first direction X may be further improved on the basis that the first initialization signal line 111 and the second initialization signal line 112 are provided to supply the first initialization signal and the second initialization signal, respectively. Moreover, the first sub-initialization signal line 1121 and the second sub-initialization signal line 1122 of the second initialization signal line 112 are respectively disposed at two sides of the light-transmitting area 130, that is, the second initialization signal line 112 is disconnected around the light-transmitting area 130, so that the second initialization signal line 112 can be prevented from increasing the width of the non-display area 120 through the non-display area 120, thereby ensuring the narrow frame design of the non-display area 120 and meeting the requirements of users.
On the basis of the above technical solution, with continued reference to fig. 2 to 4, the display area 110 is further provided with pixel units; the first initialization signal line 111 is electrically connected to a first initialization signal input terminal VREF1 of the pixel unit, and is used for initializing the driving transistor T1 in the pixel unit; the second initialization signal line 112 is electrically connected to the second initialization signal input terminal VREF2 of the pixel unit for initializing the light emitting device D1 of the pixel unit.
Specifically, when the first initialization signal line 111 is electrically connected to the first initialization signal input terminal VREF1 of the pixel unit, the first initialization signal line 111 provides the first initialization signal to the driving transistor T1 in the pixel unit. Moreover, the first initialization signal line 111 is disposed around the light transmissive region 130 through the non-display region 120, so that the difference between the impedance of the first initialization signal line 111 in the pixel unit row corresponding to the light transmissive region 130 and the impedance of the other pixel unit rows can be reduced, the gate initialization of the driving transistor T1 of the pixel unit in the pixel unit row corresponding to the light transmissive region 130 and the gate initialization of the driving transistor T1 of the pixel unit in the other pixel unit rows tend to be the same, and the uniformity of the display panel is improved. When the second initialization signal line 112 is electrically connected to the second initialization signal input terminal VREF2 of the pixel unit, the second initialization signal line 112 provides a second initialization signal to the light emitting device D1 in the pixel unit. Since the second initialization signal line 112 provides the second initialization signal to the light emitting device D1 after the data writing stage of the pixel unit, and the second initialization signal is independent of the driving current of the pixel unit, the initialization of the light emitting device D1 of the pixel unit in the pixel unit row corresponding to the light transmission region 130 is relatively different from the initialization of the light emitting device D1 of the pixel unit in the other pixel unit row along with the accumulation of the time for the second initialization signal provided by the second initialization signal line 112 to initialize the light emitting device D1, thereby ensuring the uniformity of the display panel.
Exemplarily, fig. 5 is a schematic structural diagram of another display panel provided in the embodiment of the present invention. As shown in fig. 5, the display panel further includes a scanning signal line 113; the scanning signal line 113 supplies a scanning signal as a multi-clock signal.
Specifically, the display panel includes a plurality of scanning signal lines 113, and each scanning signal line 113 supplies a scanning signal to the pixel unit. Illustratively, as shown in fig. 3 and 4, the display panel includes a first scan signal line 1131, a second scan signal line 1132 and a third scan signal line 1133, the first scan signal line 1131 is electrically connected to the gate of the first initialization transistor T4 in the pixel unit for providing a first scan signal to the gate of the first initialization transistor T4. The second scan signal line 1132 is electrically connected to the gates of the data writing transistor T2 and the threshold compensating transistor T3 in the pixel unit, and is used to supply a second scan signal to the data writing transistor T2 and the threshold compensating transistor T3. The third scan signal line 1133 is electrically connected to the gate of the second initialization transistor T7 in the pixel unit, and is used to provide a third scan signal to the second initialization transistor T7. In the operation of the pixel unit, in the first phase, the first scan signal line 1131 provides the first scan signal to control the first initialization transistor T4 to be turned on, so as to initialize the gate of the driving transistor T1. In the second phase, the second scan signal line 1132 provides a second scan signal to control the data writing transistor T2 and the threshold compensation transistor T3 to be turned on, so as to implement the writing of the data voltage. In the third stage, the third scan signal supplied from the third scan signal line 1133 controls the second initialization transistor T7 to be turned on, thereby implementing the anode initialization of the light emitting device D1. The scan signals supplied from the first scan signal line 1131, the second scan signal line 1132, and the third scan signal line 1133 may be sequentially output. When the scan signal is a multi-clock signal, i.e., the scan signal includes a plurality of clock signals. The first scanning signal provided by the first scanning signal line 1131 and the second scanning signal provided by the second scanning signal line 1132 implement the iterative process of gate initialization of the driving transistor T1 in the first stage of the pixel unit and data voltage writing in the second stage, and by disposing the first initialization signal line 111 to extend around the light transmissive region 130 through the non-display region 120, the difference between the impedance of the first initialization signal line 111 in the pixel unit row corresponding to the light transmissive region 130 and the impedance of the other pixel unit rows can be effectively reduced, and the phenomenon of display uniformity of the pixel units in the pixel unit row corresponding to the light transmissive region 130 along the first direction X can be improved. And at the third stage of the pixel unit, when the third scan signal supplied from the third scan signal line 1133 initializes the anode of the light emitting device D1, each clock signal in the third scan signal may initialize the anode of the light emitting device D1, and then the next clock signal further initializes the anode of the light emitting device D1 on the basis of the initialization of the previous clock signal, so as to accumulate the initialization of the anode of the light emitting device D1. When the second initialization signal line 112 is disconnected at the light-transmitting region 130, the bezel of the light-transmitting region 130 may be reduced on the basis of ensuring that the initialization of the light-emitting device D1 of the pixel unit in the pixel unit row corresponding to the light-transmitting region 130 is less different from the initialization of the light-emitting device D1 of the pixel unit in the other pixel unit row, thereby satisfying the narrow bezel requirement of the light-transmitting region 130 of the user on the basis of ensuring the uniformity of the display panel.
In the ith row of pixel units of the display panel, the first scanning signal line 1131 is a scanning signal line corresponding to the ith-1 row of pixel units, the second scanning signal line 1132 is a scanning signal line corresponding to the ith row of pixel units, and the third scanning signal line 1133 is a scanning signal line corresponding to the (i + 1) th row of pixel units, where i is an integer greater than or equal to 2 and less than n, and the nth row of pixel units corresponds to the last row of pixel units of the display panel.
Fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 6, the light-transmitting region 130 includes at least two sub light-transmitting regions 131, the non-display region 120 includes sub non-display regions 121, and the sub non-display regions 121 are disposed between the sub light-transmitting regions 131; the sub non-display area 121 is internally provided with compensation pixel units; the compensation pixel unit is used for compensating the load of the row where the compensation pixel unit is located.
Specifically, the light-transmitting region 130 may include a plurality of sub light-transmitting regions 131, and the light-transmitting region 130 includes two sub light-transmitting regions 131 as exemplarily shown in fig. 6. The pixel cell density of the two sub-transmissive regions 131 is less than that of the display region 110, so that the impedance of the pixel cell row corresponding to the sub-transmissive region 131 is less than that of the other pixel cell rows in the initialization process. In addition, a portion between the two sub light-transmitting areas 131 and included in the non-display area 121 is the sub non-display area 121. By arranging the compensation pixel units in the sub non-display area 121, and the row of the compensation pixel units corresponds to the row of the sub light-transmitting area 131, the load of the row of the sub light-transmitting area 131 can be compensated by the compensation pixel units, so that the load of the row of the sub light-transmitting area 131 in the initialization process is as close as possible to the load of the rows of other pixel units, thereby reducing the difference between the impedance of the row of the sub light-transmitting area 131 and the impedance of the rows of other pixel units caused by the factor light-transmitting area 131, and further improving the display uniformity of the pixel units of the row of the pixel units corresponding to the light-transmitting area 130 along the first direction X.
Fig. 7 is a schematic circuit diagram of a compensation pixel unit according to an embodiment of the present invention. As shown in fig. 7, the compensation pixel unit includes a first initialization module 210, a driving module 220, a compensation module 230, a data writing module 240, and a storage module 250; the control end of the first initialization module 210 is electrically connected to the first scan signal line 1131, the first end of the first initialization module 210 is electrically connected to the first initialization signal line 111, the second end of the first initialization module 210 is electrically connected to the control end of the driving module 220, the first end of the memory module 250 and the second end of the compensation module 230, the first end of the driving module 220 is electrically connected to the second end of the data writing module 240, the second end of the driving module 220 is electrically connected to the first end of the compensation module 230, the control end of the compensation module 230 is electrically connected to the second scan signal line 1132, the first end of the data writing module 240 is electrically connected to the data signal line VDATA, the second end of the data writing module 240 is electrically connected to the second scan signal line 1132, and the second end of the memory module 250 is electrically connected to the first power signal line VDD.
Specifically, the display panel further includes a data signal line VDATA for supplying a data voltage signal to the pixel unit and a first power signal line VDD for supplying a first power signal to the pixel unit. Since the control terminal of the first initialization module 210 is electrically connected to the first scan signal line 1131, the first terminal is electrically connected to the first initialization signal line 111, in the first phase of the operation of the pixel unit, when the first initialization signal line 111 initializes the gate of the driving transistor, the first initialization module 210 simultaneously initializes the control terminal of the driving module 220 through the first initialization signal line 111, so that the load of the first phase of operation of the pixel cells of the row of compensation pixel cells can be increased, the load of the row of the sub-transmissive region 131 during the gate initialization of the driving transistor is made as close as possible to the load of the other pixel cell rows, thereby reducing the difference between the impedance of the row of the sub-transmissive region 131 and the impedance of the other pixel unit rows caused by the factor transmissive region 131, and further improving the display uniformity of the pixel units of the pixel unit row corresponding to the transmissive region 130 along the first direction X.
In addition, the compensation pixel unit further includes a compensation module 230, a data writing module 240 and a storage module 250, for writing a data voltage signal to the driving module 220 when the pixel unit operates in the second phase. When the scan signal is a multi-clock signal, the compensation pixel unit can also form a repeating process of an initialization stage and a data writing stage of the driving module 220, corresponding to the working process of the pixel unit, so as to better compensate the load of the first stage of the pixel unit.
With continued reference to fig. 7, the first initialization module 210 includes a first transistor T1c, the driving module 220 includes a second transistor T2c, the compensation module 230 includes a third transistor T3c, the data writing module 240 includes a fourth transistor T4c, and the storage module 250 includes a storage capacitor Cs; the gate of the first transistor T1c is the control terminal of the first initialization block 210, the first terminal of the first transistor T1c is the first terminal of the first initialization block 210, and the second terminal of the first transistor T1c is the second terminal of the first initialization block 210; the gate of the second transistor T2c is the control terminal of the driving module 220, the first terminal of the second transistor T2c is the first terminal of the driving module 220, and the second terminal of the second transistor T2c is the second terminal of the driving module 220; the gate of the third transistor T3c is the control terminal of the compensation module 230, the first terminal of the third transistor T3c is the first terminal of the compensation module 230, and the second terminal of the third transistor T3c is the second terminal of the compensation module 230; the gate of the fourth transistor T4c is the control terminal of the data writing module 240, the first terminal of the fourth transistor T4c is the first terminal of the data writing module 240, and the second terminal of the fourth transistor T4c is the second terminal of the data writing module 240; a first pole of the storage capacitor Cs is a first terminal of the storage module 250, and a second pole of the storage capacitor Cs is a second terminal of the storage module 250.
Specifically, the transistor types of the first transistor T1c to the fourth transistor T4c may be the same as the transistor types in the pixel unit, so that the transistors in the compensation pixel units in the same row are connected to the same signal line as the corresponding transistors in the pixel unit, thereby synchronizing the operations of the compensation pixel units and the pixel units in the same row, ensuring that the compensation pixel units compensate the load of the pixel units in the first stage, and improving the display uniformity of the pixel units in the pixel unit row corresponding to the light-transmitting region 130 along the first direction X. In conjunction with fig. 4 and 7, fig. 4 exemplarily shows that the transistors in the pixel unit are P-type transistors, and fig. 7 exemplarily shows that the first transistor T1c to the fourth transistor T4c are all P-type transistors.
In addition, as can be seen from fig. 7, the compensation pixel unit includes only the first transistor T1c to the fourth transistor T4c and the storage capacitor Cs, and the arrangement of three transistors is reduced relative to the pixel unit, so that the space occupied by the compensation pixel unit can be reduced on the basis of ensuring the load of the compensation pixel unit in the first stage, and the manufacturing process of the compensation pixel unit is simplified.
Alternatively, the first to fourth transistors T1c to T4c are disposed at the same layer as the transistors in the pixel unit.
Specifically, the compensation pixel unit and the pixel unit of the display area 110 may be formed in the same process, so as to avoid an additional increase in the manufacturing process flow of the display panel. In addition, the sizes of the first transistor T1c through the fourth transistor T4c may be different from the sizes of the corresponding transistors in the pixel unit, and/or the size of the storage capacitor Cs may be different from the size of the capacitor in the pixel unit, so that in the first stage of the operation of the pixel unit, the sum of the load compensated by the compensation pixel unit corresponding to the sub light transmission region and the load of the pixel unit in the same row may be approximately equal to the sum of the loads of the pixel units in the other pixel unit rows.
Fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 8, the light-transmitting region 130 includes at least two sub light-transmitting regions 131, the second initialization signal line 112 further includes a third sub initialization signal line 1123, the third sub initialization signal line 1123 is disposed between the sub light-transmitting regions 131, the third sub initialization signal line 1123 corresponds to the first sub initialization signal line 1121 in a one-to-one manner along the first direction X, and the first sub initialization signal line 1121, the second sub initialization signal line 1122, and the third sub initialization signal line 1123 are disposed in the same layer.
Specifically, in the process of manufacturing the display panel, the array substrate may be manufactured, the light emitting device may be formed on the array substrate, and the sub light transmitting region 131 may be formed by opening a hole after the light emitting device is formed. When the sub light-transmitting region 131 is formed, a display panel corresponding to the sub light-transmitting region 131 may be removed by using a laser or the like. The second initialization signal line 112 may be formed in the process of forming the array substrate. When the sub-transmissive region 131 is formed, the second initialization signal line 112 is disconnected by opening a hole in a region corresponding to the sub-transmissive region 131, so as to form a first sub-initialization signal line 1121 and a second sub-initialization signal line 1122, thereby avoiding forming the first sub-initialization signal line 1121 and the second sub-initialization signal line 1122 when the array substrate is manufactured, and avoiding increasing the manufacturing process flow of the display panel. As shown in fig. 8, when the light transmissive region 130 includes two sub light transmissive regions 131, the second initialization signal line 112 is disconnected between the two sub light transmissive regions 131, that is, a third sub initialization signal line 1123 is further included between adjacent sub light transmissive regions 131, and the third sub initialization signal line 1123 is formed simultaneously with the first sub initialization signal line 1121 and the second sub initialization signal line 1122, so that the first sub initialization signal line 1121, the second sub initialization signal line 1122 and the third sub initialization signal line 1123 are also prevented from being formed when the array substrate is manufactured, and the manufacturing process of the display panel is prevented from being increased.
The embodiment of the invention also provides a driving method of the display panel, which is used for driving the display panel provided by any embodiment of the invention. The display panel includes a pixel unit, and a first initialization signal line, a second initialization signal line, a first scanning signal line, a second scanning signal line, a third scanning signal line, a data signal line, and a light emission control signal line that provide a driving signal for the pixel unit. Fig. 9 is a flowchart illustrating a driving method of a display panel according to an embodiment of the invention. As shown in fig. 9, the method includes:
s310, in the first stage, a first scanning signal provided by a first scanning signal line controls a first initialization signal provided by a first initialization signal line to initialize a driving transistor in a pixel unit; the first scanning signal provided by the first scanning signal line is a multi-clock signal;
s320, in the second stage, the second scanning signal provided by the second scanning signal line controls the data signal provided by the data signal line to be written into the driving transistor in the pixel unit; the second scanning signal provided by the second scanning signal line is a multi-clock signal;
s330, in a third stage, a third scanning signal provided by a third scanning signal line controls a second initialization signal provided by a second initialization signal line to initialize a light-emitting device of the pixel unit; the third scanning signal provided by the third scanning signal line is a multi-clock signal;
and S340, in the fourth stage, the light-emitting control signal provided by the light-emitting control signal line controls the light-emitting device in the pixel unit to emit light.
Specifically, fig. 10 is a timing diagram of the display panel according to the embodiment of the invention. Wherein ck is a timing sequence corresponding to the clock signal, s1 is a timing sequence corresponding to the first scan signal provided by the first scan signal line, s2 is a timing sequence corresponding to the second scan signal provided by the second scan signal line, s3 is a timing sequence corresponding to the third scan signal provided by the third scan signal line, and em is a timing sequence of the light emission control signal provided by the light emission control signal line. Illustratively, the transistors in the pixel cells on the display panel are each illustratively P-type transistors. The operation of the pixel unit will be described with reference to fig. 4, 9 and 10.
In the first phase T1, the first scan signal provided by the first scan signal line 1131 is at a low level, which controls the first initialization transistor T4 to be turned on, and the first initialization signal provided by the first initialization signal line VREF1 initializes the gate of the driving transistor T1 through the first initialization transistor T4.
In the second phase T2, the second scan signal line 1132 provides the second scan signal at low level, and controls the data writing transistor T2 and the threshold compensation transistor T3 to turn on, and the data signal provided by the data signal line VDATA is written into the gate of the driving transistor T1 through the data writing transistor T2, the driving transistor T1 and the threshold compensation transistor T3, so as to implement the writing of the data voltage.
In the third stage T3, the third scan signal provided by the third scan signal line 1133 is at a low level, which controls the second initialization transistor T7 to be turned on, and the second initialization signal provided by the second initialization signal line VREF2 is transmitted to the anode of the light emitting device D1 through the second initialization transistor T7, so as to initialize the anode of the light emitting device D1.
In the fourth phase T4, the light emitting control signal provided by the light emitting control signal line EM is at a low level, and the first light emitting control transistor T5 and the second light emitting control transistor T6 are controlled to be turned on, so that the driving current provided by the driving transistor T1 forms a loop, and the light emitting device D1 emits light.
In addition, because the first scanning signal and the second scanning signal are multi-clock signals, in the working process of the pixel unit, the first scanning signal provided by the first scanning signal line and the second scanning signal provided by the second scanning signal line realize the repeated processes of gate initialization of the driving transistor in the first stage and data voltage writing in the second stage of the pixel unit, and the first initialization signal line is arranged to extend around the light-transmitting area through the non-display area, so that the difference between the impedance of the pixel unit row corresponding to the first initialization signal line in the light-transmitting area and the impedance of other pixel unit rows can be effectively reduced, and the phenomenon of display uniformity of the pixel units in the pixel unit row corresponding to the light-transmitting area along the first direction is improved. In a third phase of the pixel unit, when the third scan signal provided by the third scan signal line initializes the anode of the light emitting device, each clock signal in the third scan signal may initialize the anode of the light emitting device, and then the next clock signal initializes the anode of the light emitting device further based on the initialization of the previous clock signal, so as to accumulate the initialization of the anode of the light emitting device. When the second initialization signal line is disconnected at the light-transmitting area, the frame of the light-transmitting area can be reduced on the basis of ensuring that the initialization difference between the initialization of the light-emitting devices of the pixel units in the pixel unit row corresponding to the light-transmitting area and the initialization of the light-emitting devices of the pixel units in other pixel unit rows is smaller, so that the narrow frame requirement of the light-transmitting area of a user is met on the basis of ensuring the uniformity of the display panel.
The embodiment of the invention also provides a display device. Fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention. As shown in fig. 11, the display device 300 includes a display panel 301 according to any embodiment of the present invention. Since the display device 300 includes the display panel 301, the display device has the advantages of the display panel provided by any embodiment of the present invention, and the description thereof is omitted here.
It is exemplarily shown in fig. 11 that the display panel 301 includes one sub-transmissive region. In other embodiments, the display panel 301 may further have a plurality of sub-transmissive regions.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A display panel is characterized by comprising a display area, a non-display area and a light-transmitting area; the light-transmitting area comprises at least one sub light-transmitting area; the non-display area is arranged around the sub-light-transmitting area, and the display area is arranged around the non-display area;
the display area is provided with a first initialization signal line and a second initialization signal line, and the first initialization signal line and the second initialization signal line extend along a first direction; the first initialization signal lines are arranged around the light-transmitting area through the non-display area so as to reduce the difference value between the impedance of the pixel unit row corresponding to the first initialization signal line in the light-transmitting area and the impedance of other pixel unit rows, the second initialization signal lines comprise first sub initialization signal lines and second sub initialization signal lines, and the first sub initialization signal lines and the second sub initialization signal lines are respectively arranged on two sides of the light-transmitting area and are in one-to-one correspondence; the second initialization signal line is disconnected around the light-transmitting area, and the first direction is the extending direction of the scanning signal line;
the display area is also provided with a pixel unit; the first initialization signal line is electrically connected with a first initialization signal input end of the pixel unit; the second initialization signal line is electrically connected with a second initialization signal input end of the pixel unit.
2. The display panel according to claim 1, wherein the first initialization signal line is used for initializing a driving transistor in the pixel unit; the second initialization signal line is used for initializing a light emitting device of the pixel unit.
3. The display panel according to claim 2, wherein the light-transmitting region comprises at least two sub light-transmitting regions, and the non-display region comprises sub non-display regions disposed between the sub light-transmitting regions; a compensation pixel unit is arranged in the sub non-display area; the compensation pixel unit is used for compensating the load of the row where the compensation pixel unit is located.
4. The display panel according to claim 3, wherein the compensation pixel unit comprises a first initialization module, a driving module, a compensation module, a data writing module and a storage module;
the control end of the first initialization module is electrically connected with a first scanning signal line, the first end of the first initialization module is electrically connected with the first initialization signal line, the second end of the first initialization module is electrically connected with the control end of the driving module, the first end of the storage module and the second end of the compensation module, the first end of the driving module is electrically connected with the second end of the data writing module, the second end of the driving module is electrically connected with the first end of the compensation module, the control end of the compensation module is electrically connected with a second scanning signal line, the first end of the data writing module is electrically connected with a data signal line, the second end of the data writing module is electrically connected with the second scanning signal line, and the second end of the storage module is electrically connected with a first power signal line.
5. The display panel according to claim 4, wherein the first initialization module comprises a first transistor, the driving module comprises a second transistor, the compensation module comprises a third transistor, the data writing module comprises a fourth transistor, and the storage module comprises a storage capacitor;
a gate of the first transistor is a control terminal of the first initialization module, a first terminal of the first transistor is a first terminal of the first initialization module, and a second terminal of the first transistor is a second terminal of the first initialization module;
a gate of the second transistor is a control end of the driving module, a first pole of the second transistor is a first end of the driving module, and a second pole of the second transistor is a second end of the driving module;
the grid electrode of the third transistor is the control end of the compensation module, the first electrode of the third transistor is the first end of the compensation module, and the second electrode of the third transistor is the second end of the compensation module;
a gate of the fourth transistor is a control end of the data writing module, a first pole of the fourth transistor is a first end of the data writing module, and a second pole of the fourth transistor is a second end of the data writing module;
the first pole of the storage capacitor is the first end of the storage module, and the second pole of the storage capacitor is the second end of the storage module.
6. The display panel according to claim 5, wherein the first to fourth transistors are provided in the same layer as the transistors in the pixel unit.
7. The display panel according to claim 1, wherein the light-transmitting regions include at least two sub light-transmitting regions, wherein the second initialization signal line further includes a third sub initialization signal line, the third sub initialization signal line is disposed between the sub light-transmitting regions, the third sub initialization signal line corresponds to the first sub initialization signal line one to one along the first direction, and the first sub initialization signal line, the second sub initialization signal line, and the third sub initialization signal line are disposed in the same layer.
8. The display panel according to claim 2, further comprising a scanning signal line; the scanning signal provided by the scanning signal line is a multi-clock signal.
9. A driving method of a display panel for driving the display panel according to any one of claims 1 to 8, the display panel including a pixel unit, and a first initialization signal line, a second initialization signal line, a first scanning signal line, a second scanning signal line, a third scanning signal line, a data signal line, and a light emission control signal line which supply a driving signal to the pixel unit; it is characterized by comprising:
in a first stage, a first scanning signal provided by the first scanning signal line controls a first initialization signal provided by the first initialization signal line to initialize a driving transistor in the pixel unit; the first scanning signal provided by the first scanning signal line is a multi-clock signal;
in a second phase, a second scanning signal provided by the second scanning signal line controls a data signal provided by the data signal line to be written into the driving transistor in the pixel unit; the second scanning signal provided by the second scanning signal line is a multi-clock signal;
in a third phase, a third scanning signal provided by the third scanning signal line controls a second initialization signal provided by the second initialization signal line to initialize a light emitting device of the pixel unit; a third scanning signal provided by the third scanning signal line is a multi-clock signal;
in the fourth stage, the light-emitting control signal provided by the light-emitting control signal line controls the light-emitting device in the pixel unit to emit light.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
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