CN111669894A - Microstrip circuit and manufacturing method thereof - Google Patents
Microstrip circuit and manufacturing method thereof Download PDFInfo
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- CN111669894A CN111669894A CN202010558606.2A CN202010558606A CN111669894A CN 111669894 A CN111669894 A CN 111669894A CN 202010558606 A CN202010558606 A CN 202010558606A CN 111669894 A CN111669894 A CN 111669894A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/08—Coupling devices of the waveguide type for linking dissimilar lines or devices
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention relates to a microstrip circuit and a manufacturing method thereof, the microstrip circuit comprises a substrate, the substrate is provided with a via hole penetrating from a first surface to a second surface, a first conducting layer covers the first surface, a first component is connected with the first conducting layer, a second conducting layer covers the second surface, a second component is connected with the second conducting layer, a conducting medium is arranged in the via hole, and the first conducting layer and the second conducting layer are respectively at least partially overlapped with the conducting medium. A manufacturing method of a microstrip circuit comprises the following steps: the method comprises the steps of forming a through hole in a substrate, coating photoresist on the substrate with the through hole, carrying out exposure treatment and development treatment on the substrate coated with the photoresist, filling a conductive medium in the through hole, coating a first conductive layer and a second conductive layer in a pattern area, so that the first conductive layer and the second conductive layer are at least partially overlapped with the conductive medium respectively, and stripping the photoresist from the substrate. The microstrip circuit and the manufacturing method thereof simplify the structure and are convenient to assemble.
Description
Technical Field
The invention relates to the technical field of microstrip circuits, in particular to a microstrip circuit and a manufacturing method thereof.
Background
With the rapid development of the information industry, the demand for high frequency microstrip devices (such as circulators, isolators, etc.) has increased dramatically. The high-frequency microstrip device comprises a microstrip circuit, wherein the microstrip circuit comprises a substrate and electronic components arranged on the front side and the back side of the substrate.
The traditional manufacturing method of the microstrip circuit comprises the following steps: a circuit is manufactured by photoetching and corrosion after a metal layer is sputtered/electroplated on one surface of the substrate, and electronic components on the front and back surfaces of the substrate are conducted in a gold wire bonding mode, so that the structure assembly is complex, the processing requirement is higher, the production efficiency is lower, and the overall production cost is higher.
Disclosure of Invention
Accordingly, it is necessary to provide a microstrip circuit and a method for manufacturing the same, which are directed to the problems of complicated assembling process and low processing efficiency of the microstrip circuit structure.
A microstrip circuit comprising:
the substrate comprises a first surface and a second surface which are positioned on different sides, and a through hole which penetrates from the first surface to the second surface is formed in the substrate;
the first conducting layer covers the first surface, and the first component is connected to the first conducting layer;
the second conducting layer covers the second surface, and the second component is connected to the second conducting layer; and
and the conductive medium is arranged in the via hole, the first conductive layer and the second conductive layer are respectively at least partially overlapped with the conductive medium, and when the first component and the second component are in working states, circuits between the first component and the second component can be communicated.
According to the microstrip circuit, the conductive medium is at least partially overlapped with the first conductive layer and the second conductive layer, when the microstrip circuit is in a working state, the conductive medium in the through hole can conduct corresponding components on the first conductive layer and the second conductive layer which are positioned on different sides of the substrate, and an electric wire does not need to be additionally laid to connect the first component and the second component, so that the structure is simplified, and the microstrip circuit is convenient to assemble.
In one embodiment, the first conductive layer, the second conductive layer and the conductive medium are an integrally formed structure.
In one embodiment, the method further comprises at least one of the following steps:
the substrate is made of a non-metal magnetic material;
the first conducting layer, the second conducting layer and the conducting medium are nano silver.
A manufacturing method of a microstrip circuit comprises the following steps:
forming a via hole in a substrate, wherein the substrate comprises a first surface and a second surface which are positioned on different sides, and the via hole penetrates from the first surface to the second surface;
coating photoresist on the substrate with the via hole to enable the photoresist to cover the first surface and the second surface and fill in the via hole;
exposing and developing the substrate coated with the photoresist to expose the via hole and form a pattern area on the photoresist;
filling a conductive medium in the via hole, and coating a first conductive layer and a second conductive layer in the pattern area so that the first conductive layer and the second conductive layer are respectively at least partially overlapped with the conductive medium;
and stripping the photoresist from the substrate to form a circuit pattern.
In one embodiment, the step of forming the via hole in the substrate includes the steps of:
acquiring the size and position information of the via hole, and marking the via hole on the substrate;
and positioning the substrate, and drilling the through hole at the mark of the substrate.
In one embodiment, the step of opening the via hole in the substrate is followed by the steps of:
carrying out mechanical cleaning and/or ultrasonic cleaning on the substrate with the through hole to remove impurities on the substrate and in the through hole;
and carrying out surface pretreatment on the substrate with the through hole, and drying the substrate.
In one embodiment, the step of coating a photoresist on the substrate having the via hole to make the photoresist cover the first surface and the second surface, and filling the via hole includes the steps of:
uniformly coating the photoresist on the first surface and the second surface, and filling the photoresist in the via hole;
and drying and curing the photoresist.
In one embodiment, the step of filling a conductive medium in the via hole and coating the pattern area with a first conductive layer and a second conductive layer so that the first conductive layer and the second conductive layer are at least partially overlapped with the conductive medium respectively includes:
filling the conductive medium in the through hole;
coating the first conductive layer and the second conductive layer in the pattern area in a scraping mode, and enabling the first conductive layer and the second conductive layer to be at least partially overlapped with the conductive medium respectively;
and heating and curing the first conductive layer, the second conductive layer and the conductive medium.
In one embodiment, the step of stripping the photoresist from the substrate to form the circuit pattern comprises:
and immersing the substrate with the conductive medium, the first conductive layer and the second conductive layer into stripping liquid, and cleaning to remove the photoresist in the non-pattern area.
A manufacturing method of a microstrip circuit comprises the following steps:
forming a via hole in a substrate, wherein the substrate comprises a first surface and a second surface which are positioned on different sides, and the via hole penetrates from the first surface to the second surface;
filling a conductive medium in the via hole, coating a first conductive layer on the first surface, and coating a second conductive layer on the second surface, so that the first conductive layer and the second conductive layer are at least partially overlapped with the conductive medium respectively;
and carrying out laser engraving on the substrate with the conductive medium, the first conductive layer and the second conductive layer to form a circuit pattern.
According to the manufacturing method of the microstrip circuit, the conductive medium in the through hole can conduct the corresponding components on the first conductive layer and the second conductive layer which are positioned on different sides of the substrate, and no additional electric wire is needed to be laid, so that the structure and assembly of the microstrip circuit are convenient and optimized, and the processing efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a microstrip circuit according to an embodiment;
fig. 2a to 2f are schematic structural diagrams illustrating different processes of a method for manufacturing a microstrip circuit according to an embodiment;
FIG. 3 is a flow chart of a method for fabricating a microstrip circuit according to an embodiment;
FIG. 4 is a flowchart of S510 of a method for fabricating a microstrip circuit according to an embodiment;
fig. 5 is a flowchart of S510 shown in fig. 3;
FIG. 6 is a flowchart of S520 shown in FIG. 3;
FIG. 7 is a flowchart of S540 shown in FIG. 3;
FIG. 8 is a flow chart of a method for fabricating a microstrip circuit according to another embodiment;
fig. 9a to 9c are schematic structural diagrams of different flows in the method for manufacturing a microstrip circuit shown in fig. 8.
Reference numerals: 10. a substrate; 11. a first surface; 12. a second surface; 13. a via hole; 20. a first conductive layer; 30. a second conductive layer; 40. a conductive medium; 70. photoresist; 80. a mask plate; 90. a heater.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like as used herein are for illustrative purposes only and do not denote a unique embodiment.
Referring to fig. 1, a microstrip circuit according to an embodiment includes a substrate 10, a first conductive layer 20, a second conductive layer 30, a first component and a second component (not shown), and a conductive medium 40.
Specifically, the substrate 10 includes a first surface 11 and a second surface 12 located on different sides, a first conductive layer 20 covers the first surface 11, a second conductive layer 30 covers the second surface 12, a first component is connected to the first conductive layer 20, and a second component is connected to the second conductive layer 30.
The substrate 10 is provided with a via hole 13 penetrating from the first surface 11 to the second surface 12, the conductive medium 40 is filled in the via hole 13, the first conductive layer 20 and the second conductive layer 30 are at least partially overlapped with the conductive medium 40, and when the first component and the second component are in an operating state, a circuit between the first component and the second component can be communicated.
Because the first conducting layer 20 and the second conducting layer 30 are at least partially overlapped with the conducting medium 40 and can conduct electricity, when the first component and the second component are in working states, the conducting medium 40 can conduct corresponding components on the first conducting layer 20 and the second conducting layer 30 which are positioned on different sides of the substrate 10, and connecting wires do not need to be additionally arranged between the first component and the second component, so that the microstrip circuit structure is simplified, the assembly is convenient, and the production efficiency is improved.
It should be noted that the shape of the via hole 13 may be circular, square or other irregular shapes, and may be set according to actual requirements, and the shape is not limited herein.
In some embodiments, the first conductive layer 20, the second conductive layer 30 and the conductive medium 40 are integrally formed, which is beneficial to circuit signal transmission during conduction and improves the condition of poor circuit contact. In other embodiments, the first conductive layer 20, the second conductive layer 30 and the conductive medium 40 may also be a tiled structure.
In some embodiments, the substrate 10 is a non-metallic magnetic material (e.g., ferrite ceramic) with high resistivity, low eddy current loss, high hardness, and stable chemical properties, which facilitates processing. The first conductive layer 20, the second conductive layer 30 and the conductive medium 40 are made of nano silver, so that the microstrip circuit has good conductivity, fine particles and strong adhesive force, and is convenient to process. In other embodiments, the first conductive layer 20, the second conductive layer 30, and the conductive medium 40 may also be conductive metals with different conductive properties.
Referring to fig. 3, a method for manufacturing a microstrip circuit according to an embodiment includes the following steps:
s510, forming a via hole 13 in the substrate 10, as shown in fig. 2a, the substrate 10 includes a first surface 11 and a second surface 12 located on different sides, so that the via hole 13 penetrates from the first surface 11 to the second surface 12.
Specifically, in this embodiment, as shown in fig. 5, step S510 includes the following steps:
s511, the size and position information of the via hole 13 is obtained and marked on the substrate 10.
The size and position of the via hole 13 can be determined according to the arrangement and design requirements of the components, and specific positions are marked on the substrate 10 so as to facilitate accurate hole opening.
S512, the substrate 10 is positioned, and the via hole 13 is drilled at the mark of the substrate 10.
After the substrate 10 is positioned in the positioning fixture, holes are formed in the marks of the substrate 10, so that the substrate 10 is prevented from moving during drilling to cause the position of the through hole 13 to deviate.
In some embodiments, the substrate 10 may be fixed to the positioning fixture in a vacuum adsorption manner and exposed at the mark, and then the next processing process is performed on the substrate 10, so that the substrate 10 can be effectively positioned, and the damage to the substrate 10 is reduced.
In some embodiments, the holes are automatically drilled through the laser processing equipment, manual handheld equipment is not needed, and the processing precision is high.
Specifically, in this embodiment, as shown in fig. 4, step 560 is further included after step S510, and step 560 includes the following steps:
s561, the substrate 10 having the via hole 13 is subjected to mechanical cleaning and/or ultrasonic cleaning.
After the substrate 10 is provided with the via hole 13, impurities are very easily left on the surface of the substrate 10 and the wall of the via hole 13, and the impurities on the surface of the substrate 10 can be removed by mechanical cleaning. The ultrasonic cleaning can remove impurities remaining in the hole wall of the via hole 13 and impurities on the surface of the substrate 10, and the ultrasonic cleaning agent can be set to an alkaline solution during the ultrasonic cleaning, so that the impurities can be removed quickly and effectively.
S562, the substrate 10 having the via hole 13 is subjected to surface pretreatment and dried.
The substrate 10 is easily oxidized to generate an oxide layer or impurities on the surface during transportation and processing, and oil stains, rust, scale, etc. remaining on the surface of the substrate 10 are removed by surface pretreatment to keep the surface of the substrate 10 clean and improve the adhesion of the surface of the substrate 10.
In a specific embodiment, the surface pretreatment includes a chemical treatment or a mechanical processing treatment, and a suitable treatment process may be selected according to the actual residue and impurities.
S520, coating the photoresist 70 on the substrate 10 having the via hole 13, so that the photoresist 70 covers the first surface 11 and the second surface 12 and fills the via hole 13, as shown in fig. 2 b.
Specifically, in this embodiment, as shown in fig. 6, step S520 includes the following steps:
s521, the first surface 11 and the second surface 12 are uniformly coated with the photoresist 70.
By means of blade coating or spraying, the photoresist 70 is uniformly coated on the first surface 11 and the second surface 12, so that the photoresist 70 can be fully coated on the via hole 13, and the material saving and the effect are good.
And S522, drying and curing the photoresist 70.
And drying the substrate 10 coated with the photoresist 70 on a constant temperature hot plate to cure the photoresist 70 on the first surface 11 and the second surface 12.
S530, the substrate 10 coated with the photoresist 70 is exposed and developed to expose the via hole 13, and a pattern region is formed on the photoresist 70.
Referring to fig. 2c, the photoresist 70 on the first surface 11 and the second surface 12 is covered with a mask 80, so that the laser beam penetrates through the mask 80 and irradiates onto the photoresist 70, and the photoresist 70 is exposed according to the layout designed on the mask 80 (the arrow shown in fig. 2c indicates the irradiation of the laser beam).
Note that the photoresist 70 may be positive or negative. When the photoresist 70 is positive, the pattern same as the layout of the mask plate 80 is copied to the photoresist 70; when the photoresist 70 is negative, the pattern that is the inverse of the mask 80 layout is replicated on the photoresist 70.
Referring to fig. 2d, the substrate 10 after exposure is immersed in a developing solution for development, so as to expose the via hole 13 and form a pattern region on the photoresist 70.
S540, filling the conductive medium 40 in the via hole 13, and coating the first conductive layer 20 and the second conductive layer 30 in the pattern area, so that the first conductive layer 20 and the second conductive layer 30 are at least partially overlapped with the conductive medium 40 respectively.
Specifically, in this embodiment, step S540 includes the following steps:
in step S541, the via hole 13 is filled with the conductive material 40.
The conductive medium 40 is filled in the via hole 13, so that the conductive medium 40 can be fully distributed in the via hole 13, and the influence of the partial unfilled via hole 13 on the subsequent process flow is prevented.
And S542, coating the first conductive layer 20 and the second conductive layer 30 in the pattern area in a scraping mode, and enabling the first conductive layer 20 and the second conductive layer 30 to be at least partially overlapped with the conductive medium 40 respectively.
By means of blade coating or spraying, the first conductive layer 20 and the second conductive layer 30 are uniformly coated on the first surface 11 and the second surface 12, and the first conductive layer 20 and the second conductive layer 30 are at least partially overlapped with the conductive medium 40 respectively, so that materials are saved, the conductive effect is good, and additional circuit laying is not needed.
S543, the first conductive layer 20, the second conductive layer 30 and the conductive medium 40 are heated and cured.
It should be noted that the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 are all in liquid state during coating, and after coating, the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 need to be heated by the heater 90 shown in fig. 2f, so that the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 become solid and are solidified on the surface of the substrate 10.
The photoresist 70 is stripped from the substrate 10 to form a wiring pattern S550.
Specifically, the substrate 10 having the conductive medium 40, the first conductive layer 20, and the second conductive layer 30 is immersed in a stripping solution and cleaned to remove the photoresist 70 in the non-pattern region.
In some embodiments, in order to avoid the stripping solution from chemically reacting with the conductive medium 40, the first conductive layer 20, and the second conductive layer 30, the stripping solution may be plasma, and is neutral and chemically stable, and will not affect the conductive medium 40, the first conductive layer 20, and the second conductive layer 30.
Referring to fig. 8, another embodiment of a method for manufacturing a microstrip circuit includes the following steps:
s610, forming a via hole 13 on the substrate 10, as shown in fig. 9a, the substrate 10 includes a first surface 11 and a second surface 12 located on different sides, so that the via hole 13 penetrates from the first surface 11 to the second surface 12.
Step S610 is identical to step S510 in the previous embodiment, and is not described herein again.
S620, filling the conductive medium 40 in the via hole 13, and coating the first conductive layer 20 on the first surface 11 and the second conductive layer 30 on the second surface 12, so that the first conductive layer 20 and the second conductive layer 30 are at least partially overlapped with the conductive medium 40, respectively, as shown in fig. 9 b.
In some embodiments, the conductive medium 40 is filled in the via hole 13, so that the conductive medium 40 can be fully distributed in the via hole 13, and the influence of the partial non-filling of the via hole 13 on the subsequent process flow is prevented.
By means of blade coating or spraying, the first conductive layer 20 and the second conductive layer 30 are uniformly coated on the first surface 11 and the second surface 12, and the first conductive layer 20 and the second conductive layer 30 are at least partially overlapped with the conductive medium 40 respectively, so that materials are saved, the conductive effect is good, and additional circuit laying is not needed.
It should be noted that the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 are all in liquid state during coating, and after coating, the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 need to be heated by the heater 90 shown in fig. 9c, so that the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 become solid and are solidified on the surface of the substrate 10.
S630, laser engraving the substrate 10 having the conductive medium 40, the first conductive layer 20 and the second conductive layer 30 to form a circuit pattern.
The excess conductive medium 40, the first conductive layer 20 and the second conductive layer 30 on the substrate 10 are removed by laser engraving to form a circuit pattern.
In the manufacturing method of the microstrip circuit, the corresponding components on the first conducting layer 20 and the second conducting layer 30 on different sides of the substrate 10 can be conducted through the conducting medium 40 in the conducting hole 13, and no additional electric wire is needed to be laid to connect the first component and the second component, so that the manufacturing method simplifies the process, is suitable for mass production, and improves the reliability of electric connection.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A microstrip circuit comprising:
the substrate comprises a first surface and a second surface which are positioned on different sides, and a through hole which penetrates from the first surface to the second surface is formed in the substrate;
the first conducting layer covers the first surface, and the first component is connected to the first conducting layer;
the second conducting layer covers the second surface, and the second component is connected to the second conducting layer; and
and the conductive medium is arranged in the via hole, the first conductive layer and the second conductive layer are respectively at least partially overlapped with the conductive medium, and when the first component and the second component are in working states, circuits between the first component and the second component can be communicated.
2. The microstrip circuit of claim 1 wherein the first conductive layer, the second conductive layer and the conductive medium are integrally formed.
3. The microstrip circuit of claim 1 further comprising at least one of:
the substrate is made of a non-metal magnetic material;
the first conducting layer, the second conducting layer and the conducting medium are nano silver.
4. A manufacturing method of a microstrip circuit is characterized by comprising the following steps:
forming a via hole in a substrate, wherein the substrate comprises a first surface and a second surface which are positioned on different sides, and the via hole penetrates from the first surface to the second surface;
coating photoresist on the substrate with the via hole to enable the photoresist to cover the first surface and the second surface and fill in the via hole;
exposing and developing the substrate coated with the photoresist to expose the via hole and form a pattern area on the photoresist;
filling a conductive medium in the via hole, and coating a first conductive layer and a second conductive layer in the pattern area so that the first conductive layer and the second conductive layer are respectively at least partially overlapped with the conductive medium;
and stripping the photoresist from the substrate to form a circuit pattern.
5. The method of claim 4, wherein the step of forming the via hole in the substrate comprises the steps of:
acquiring the size and position information of the via hole, and marking the via hole on the substrate;
and positioning the substrate, and drilling the through hole at the mark of the substrate.
6. The method of claim 4, wherein the step of forming the via hole in the substrate is followed by the steps of:
carrying out mechanical cleaning and/or ultrasonic cleaning on the substrate with the through hole to remove impurities on the substrate and in the through hole;
and carrying out surface pretreatment on the substrate with the through hole, and drying the substrate.
7. The method of claim 4, wherein the step of coating a photoresist on the substrate having the via hole to cover the first surface and the second surface and filling the via hole comprises the steps of:
uniformly coating the photoresist on the first surface and the second surface, and filling the photoresist in the via hole;
and drying and curing the photoresist.
8. The method of claim 4, wherein the step of filling a conductive medium in the via hole and coating the pattern area with a first conductive layer and a second conductive layer so that the first conductive layer and the second conductive layer at least partially overlap the conductive medium respectively comprises:
filling the conductive medium in the through hole;
coating the first conductive layer and the second conductive layer in the pattern area in a scraping mode, and enabling the first conductive layer and the second conductive layer to be at least partially overlapped with the conductive medium respectively;
and heating and curing the first conductive layer, the second conductive layer and the conductive medium.
9. The method of claim 4, wherein the step of stripping the photoresist from the substrate to form a line pattern comprises:
and immersing the substrate with the conductive medium, the first conductive layer and the second conductive layer into stripping liquid, and cleaning to remove the photoresist in the non-pattern area.
10. A manufacturing method of a microstrip circuit is characterized by comprising the following steps:
forming a via hole in a substrate, wherein the substrate comprises a first surface and a second surface which are positioned on different sides, and the via hole penetrates from the first surface to the second surface;
filling a conductive medium in the via hole, coating a first conductive layer on the first surface, and coating a second conductive layer on the second surface, so that the first conductive layer and the second conductive layer are at least partially overlapped with the conductive medium respectively;
and carrying out laser engraving on the substrate with the conductive medium, the first conductive layer and the second conductive layer to form a circuit pattern.
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