CN111651401A - Method for reinforcing Feiteng processor board card - Google Patents
Method for reinforcing Feiteng processor board card Download PDFInfo
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- CN111651401A CN111651401A CN202010513208.9A CN202010513208A CN111651401A CN 111651401 A CN111651401 A CN 111651401A CN 202010513208 A CN202010513208 A CN 202010513208A CN 111651401 A CN111651401 A CN 111651401A
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- 238000000034 method Methods 0.000 title claims abstract description 51
- 230000003014 reinforcing effect Effects 0.000 title claims abstract description 18
- 238000003466 welding Methods 0.000 claims abstract description 23
- 238000005728 strengthening Methods 0.000 claims abstract description 19
- 238000004891 communication Methods 0.000 claims abstract description 11
- 238000005476 soldering Methods 0.000 claims abstract description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 8
- 230000002787 reinforcement Effects 0.000 claims description 6
- 101100205847 Mus musculus Srst gene Proteins 0.000 claims description 3
- 238000009434 installation Methods 0.000 abstract description 12
- 238000013461 design Methods 0.000 abstract description 9
- 230000006870 function Effects 0.000 description 21
- 238000010586 diagram Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000009131 signaling function Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7803—System on board, i.e. computer system on one or more PCB, e.g. motherboards, daughterboards or blades
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Abstract
A strengthening method of a board card of a Feiteng processor comprises the steps that a processor, a DDR RAM, a FLASH and a power management module are installed on the board card; soldering the board card to the bottom board by soldering tin; arranging a stamp hole pad and a connector on the board card to realize communication between the board card and the bottom plate; the connector and the stamp hole pad are in signal connection with the processor, the DDR RAM, the FLASH and the power management module; the stamp hole welding plate is arranged on the edge of the periphery of the board card. The reinforcing method is reasonable in design, convenient and reliable, and not only is the reinforcing installation of the board card and the bottom plate realized, but also the communication between the board card and the bottom plate is ensured through the arrangement of the stamp hole welding disc and the connector.
Description
Technical Field
The invention relates to the technical field of processors, in particular to a method for reinforcing a board card of a Feiteng processor.
Background
At present, a stamp hole welding method, an SO-DIMM method and a comexpress method are generally adopted for communication between a board card and a bottom plate.
The stamp hole welding method is that stamp hole welding pads are manufactured on four sides of a board card, and the stamp hole welding pads are welded to welding pads at corresponding positions on a bottom plate through soldering tin;
the SO-DIMM method is that a golden finger pin is manufactured on one side of the board card, an SO-DIMM slot is installed on a bottom plate, and the installation is carried out by adopting an installation mode similar to that of a memory bank of a notebook computer;
the com express method is characterized in that a com express A slot is installed on the bottom surface of a board card, a com express B slot is installed on a bottom plate, four positioning through holes are formed near four right-angle sides of the board card in order to improve the defect of shock and vibration resistance, four positioning through holes are also formed in the corresponding positions of the bottom plate, and the board card and the bottom plate are locked and reinforced through stud nuts.
However, the above three methods all have some drawbacks:
the stamp hole welding method cannot solve the PCI-E bus transmission based on the high-speed serial differential signal technology;
the SO-DIMM method cannot solve the problem of strengthening of shock vibration resistance;
the com express method adopts the com express A/B connector for butt joint installation, so that the height of components is increased, the application of products with harsh requirements on space installation cannot be met, the cost loss of the com express A/B connector needs to be additionally paid for the application of products without a PCI-E bus, and the additionally reinforced installation method is complicated.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a strengthening method of a Feiteng processor board card, which is reasonable in design, safe and reliable and can realize the strengthening communication between the board card and a bottom board, aiming at the defects of the prior art.
The technical problem to be solved by the present invention is achieved by the following technical means. The invention relates to a method for reinforcing a Feiteng processor board card, which comprises the following steps
Installing a processor, a DDR RAM, a FLASH and a power management module on a board card;
soldering the board card to the bottom board by soldering tin;
arranging a stamp hole pad and a connector on the board card to realize communication between the board card and the bottom plate;
the connector and the stamp hole pad are in signal connection with the processor, the DDR RAM, the FLASH and the power management module;
the stamp hole welding plate is arranged on the edge of the periphery of the board card.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the method for reinforcing the board card of the FT processor, the connector includes a first connector and a second connector, the first connector and the second connector both include two rows of pins arranged in parallel, and the pins are packaged on the board card through pin pads.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the method for reinforcing the fibrage processor board card, the length of the pin pad is 0.6mm, and the width of the pin pad is 0.3 mm.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the above-mentioned method for reinforcing the fibrage processor board card, the number of pins in each row is 20.
The technical problem to be solved by the invention can be further solved by adopting the following technical scheme that in the method for reinforcing the Feiteng processor board card, a stamp hole welding disc is rectangular, a semicircular hole is formed in the stamp hole welding disc close to the edge side of the board card, the length of the stamp hole welding disc is 1mm, the width of the stamp hole welding disc is 0.9mm, the radius of the semicircular hole is 0.3mm, and the middle distance of the stamp hole welding disc is 1.3 mm.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the strengthening method for the board card of the FT processor, the DDR RAM, the FLASH, the power management module and the stamp hole pad are connected by the following signals:
(1) the power supply signal comprises +3.3V and + 2.5V;
(2) a digital ground signal GND;
(3) two sets of serial port signals, including TX0, RX0, TX1, RX 1;
(4) 32-bit GPIO signals including PA [0..7], PB [0..7], PC [0..7], and PD [0..7 ];
(5) two sets of RGMII signals, each set of RGMII signals comprising GTX _ CLK, TXD [ 0.3 ], TX _ CTL, RX _ CLK, RXD [ 0.3 ], RX _ CTL, COL, CRS, MDC, MDIO, respectively;
(6) a reset signal SRST.
The technical problem to be solved by the present invention can be further solved by the following technical solutions, in the strengthening method for the board card of the FT processor, the DDR RAM, the FLASH, the power management module and the connector are in signal connection by using the following signals:
(1) the signals connected by the first connector comprise 4 Lane signals of a state signal PRSNT1, a control signal WAKE, a control signal PERST, a digital ground signal GND, a reference clock signal REFCLK +, a reference clock signal REFCLK-and PCI-E X4, wherein each Lane signal comprises two pairs of differential signals OUTX +, OUTX-, INX +, INX-, and x are 0 to 3;
(2) the signals connected by the second connector include a state signal PRSNT2, a digital ground signal GND and 4 Lane signals of PCI-E X4, each Lane signal including two pairs of differential signals OUTX +, OUTX-, INX +, INX-, x being 4 to 7.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the above mentioned strengthening method for the fibraure processor board card, two signals +, -adjacent wires of the differential signal pair of the first connector and the second connector are isolated digitally.
The technical problem to be solved by the present invention can be further solved by the following technical solution, in the above mentioned strengthening method for the board card of the FT processor, in the strengthening method, the processor mounted on the board card is an FT-2000A processor.
The technical problem to be solved by the present invention can be further solved by the following technical solutions, in the above mentioned strengthening method for the board card of the FT processor, the method for the board card to realize the PCI-E bus function through the first connector and the second connector is:
(1) the first connector is connected with a corresponding connector of the bottom board through a cable, and the second connector is not connected with the bottom board and provides the bus function of PCI-E X4;
(2) the first connector is connected with the corresponding connector of the bottom plate through a cable, and the second connector is connected with the corresponding connector of the bottom plate through the cable to provide the bus function of PCI-E X8;
(3) the first connector is not connected with the bottom plate, and the second connector is connected with the corresponding connector of the bottom plate through a cable and does not provide the bus function of the PCI-E;
(4) the first connector is not connected to the backplane and the second connector is not connected to the backplane and does not provide PCI-E bus functionality.
Compared with the prior art, the invention integrates the processor, the DDR RAM, the FLASH and the power management module into one board card, and then the board card is welded on the bottom plate through soldering tin to realize reinforced installation; the method comprises the steps that stamp hole welding pads are manufactured on the edges of the periphery of a board card to provide an interface, a processor, a DDR RAM, a FLASH and a power management module are in signal connection with the stamp hole welding pads, and external connection wires are connected with the stamp hole welding pads, so that the core functions of basic processors such as power supply, GPIO (general purpose input/output), serial interfaces, Ethernet interfaces and the like can be realized; the connector is arranged on the board card, and the PCI-E bus function can be realized by plugging and unplugging the cable, so that the reinforced installation of the board card and the bottom plate is ensured, and the communication between the board card and the bottom plate is realized. The reinforcing method is reasonable in design, convenient and reliable, and not only is the reinforcing installation of the board card and the bottom plate realized, but also the communication between the board card and the bottom plate is ensured through the arrangement of the stamp hole welding disc and the connector.
Drawings
FIG. 1 is a schematic structural diagram of a board card manufactured by the present invention;
FIG. 2 is a schematic diagram of a postage stamp hole pad constructed in accordance with the present invention;
fig. 3 is a schematic structural diagram of a connector manufactured according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, a method for reinforcing a Feiteng processor board card includes
Installing a processor 2, a DDR RAM3, a FLASH4 and a power management module 5 on a board card 1;
the board card 1 is welded on the bottom plate through the soldering tin;
a stamp hole pad 8 and a connector 6 are arranged on the board card 1 to realize communication between the board card 1 and the bottom plate;
the connector 6 and the stamp hole pad 8 are in signal connection with the processor 2, the DDR RAM3, the FLASH4 and the power management module 5;
the stamp hole pad 8 is arranged on the edge of the periphery of the board card 1.
The detailed contents of the invention are as follows:
1. four sides of the board card 1 are provided with stamp hole welding pads 8
The core function of the processor 2 consists of an FT-2000A processor 2, a DDR RAM3, a FLASH4 and a power management module 5;
2. The connection between the processor 2 core function and the stamp hole pad 8 is made with the following signals:
2.1, the power supply signal comprises +3.3V and + 2.5V;
2.2, digital ground signal GND;
2.3, two sets of serial port signals including TX0, RX0, TX1, RX 1;
2.4, 32 bits GPIO signals including PA [0..7], PB [0..7], PC [0..7], PD [0..7 ];
2.5, two sets of RGMII signals, each set of RGMII signals comprising GTX _ CLK, TXD [0..3], TX _ CTL, RX _ CLK, RXD [0..3], RX _ CTL, COL, CRS, MDC, MDIO, respectively;
2.6, reset signal SRST.
3. PCI-E bus connector interface
The PCI-E bus connector interface comprises a first connector and a second connector, wherein pins of the first connector and the second connector comprise an A side and a B side, each side has N pins, and N is defined as 20; the connector 6 is packaged by adopting a bonding pad 7, the length and the width of the bonding pad 7 are respectively 0.6mm and 0.3mm, and the distance between the bonding pads 7 is 0.6 mm;
3.1, the first connector contains status signals (PRSNT 1), control signals (WAKE, PERST), a digital ground signal (GND), reference clock signals (REFCLK +, REFCLK-) and 4 Lane signals of PCI-E X4 (each Lane includes two pairs of differential signals OUTX +, OUTX-, INX +, INX-, x is 0 to 3); the pin definition of the first connector is shown in table 1 below;
TABLE 1 Pin definition of the first connector
The second connector includes a status signal (PRSNT 2), a digital ground signal (GND), and the 4 Lane signals of PCI-E X4 (each Lane includes two pairs of differential signals OUTX +, OUTX-, INX +, INX-, x are 4-7); the pin definition of the second connector is shown in table 2 below;
TABLE 2 Pin definition of the second connector
3.2, connector 6 signal function design description:
(1) the signal level of the state signals (PRSNT 1 and PRSNT 2) is provided by the backplane, and a low-level pull-down signal is provided for the board card 1;
when the first connector is connected to the backplane, PRSNT1 is set low, enabling PCI-E X4 bus functionality;
when the second connector is connected to the backplane, PRSNT2 is set low, and when PRSNT1 is set low, the PCI-E X8 bus function is enabled.
(2) The signal level of the control signal (PERST) is provided by the board 1, and when the PERST signal is high, the PCI-E bus is reset. Defaulting to a low level;
(3) the signal level of the control signal (WAKE) is provided by the board 1, and when the WAKE signal is high, the PCI-E bus enters a sleep mode. Defaulting to a low level;
(4) the reference clock signals (REFCLK +, REFCLK-) are provided by the backplane;
(5) the 8 Lane signals of PCI-E X8 (each Lane includes two pairs of differential signals OUTX +, OUTX-, INX +, INX-, x is 0-7) are provided by board 1.
3.3, arrangement design description of signal positions of the connector 6:
two signals (+, -) of the differential signal pair are close to the wiring as much as possible, and the periphery is isolated by using a digital ground, so that excellent signal transmission quality can be obtained;
(1) in the pin position design of the connector 6, the differential signal pairs OUTX +, OUTX-and INX +, INX- (x is 0 to 7) are arranged together and are isolated digitally;
(2) when the PCI-E bus function is enabled, the PERST, WAKE signals are low. In the pin position design of the connector 6, the differential signal pairs REFCLK +, REFCLK-signals are arranged together and digitally isolated around.
3.4 PCI-E bus function realized by plugging and unplugging cable
(a) When the first connector of the board 1 is connected with the corresponding connector 6 of the bottom plate through a cable, the bottom plate provides a pull-down signal of PRSNT1 to the board 1, and the board 1 enables the bus function of PCI-E X4;
(b) after the step (a) is completed, when the second connector of the board card 1 is connected with the corresponding connector 6 of the bottom plate through a cable, the bottom plate provides a pull-down signal of PRSNT2 for the board card 1, and the board card 1 enables the bus function of PCI-E X8;
(c) when the first connector and the second connector of the board 1 are not connected to the backplane through the cable, the PCI-E bus function is not provided.
The inventive principle of the present application:
(1) the stamp hole pad 8 provides power supply, GPIO, serial interface, Ethernet interface and other core functions of the basic processor 2, and the board card 1 is welded on the bottom plate through soldering tin to realize reinforced installation;
(2) the special PCI-E connector 6 interface provides transmission of a configurable differential signal pair to realize the PCI-E bus function;
(2.1) the first connector is connected to the corresponding connector 6 of the backplane through a cable, and the second connector is not connected to the backplane, providing the bus function of PCI-E X4;
(2.2) the first connector is connected with the corresponding connector 6 of the backplane through a cable, and the second connector is connected with the corresponding connector 6 of the backplane through a cable, so as to provide the bus function of the PCI-E X8;
(2.3) the first connector is not connected with the backplane, and the second connector is connected with the corresponding connector 6 of the backplane through a cable, so that the bus function of the PCI-E is not provided;
(2.4) the first connector is not connected to the backplane and the second connector is not connected to the backplane and does not provide PCI-E bus functionality.
Advantages and technical effects of the present application
(1) More convenient and reliable reinforcement guarantee
The assembly line processing production is easier to be carried out by a chip mounter through the welding mode of the stamp hole welding plate 8; the test of impact vibration is more easily met through soldering tin welding, and excellent reinforcement guarantee is obtained.
(2) Variable PCI-E bus communication speed
The changeable PCI-E bus communication speed is realized by plugging and unplugging the cable.
(3) Product application meeting requirements for space installation
By using the invention, the thickness of the whole product is increased by only one PCB plate, and the product application with the requirement on space installation is satisfied.
(4) Reduce the design and use cost of the product
For most product applications, PCI-E X4 is often used or PCI-E is not used; if the PCI-E bus function is not used, the board card 1, a first connector and a second connector of the bottom board and corresponding cables can not be welded; if the function of PCI-E X4 is used, only the first connector and cable of the board 1 and the backplane are needed; by using the invention, only one board card 1 needs to be designed, so that the application of variable products can be met, and the design and use cost is reduced.
Claims (10)
1. A method for reinforcing a Feiteng processor board card is characterized by comprising the following steps: the reinforcing method comprises the following steps
Installing a processor, a DDR RAM, a FLASH and a power management module on a board card;
soldering the board card to the bottom board by soldering tin;
arranging a stamp hole pad and a connector on the board card to realize communication between the board card and the bottom plate;
the connector and the stamp hole pad are in signal connection with the processor, the DDR RAM, the FLASH and the power management module;
the stamp hole welding plate is arranged on the edge of the periphery of the board card.
2. The method of strengthening a processor board card of FT as claimed in claim 1, wherein: in the reinforcement method, the connector comprises a first connector and a second connector, the first connector and the second connector respectively comprise two rows of pins arranged in parallel, and the pins are packaged on the board card through pin bonding pads.
3. The method of strengthening a processor board card of FT as claimed in claim 2, wherein: the length of the pin bonding pad is 0.6mm, and the width of the pin bonding pad is 0.3 mm.
4. The method of strengthening a processor board card of FT as claimed in claim 2, wherein: the number of pins in each row is 20.
5. The method of strengthening a processor board card of FT as claimed in claim 1, wherein: in the reinforcing method, the stamp hole bonding pad is rectangular, a semicircular hole is formed in the stamp hole bonding pad close to the edge side of the board card, the length of the stamp hole bonding pad is 1mm, the width of the stamp hole bonding pad is 0.9mm, the radius of the semicircular hole is 0.3mm, and the middle distance between stamp hole bonding pads is 1.3 mm.
6. The method of strengthening a processor board card of FT as claimed in claim 1, wherein: in the reinforcing method, the processor, the DDR RAM, the FLASH, the power management module and the stamp hole pad are in signal connection by the following signals:
(1) the power supply signal comprises +3.3V and + 2.5V;
(2) a digital ground signal GND;
(3) two sets of serial port signals, including TX0, RX0, TX1, RX 1;
(4) 32-bit GPIO signals including PA [0..7], PB [0..7], PC [0..7], and PD [0..7 ];
(5) two sets of RGMII signals, each set of RGMII signals comprising GTX _ CLK, TXD [ 0.3 ], TX _ CTL, RX _ CLK, RXD [ 0.3 ], RX _ CTL, COL, CRS, MDC, MDIO, respectively;
(6) a reset signal SRST.
7. The method of strengthening a processor board card of FT as claimed in claim 1, wherein: in the reinforcement method, the processor, the DDR RAM, the FLASH, the power management module and the connector are in signal connection by using the following signals:
(1) the signals connected by the first connector comprise 4 Lane signals of a state signal PRSNT1, a control signal WAKE, a control signal PERST, a digital ground signal GND, a reference clock signal REFCLK +, a reference clock signal REFCLK-and PCI-E X4, wherein each Lane signal comprises two pairs of differential signals OUTX +, OUTX-, INX +, INX-, and x are 0 to 3;
(2) the signals connected by the second connector include a state signal PRSNT2, a digital ground signal GND and 4 Lane signals of PCI-E X4, each Lane signal including two pairs of differential signals OUTX +, OUTX-, INX +, INX-, x being 4 to 7.
8. The method of strengthening a processor board card of FT as claimed in claim 7, wherein: in the reinforcing method, two signals plus or minus of a differential signal pair of a first connector and a second connector are adjacent to each other, and the periphery is digitally isolated.
9. The method of strengthening a processor board card of FT as claimed in claim 1, wherein: in the reinforcement method, the processor mounted on the board card is an FT-2000A processor.
10. The method of strengthening a processor board card of FT as claimed in claim 2, wherein: in the reinforcement method, the method for realizing the PCI-E bus function of the board card through the first connector and the second connector comprises the following steps:
(1) the first connector is connected with a corresponding connector of the bottom board through a cable, and the second connector is not connected with the bottom board and provides the bus function of PCI-E X4;
(2) the first connector is connected with the corresponding connector of the bottom plate through a cable, and the second connector is connected with the corresponding connector of the bottom plate through the cable to provide the bus function of PCI-E X8;
(3) the first connector is not connected with the bottom plate, and the second connector is connected with the corresponding connector of the bottom plate through a cable and does not provide the bus function of the PCI-E;
(4) the first connector is not connected to the backplane and the second connector is not connected to the backplane and does not provide PCI-E bus functionality.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010513208.9A CN111651401B (en) | 2020-06-08 | 2020-06-08 | Reinforcing method for Feiteng processor board card |
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| CN202010513208.9A CN111651401B (en) | 2020-06-08 | 2020-06-08 | Reinforcing method for Feiteng processor board card |
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| CN111651401B CN111651401B (en) | 2023-12-29 |
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| CN203352944U (en) * | 2013-05-30 | 2013-12-18 | 航天科工深圳（集团）有限公司 | PCB with stamp holes |
| CN203480375U (en) * | 2013-09-09 | 2014-03-12 | 杭州启扬智能科技有限公司 | Core board |
| CN105320633A (en) * | 2015-11-20 | 2016-02-10 | 天津光电通信技术有限公司 | Double-channel high-speed analog digital signal collecting and processing board card |
| CN205336260U (en) * | 2015-11-05 | 2016-06-22 | 深圳市布谷鸟科技有限公司 | Car hypersystem nuclear core plate and car hypersystem |
| CN206877227U (en) * | 2017-04-20 | 2018-01-12 | 湖南军威联航科技有限公司 | A kind of antidetonation solid state hard disc mounting structure |
| CN111142630A (en) * | 2019-12-02 | 2020-05-12 | 杭州迪普科技股份有限公司 | Processor board card |
-
2020
- 2020-06-08 CN CN202010513208.9A patent/CN111651401B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203352944U (en) * | 2013-05-30 | 2013-12-18 | 航天科工深圳（集团）有限公司 | PCB with stamp holes |
| CN203480375U (en) * | 2013-09-09 | 2014-03-12 | 杭州启扬智能科技有限公司 | Core board |
| CN205336260U (en) * | 2015-11-05 | 2016-06-22 | 深圳市布谷鸟科技有限公司 | Car hypersystem nuclear core plate and car hypersystem |
| CN105320633A (en) * | 2015-11-20 | 2016-02-10 | 天津光电通信技术有限公司 | Double-channel high-speed analog digital signal collecting and processing board card |
| CN206877227U (en) * | 2017-04-20 | 2018-01-12 | 湖南军威联航科技有限公司 | A kind of antidetonation solid state hard disc mounting structure |
| CN111142630A (en) * | 2019-12-02 | 2020-05-12 | 杭州迪普科技股份有限公司 | Processor board card |
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| CN111651401B (en) | 2023-12-29 |
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