CN111650443A - Simple capacitance value measuring circuit and method - Google Patents
Simple capacitance value measuring circuit and method Download PDFInfo
- Publication number
- CN111650443A CN111650443A CN202010624104.5A CN202010624104A CN111650443A CN 111650443 A CN111650443 A CN 111650443A CN 202010624104 A CN202010624104 A CN 202010624104A CN 111650443 A CN111650443 A CN 111650443A
- Authority
- CN
- China
- Prior art keywords
- capacitor
- sampling capacitor
- control module
- acquisition control
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention belongs to the technical field of capacitance measurement, and particularly provides a simple capacitance value measurement circuit and a simple capacitance value measurement method. Meanwhile, the sampling capacitor which is closer to the capacitance value of the capacitor to be measured is used, so that the measurement precision can be further improved. The measuring circuit designed by the invention is simple and efficient, the measuring parameters are stable direct-current voltage, the measuring precision is high, and the practicability is strong.
Description
Technical Field
The invention belongs to the technical field of capacitance measurement, and particularly provides a simple capacitance value measuring circuit and a simple capacitance value measuring method. According to different sampling capacitances, the accuracy of capacitance measurement can be improved, and the capacitance value can be rapidly measured as required, so that the method has high practicability.
Background
For the measurement of capacitance, the common method is to charge the measured capacitor by a constant current source, and the capacitance can be obtained according to the relationship between the voltage at two ends of the capacitor and the charging time. Another common idea is to measure the frequency of the pulse waveform generated by the 555 timer by a 555 timer frequency measurement method, and since the frequency of the pulse waveform generated by the 555 timer is related to an external capacitor, the size of the capacitor can be measured by measuring the frequency of the output pulse waveform.
In view of the above situation, the present invention provides a simple capacitance measurement circuit and method, which can solve the above problems. A known capacitor is used as a sampling capacitor, and a capacitance value can be obtained according to the charge conservation theorem and the relation among the capacitor, the voltage and the charge. Meanwhile, the sampling capacitor which is closer to the capacitance value of the capacitor to be measured is used, so that the sampling precision can be further improved. The measuring circuit designed by the invention is simple and efficient, the measuring parameters are stable direct-current voltage, the measuring precision is high, and the practicability is strong.
Disclosure of Invention
The invention aims to solve the problems of high acquisition difficulty of measurement parameters, low measurement precision and complex circuit debugging in the prior art.
Therefore, the invention provides a simple capacitance value measuring circuit, which comprises a charging module for providing measuring charges, a first switch module for switching a channel, a second switch module for discharging charges, an acquisition control module for controlling and acquiring voltage, a sampling capacitor for calibrating charge amount and a capacitor to be measured, wherein a control pin of the first switch module is connected with a control pin of the acquisition control module; the control pin of the second switch module is connected with the control pin of the acquisition control module, meanwhile, the second switch module is respectively connected with one end of the sampling capacitor and the ground wire, and the second switch module is controlled by the acquisition control module, so that one end of the sampling capacitor can be disconnected with the ground wire, or one end of the sampling capacitor is grounded; one end of the sampling capacitor is connected with the acquisition control module; the other end of the sampling capacitor is grounded; the other end of the capacitor to be tested is grounded.
The simple capacitance value measuring circuit comprises a sampling capacitor, a capacitor and a capacitor, wherein the sampling capacitor is a replaceable capacitor and comprises a plurality of capacitors with different capacitance values, and the capacitors can be replaced according to the capacitance value of the capacitor to be measured. Because this measuring circuit uses the principle of conservation of charge, when the capacitance value difference of sampling electric capacity and measuring electric capacity is not too big, incorporate into the electric capacity that awaits measuring after, the appearance value approximately doubles, and the voltage reduces to about half original, and for voltage detection circuit, it is simpler to gather the quantization, and the error is littleer, so among the measuring circuit, select the sampling electric capacity that is close with the electric capacity appearance value that awaits measuring as far as possible.
The simple capacitance measuring circuit comprises a first switch module, a second switch module, a third switch module and a fourth switch module, wherein the first switch module comprises a relay, a triode, a diode, a first resistor and a second resistor; the base electrode of the triode is connected to the acquisition control module through a second resistor, the collector electrode of the triode is connected to the positive electrode of the power supply through a first resistor, the emitter electrode of the triode is connected to one control pin of the relay, the other control pin of the relay is grounded, the positive electrode of the diode is grounded, and the negative electrode of the diode is connected with the emitter electrode of the triode; the switch contact of the relay is connected with one end of the sampling capacitor, the normally closed contact of the relay is connected with one end of the capacitor to be tested, and the normally open contact of the relay is connected with the charging module. The triode is mainly used for controlling the on-off of the relay, the connection mode is provided for the NPN type triode connection circuit, and in fact, if the PNP type triode is adopted, the function can be achieved. Meanwhile, the relay can be replaced by two groups of electronic switches which are respectively used for connecting the sampling capacitor with the charging power supply and the capacitor to be tested.
Above-mentioned simple and easy capacitance value measuring circuit, the second switch module include field effect transistor, third resistance and fourth resistance, the grid of field effect transistor is connected to the acquisition control module through the fourth resistance, the drain electrode is connected to the one end of sampling capacitor through the third resistance, source ground. The field effect transistor is an N-channel enhanced field effect transistor, is mainly used for controlling the charge discharge of a sampling capacitor and a capacitor to be tested, and can be replaced by an electronic switch.
The charging module comprises a voltage stabilizing diode and a fifth resistor, the anode of the voltage stabilizing diode is grounded, the cathode of the voltage stabilizing diode is connected to the anode of the power supply through the fifth resistor, and the cathode of the voltage stabilizing diode is connected to the first switch module.
The simple capacitance value measuring circuit is characterized in that the sampling capacitor and the measured capacitor are nonpolar capacitors or polar capacitors, when the polar capacitors exist, one end of the sampling capacitor is a positive electrode, one end of the measured capacitor is a positive electrode, and the other end is a negative electrode.
In the simple capacitance measuring circuit, the acquisition control module at least comprises an analog-to-digital conversion part and two high-low voltage input/output ports. The analog-to-digital conversion part is used for measuring a voltage value, and the input and output ports are used for controlling the first switch module and the second switch module. In general, a processor with an AD module may be used for the acquisition control module of the present invention.
In cooperation with the measurement circuit of the present invention, the present invention also provides a simple capacitance measurement method, comprising the following steps,
step (1): discharging charge and eliminating interference; the acquisition control module controls the first switch module to communicate the sampling capacitor with the capacitor to be tested; the acquisition control module controls the second switch module to enable one end of the sampling capacitor to be grounded; the acquisition control module starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, indicating that the discharge is finished, and then the next step is carried out.
Step (2): charging; the acquisition control module controls the second switch module to disconnect one end of the sampling capacitor from the ground through the second switch; the acquisition control module controls the first switch module to communicate the sampling capacitor with the charging module; the acquisition control module starts the analog-to-digital conversion part to acquire voltage until the acquired voltage value is stable, and a measured voltage value V1 is obtained, wherein the quantity of electric charge of the sampling capacitor is
Q1=C*V1 (1-2)
The voltage value obtained here can be inserted into a conventional filtering algorithm, so that the measurement is more accurate and the next step is carried out.
And (3): charge redistribution; the acquisition control module controls the first switch module to enable the sampling capacitor to be communicated with the capacitor to be tested, and the sampling capacitor charges the capacitor to be tested; the acquisition control module starts the analog-to-digital conversion part to acquire voltage, the voltage value is stable to acquisition, a measurement voltage value V2 is obtained, and the electric charge quantity of the sampling capacitor is as follows:
Q2=C*V2+CX*V2 (1-3)
the voltage value obtained here can be inserted into a conventional filtering algorithm, so that the measurement is more accurate and the next step is carried out.
And (4): calculating the capacitance value of the capacitor to be measured; since no other path is consumed in the charge redistribution process, the total charge remains unchanged, i.e. Q1= Q2, so that the capacitance value of the capacitor to be measured is calculated (1-4):
CX=C*(V1-V2)/V2 (1-4)
entering the next step;
and (5): judging measurement; in general measurement, capacitance values are selected at ten-fold intervals, wherein capacitance value candidate ranges are 1nf, 10nf, 100nf, 1uf and 10uf, sampling capacitance can be selected according to different measurement ranges, and the range of the sampling capacitance can be expanded if the range is further expanded or the measurement accuracy is increased; comparing the values of CX and C, if the capacitance value of the currently selected sampling capacitor is closest to the capacitor to be tested in the adopted capacitors of the plurality of capacitance values, obtaining CX which is the approximate capacitance value of the capacitor to be tested, and executing the step (7); and (4) if the capacitance value of the currently selected sampling capacitor is not the closest to the capacitor to be measured in the adopted capacitors with the capacitance values, the obtained CX is not the accurate capacitance value of the capacitor to be measured, and the step (6) is continuously executed.
And (6): discharging the electric charge, and replacing the sampling capacitor; the acquisition control module controls the first switch module to communicate the sampling capacitor with the capacitor to be tested; the acquisition control module controls the second switch module to enable one end of the sampling capacitor to be grounded; the acquisition control module starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, and the discharge is indicated to be finished; and (3) selecting the sampling capacitor closest to the CX value obtained by the last measurement from the adopted capacitors of the capacitance values, connecting the sampling capacitor to a measurement circuit, and executing the step (2) again.
And (7): finishing the measurement; the acquisition control module controls the first switch module to communicate the sampling capacitor with the capacitor to be tested; the acquisition control module controls the second switch module to enable one end (a) of the sampling capacitor to be grounded; the acquisition control module starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, and the discharge is indicated to be finished; and closing the acquisition control module and finishing measurement.
Furthermore, in order to realize automatic switching of the sampling capacitors, a multi-channel electronic switch can be added, a control interface of the electronic switch is connected with the acquisition control module, each switch of the electronic switch is firstly connected with the sampling capacitors with different capacitance values, the capacitance value of the sampling capacitor on each switch channel is preset in the acquisition control module, and in the judgment of the step (5), the sampling capacitor with the capacitance value closest to the capacitor to be measured is automatically judged and connected through the acquisition control module, so that automatic measurement is realized.
The invention has the beneficial effects that: the circuit of the invention is skillfully designed by using the principle of charge conservation, and the capacitance value can be measured only by measuring the voltage value through charge redistribution, the voltage measurement is relatively simple, the precision is high, and the more accurate capacitance value is easy to obtain; simultaneously, through selecting sampling electric capacity for the measuring range of magnitude of voltage is unlikely to fluctuate on a large scale, further improves the measurement to magnitude of voltage, thereby obtains more accurate capacitance value, simple and practical.
The present invention will be described in further detail below with reference to the accompanying drawings.
Drawings
FIG. 1 is a diagram of a simple capacitance measuring circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram of a second embodiment of a simple capacitance measuring circuit according to the present invention.
FIG. 3 is a diagram of a simple capacitance measuring circuit according to a third embodiment of the present invention.
Description of reference numerals: m, an acquisition control module; s1, a first switch module; s2, a second switch module; C. sampling a capacitor; CX, capacitance to be measured; k1, relay; t1, a triode; r1, a first resistor; r2, a second resistor; d1, a diode; t2, field effect transistor; r3, third resistor; r4, fourth resistor; u, a processor; d2, zener diode; r5, current limiting resistor; u2, analog-to-digital conversion chip; u3, switch chip; c1, a first sampling capacitor; c2, a second sampling capacitor; c3, third sampling capacitance.
Detailed Description
Example 1
Fig. 1 is a circuit diagram of a first implementation of a simple capacitance measurement circuit according to the present invention, which includes a charging module P for providing a measurement charge, a first switch module S1 for switching a path, a second switch module S2 for discharging a charge, an acquisition control module M for controlling and acquiring a voltage, a sampling capacitor C for calibrating a charge amount, and a capacitor CX to be measured, where the acquisition control module uses a processor U with an analog-to-digital conversion function, the charging module P is composed of a current-limiting resistor R5 and a voltage-stabilizing diode D2, an anode of the voltage-stabilizing diode D2 is grounded, and a cathode of the voltage-stabilizing diode D2 is connected to an anode of a power supply through a current-limiting resistor R5. The first switch module S1 includes a relay K1, a transistor T1, a diode D1, a first resistor R1, and a second resistor R2; the base of the triode T1 is connected to a control pin I/O-1 of the processor U through a second resistor R2, the collector is connected to the positive pole of a power supply through a first resistor R1, the emitter is connected to a control pin of the relay K1, the other control pin of the relay K1 is grounded, the positive pole of the diode D1 is grounded, and the negative pole of the diode D1 is connected with the emitter of the triode T1; the switch contact x of the relay K1 is connected with the a end of the sampling capacitor C, the normally closed contact y of the relay K1 is connected with the m end of the capacitor CX to be tested, and the normally open contact z of the relay K1 is connected with the negative electrode of the voltage stabilizing diode D2. The second switch module S2 includes a fet T2, a third resistor R3 and a fourth resistor R4, the gate of the fet T2 is connected to another control pin I/O-2 of the processor U through the fourth resistor R4, the drain is connected to the a terminal of the sampling capacitor C through the third resistor R3, and the source is grounded. The a end of the sampling capacitor C is connected to an analog-to-digital conversion pin ADC of the processor U; the other b end of the sampling capacitor C is grounded; the other n end of the capacitor CX to be measured is grounded.
Here, the processor U is an MSP430F149 series single chip microcomputer of TI (texas instruments) corporation, has a supply voltage of 3.3V, and is provided with an analog-to-digital conversion module. The relay K1 is a relay of HRS1H-S-DC type and can be triggered under the voltage of 3.3V, the triode T1 is an S8050 power type triode, the field-effect tube T2 is an enhanced field-effect tube of 10N60 type, the diode D1 is a diode of 1N4007 type, the diode D2 is a voltage stabilizing diode of 1N4744 type, and the output voltage is 2.5V. The sampling capacitor C is a CBB capacitor (polyethylene capacitor), the alternative ranges of the capacitance values are 1nf, 10nf, 100nf, 1uf and 10uf, and the sampling capacitor can be selected according to different measurement ranges; all resistors selected in the circuit have no influence on the measurement accuracy, wherein the first resistor R1 influences the switching current of the relay K1, a resistor of 100 ohms can be selected according to the requirement of the relay K1, and resistors of 1K ohm can be selected for the second resistor R2, the third resistor R3, the fourth resistor R4 and the current limiting resistor R5.
The working process is as follows:
(1) firstly, a 100nf sampling capacitor C is selected to be connected into a circuit, and a capacitor CX to be detected is connected into the circuit;
(2) the processor U controls the pin I/O-1 to output a low level, and the processor U controls the pin I/O-2 to output a high level; the triode T1 is not conducted, the relay K1 is in a default state, the switch contact x is communicated with the normally closed contact y, and at the moment, the end a of the sampling capacitor C is communicated with the end m of the capacitor CX to be detected; the grid voltage of the field effect transistor T2 is high, the source electrode is grounded, and the drain electrode of the field effect transistor T2 is connected with the source electrode at the moment to discharge the sampling capacitor C and the capacitor CX to be measured, so that the influence on the measurement is prevented; an analog-to-digital conversion pin ADC of the processor U acquires voltage until the acquired measured value is 0, and at the moment, the charges on the sampling capacitor C and the capacitor CX to be detected are released completely;
(3) the processor U controls the pin I/O-2 to go out of low level; at the moment, the field effect tube T2 is cut off, and the a end of the sampling capacitor C and the m end of the capacitor CX to be detected are disconnected with the ground through the field effect tube T2;
(4) the processor U controls a pin I/O-1 to output high level, at the moment, a triode T1 is conducted, the control end of a relay K1 is electrified, a switch acts, a switch contact x is switched to be communicated with a normally open contact z, the output voltage of a voltage stabilizing diode D2 is connected into a circuit, and a capacitor CX to be detected is disconnected;
(5) the voltage stabilizing diode D2 charges the sampling capacitor through the anode of the power supply, and the output voltage is about 2.5V;
(6) an analog-to-digital conversion pin ADC of the processor U acquires voltage; the collected voltage is the output voltage of the zener diode D2, and may not be completely equal due to quantization error; obtaining a voltage V1 after the voltage value acquired by an analog-to-digital conversion pin ADC of the processor U is stable;
(7) the processor U controls a pin I/O-1 to output a low level, at the moment, a triode T1 is not conducted, the control end of a relay K1 is powered off, a switch is reset, and a switch contact x is switched to be communicated with a normally closed contact y; at the moment, the m end of the capacitor CX to be detected is connected with the a end of the sampling capacitor C, and the sampling capacitor C charges the capacitor CX to be detected;
(8) an analog-to-digital conversion pin ADC of the processor U acquires voltage; at the moment, the charge on the sampling capacitor C is transferred to the capacitor CX to be detected, after the discharging is finished, the end a of the sampling capacitor C and the end m of the capacitor CX to be detected are in the same potential, and the stable voltage V2 is obtained through the processor U;
(9) due to the conservation of charge, one can calculate:
CX=C*(V1-V2)/V2 (1-5)
(10) because the sampling capacitor C selects a capacitance value from 1nf to 1uf, and sets one sampling capacitor every ten times, it is mainly considered that if the capacitance value difference is too large, the voltage difference acquired twice is too large or too small, and the quantization error is increased, so that it is necessary to judge whether the current sampling capacitor is the optimal sampling capacitor; comparing CX with C, if the capacitance value of the currently selected sampling capacitor is closest to the capacitor to be detected in the adopted capacitors of the plurality of capacitance values, the obtained CX is the approximate capacitance value of the capacitor to be detected; and (3) if the capacitance value of the currently selected sampling capacitor is not the closest to the capacitor to be measured in the adopted capacitors with the capacitance values, selecting the sampling capacitor closest to the measured value to access the circuit, and measuring again according to the steps (1) to (9).
(11) After the measurement is finished, the processor U controls the pin I/O-2 to be at a high level, at the moment, the drain electrode of the field effect tube T2 is connected with the source electrode, the sampling capacitor C and the capacitor CX to be measured are discharged, the analog-to-digital conversion pin ADC of the processor U collects voltage until the collected voltage is 0, the discharge is finished, the processor U controls the pin I/O-2 to be at a low level, and the field effect tube T2 is cut off. The measurement is ended.
Example 2
Fig. 2 is a circuit diagram of a second embodiment of the simple capacitance measuring circuit according to the present invention, which includes a processor 1, a first switch module S1, a second switch module S2, a sampling capacitor C, and a capacitor CX to be measured. The processor 1 is a processor with a digital-to-analog output module (DA) and an analog-to-digital conversion module (AD), and the digital-to-analog output module (DA) is used for outputting standard voltage to the outside and playing a role of a charging module P; the analog-to-digital conversion module (AD) is used for acquiring the voltages of the sampling capacitor 4 and the capacitor 5 to be detected.
The first switch module 2 is composed of a single-pole double-throw relay and peripheral elements thereof, and specifically comprises a relay K1, a triode T1, a diode D1, a first resistor R1 and a second resistor R2, wherein a triode T1 is a PNP type triode, the base of the triode T1 is connected to a control pin I/O-1 (Input and Output) of the processor U through a resistor R2, the emitter is connected to a power supply through a resistor R1, the collector is connected to a control pin of the relay K1, the other control pin of the relay K1 is grounded to protect the relay K1, the anode of the diode D is grounded, and the cathode is connected to the collector of the triode T1; a switch contact x of the relay K1 is connected with an a end of the sampling capacitor C, a normally closed contact y of the relay K1 is connected with an m end of the capacitor CX to be tested, and a normally open contact z of the relay K1 is connected with an analog-digital output pin DA of the processor U. The second switch module 3 includes a fet T2, a third resistor R3, and a fourth resistor R4, wherein the fet T2 is an N-channel enhancement fet, the gate of the fet T2 is connected to another control pin I/O-2 (Input and Output) of the processor U through a resistor R4, the drain is connected to the a-terminal of the sampling capacitor C through a resistor R3, and the source is grounded. The end b of the sampling capacitor C and the end n of the capacitor CX to be detected are both grounded. The a end of the sampling capacitor C is connected to an analog-to-digital conversion pin ADC of the processor U; the other b end of the sampling capacitor C is grounded; the other n end of the capacitor CX to be measured is grounded.
Here, the processor U is a single chip microcomputer MSP430F2618 series of TI (texas instruments) company, has a supply voltage of 3.3V, and is internally integrated with an analog-to-digital conversion module (AD) and a digital-to-analog output module (DA). The relay K1 selects an HRS1H-S-DC relay, and can be triggered under the voltage of 3.3V, the triode T1 selects an S8550 power type triode, the field effect tube T2 selects an enhanced field effect tube with the model of 10N60, the diode D1 selects a diode with the model of 1N4007, the sampling capacitor C selects a CBB capacitor (polyethylene capacitor), the alternative ranges of capacitance values are 1nf, 10nf, 100nf, 1uf and 10uf, and the sampling capacitor can be selected according to different measurement ranges; all resistors selected in the circuit have no influence on the measurement accuracy, wherein the first resistor R1 influences the switching current of the relay K1, a resistor of 100 ohms can be selected according to the requirement of the relay K1, and resistors of 1K ohm can be selected for the second resistor R2, the third resistor R3 and the fourth resistor R4.
The working process is as follows:
(1) firstly, a 100nf sampling capacitor C is selected to be connected into a circuit, and a capacitor CX to be detected is connected into the circuit;
(2) the processor U controls the pin I/O-1 to output a high level, and the processor U controls the I/O-2 to output a high level; the triode T1 is not conducted, the relay K1 is in a default state, the switch contact x is communicated with the normally closed contact y, and at the moment, the end a of the sampling capacitor C is communicated with the end m of the capacitor CX to be detected; the grid voltage of the field effect transistor T2 is high, the source electrode is grounded, and the drain electrode of the field effect transistor T2 is connected with the source electrode at the moment to discharge the sampling capacitor C and the capacitor CX to be measured, so that the influence on the measurement is prevented; measuring the voltage by an analog-to-digital conversion pin ADC of the processor U until the measured value is 0, and finishing releasing the charges on the sampling capacitor C and the capacitor CX to be measured;
(3) the processor U controls the pin I/O-2 to go out of low level; at the moment, the field effect tube T2 is cut off, and the a end of the sampling capacitor C and the m end of the capacitor CX to be detected are disconnected with the ground through the field effect tube T2;
(4) the processor U controls a pin I/O-1 to output low level, at the moment, a triode T1 is conducted, the control end of a relay K1 is electrified, the switch acts, and a switch contact x is switched to be communicated with a normally open contact z;
(5) the processor U controls the analog-digital output pin DA to output voltage, and the output voltage value is 2V; at the moment, an analog-digital output pin DA of the processor U charges the sampling capacitor C through a relay K1;
(6) the processor U controls an analog-to-digital conversion pin ADC to measure voltage; the collected voltage is the charging voltage from the analog-digital output pin DA to the sampling capacitor C, and the output voltage of the analog-digital output pin DA is obtained after the voltage is stabilized; may not be exactly equal due to quantization errors; obtaining a voltage V1 after the voltage value acquired by the analog-to-digital conversion pin ADC is stable;
(7) the processor U controls a pin I/O-1 to output a high level, at the moment, a triode T1 is not conducted, the control end of a relay K1 is powered off, a switch is reset, and a switch contact x is switched to be communicated with a normally closed contact y; at the moment, the m end of the capacitor CX to be detected is connected with the a end of the sampling capacitor C, and the sampling capacitor C charges the capacitor CX to be detected; the processor U controls the analog-digital output pin DA to stop outputting;
(8) the processor U controls an analog-to-digital conversion pin ADC to collect voltage; at the moment, the charge on the sampling capacitor C is transferred to the capacitor CX to be detected, after the discharging is finished, the end a of the sampling capacitor C and the end m of the capacitor CX to be detected are in the same potential, and the stable voltage V2 is obtained through the processor U;
(9) due to the conservation of charge, one can calculate:
CX=C*(V1-V2)/V2 (1-6)
(10) because the sampling capacitor C selects a capacitance value from 1nf to 1uf, and sets one sampling capacitor every ten times, it is mainly considered that if the capacitance value difference is too large, the voltage difference acquired twice is too large or too small, and the quantization error is increased, so that it is necessary to judge whether the current sampling capacitor is the optimal sampling capacitor; comparing CX with C, if the capacitance value of the currently selected sampling capacitor is closest to the capacitor to be detected in the adopted capacitors of the plurality of capacitance values, the obtained CX is the approximate capacitance value of the capacitor to be detected; and if the capacitance value of the currently selected sampling capacitor is not closest to the capacitor to be measured in the adopted capacitors with the capacitance values, selecting the sampling capacitor closest to the measured value to access the circuit, and measuring again according to the steps.
(11) After the measurement is finished, the processor U controls the pin I/O-2 to be at a high level, at the moment, the drain electrode of the field effect tube T2 is connected with the source electrode, the sampling capacitor C and the capacitor CX to be measured are discharged, the processor U controls the analog-to-digital conversion pin ADC to collect voltage until the voltage collection voltage is 0, the discharge is finished, the processor U controls the pin I/O-2 to be at a low level, and the field effect tube T2 is cut off.
Example 3
Fig. 3 is a third implementation circuit diagram of the simple capacitance measurement circuit of the present invention, which includes a charging module P for providing measurement charges, a first switch module S1 for switching paths, a second switch module S2 for discharging charges, an acquisition control module M for controlling and acquiring voltages, a sampling capacitor C for calibrating charge amount, and a capacitor CX to be measured, where the acquisition control module includes a general processor U and an analog-to-digital conversion chip U2, the analog-to-digital conversion chip U2 is connected to the processor U, and data is completed through serial communication; the sampling capacitor C comprises a switch chip U3, a first sampling capacitor C1, a second sampling capacitor C2 and a third sampling capacitor C3, ends a of the first sampling capacitor C1, the second sampling capacitor C2 and the third sampling capacitor C3 are respectively connected to three groups of switches of the switch chip U3, ends b are grounded, the other ends of the three groups of switches are connected together and are connected with a switch contact X of a relay K1 of the first switch module S1, a control port of the switch chip U3 is connected with a group of control pins I/O-3X of the processor U, and one of the three capacitors of the first sampling capacitor C1, the second sampling capacitor C2 and the third sampling capacitor C3 can be selected to be connected into a circuit through the control pins I/O-3X; the charging module P is composed of a current-limiting resistor R5 and a voltage-stabilizing diode D2, wherein the anode of the voltage-stabilizing diode D2 is grounded, and the cathode is connected to the anode of the power supply through the current-limiting resistor R5. The first switch module S1 includes a relay K1, a transistor T1, a diode D1, a first resistor R1, and a second resistor R2; the base of the triode T1 is connected to a control pin I/O-1 of the processor U through a second resistor R2, the collector is connected to the positive pole of a power supply through a first resistor R1, the emitter is connected to a control pin of the relay K1, the other control pin of the relay K1 is grounded, the positive pole of the diode D1 is grounded, and the negative pole of the diode D1 is connected with the emitter of the triode T1; the normally closed contact y of the relay K1 is connected with the m end of the capacitor CX to be measured, and the normally open contact z of the relay K1 is connected with the negative electrode of the voltage stabilizing diode D2. The second switch module S2 includes a fet T2, a third resistor R3 and a fourth resistor R4, the gate of the fet T2 is connected to the other control pin I/O-2 of the processor U through the fourth resistor R4, the drain is connected to the switch contact x of the relay K1 through the third resistor R3, and the source is grounded. The acquisition pin of the analog-to-digital conversion chip U2 is connected to the switch contact x of K1. The other n end of the capacitor CX to be measured is grounded.
Here, the processor U selects an AT89C51 series single chip microcomputer of ATMEL corporation to supply 5V of power voltage. The relay K1 is a relay of HRS1H-S-DC5V type, the triode T1 is an S8050 power type triode, the field effect tube T2 is an enhanced field effect tube of 10N60 type, the diode D1 is a diode of 1N4007 type, the diode D2 is a voltage stabilizing diode of 1N4744 type, and the output voltage is 2.5V. The sampling capacitor C is a CBB capacitor (polyethylene capacitor), the alternative range of the capacitance values is 1nf, 10nf, 100nf, 1uf and 10uf, wherein C1 selects 1nf, C2 selects 100nf, C3 selects 1uf, and the sampling capacitor is selected according to different measurement ranges; all resistors selected in the circuit have no influence on the measurement accuracy, wherein the first resistor R1 influences the switching current of the relay K1, a resistor of 100 ohms can be selected according to the requirement of the relay K1, and resistors of 1K ohm can be selected for the second resistor R2, the third resistor R3, the fourth resistor R4 and the current limiting resistor R5. The switch chip U3 selects DG211DY as a four-way analog switch, and four sampling capacitors can be connected in a single time; the analog-to-digital conversion chip U2 is an AD7490 chip.
The working process is as follows:
(1) firstly, accessing sampling capacitors C of 1nf, 100nf and 1uf into a circuit, and accessing a capacitor CX to be detected into the circuit; the processor U controls the pin I/O-3X to correspondingly switch on the first sampling capacitor C1 to be used as a sampling capacitor for first measurement;
(2) the processor U controls the pin I/O-1 to output a low level, and the processor U controls the pin I/O-2 to output a high level; the triode T1 is not conducted, the relay K1 is in a default state, the switch contact x is communicated with the normally closed contact y, and at the moment, the end a of the first sampling capacitor C1 is communicated with the end m of the capacitor CX to be detected; the grid voltage of the field effect transistor T2 is high, the source electrode is grounded, and the drain electrode of the field effect transistor T2 is connected with the source electrode at the moment to discharge the first sampling capacitor C1 and the capacitor CX to be measured, so that the influence on the measurement is prevented; the analog-to-digital conversion chip U2 collects voltage and transmits the voltage to the processor U until the collected measured value is 0, and at the moment, the electric charges on the first sampling capacitor C1 and the capacitor CX to be detected are completely released;
(3) the processor U controls the pin I/O-2 to go out of low level; at the moment, the field effect transistor T2 is cut off, and the end a of the first sampling capacitor C1 and the end m of the capacitor CX to be detected are disconnected with the ground through the field effect transistor T2;
(4) the processor U controls a pin I/O-1 to output high level, at the moment, a triode T1 is conducted, the control end of a relay K1 is electrified, a switch acts, a switch contact x is switched to be communicated with a normally open contact z, the output voltage of a voltage stabilizing diode D2 is connected into a circuit, and a capacitor CX to be detected is disconnected;
(5) the voltage stabilizing diode D2 charges the sampling capacitor through the anode of the power supply, and the output voltage is about 2.5V;
(6) the analog-to-digital conversion chip U2 collects voltage and transmits the voltage to the processor U; the collected voltage is the output voltage of the zener diode D2, and may not be completely equal due to quantization error; obtaining a voltage V1 after the voltage value acquired by the analog-digital conversion chip U2 is stable;
(7) the processor U controls a pin I/O-1 to output a low level, at the moment, a triode T1 is not conducted, the control end of a relay K1 is powered off, a switch is reset, and a switch contact x is switched to be communicated with a normally closed contact y; at the moment, the m end of the capacitor CX to be detected is connected with the a end of the first sampling capacitor C1, and the first sampling capacitor C1 charges the capacitor CX to be detected;
(8) the analog-to-digital conversion chip U2 collects voltage and transmits the voltage to the processor U; at the moment, the charge on the first sampling capacitor C1 is transferred to the capacitor CX to be detected, after the discharge is finished, the end a of the first sampling capacitor C1 and the end m of the capacitor CX to be detected are in the same potential, and the stable voltage V2 is obtained through the processor U;
(9) due to the conservation of charge, one can calculate:
CX=C*(V1-V2)/V2 (1-7)
(10) because the capacitance value of the first sampling capacitor C1 is 1nf, three sampling capacitors with capacitance values are connected into the circuit, and the difference is 100 times; comparing CX with C1, if the capacitance value of the currently selected sampling capacitor is closest to the capacitor to be measured in the adopted capacitors of the three capacitance values, the obtained CX is the approximate capacitance value of the capacitor to be measured; and (3) if the capacitance value of the currently selected sampling capacitor is not the closest to the capacitor to be measured in the adopted capacitors with the three capacitance values, switching on the most appropriate sampling capacitor through a control pin I/O-3X of the processor U, and measuring again according to the steps (2) to (9).
(11) After the measurement is finished, the processor U controls the pin I/O-2 to be at a high level, at the moment, the drain electrode of the field effect tube T2 is connected with the source electrode, the sampling capacitor C and the capacitor CX to be measured are discharged, the analog-to-digital conversion pin ADC of the processor U collects voltage until the collected voltage is 0, the discharge is finished, the processor U controls the pin I/O-2 to be at a low level, and the field effect tube T2 is cut off. The measurement is ended.
The above examples are merely illustrative of the present invention, and do not limit the scope of the present invention, in the above embodiments, there are many variations, such as the connection mode of the transistor T1, and devices using other switch attributes may be replaced, such as electronic switches like fet, photocoupler, etc., and similarly, the relay K1 and fet T2 may be replaced by other electronic switches as general means, which are not described here, and all the same or similar designs as the present invention are within the scope of the present invention.
Claims (10)
1. The utility model provides a simple and easy capacitance value measuring circuit, includes the first switch module (S1) that is used for providing the charging module (P) of measuring electric charge, is used for switching the route, is used for the second switch module (S2) of bleeding electric charge, is used for control and gather collection control module (M) of voltage, is used for calibration charge amount' S sampling capacitor (C) and the Capacitor (CX) that awaits measuring, its characterized in that:
the first switch module (S1) is connected with the acquisition control module (M), meanwhile, the first switch module (S1) is connected with one end (a) of the sampling capacitor (C), the charging module (P) and one end (M) of the Capacitor (CX) to be tested, the first switch module (S1) is controlled through the acquisition control module (M), and therefore the connection between one end (a) of the sampling capacitor (C) and the charging module (P) can be achieved, or the connection between one end (a) of the sampling capacitor (C) and one end (M) of the Capacitor (CX) to be tested can be achieved;
the second switch module (S2) is connected with the acquisition control module (M), meanwhile, the second switch module (S2) is respectively connected with one end (a) of the sampling capacitor (C) and the ground wire, and the acquisition control module (M) controls the second switch module (S2), so that the one end (a) of the sampling capacitor (C) can be disconnected from the ground wire, or one end (a) of the sampling capacitor (C) is grounded;
one end (a) of the sampling capacitor (C) is connected with the acquisition control module (M); the other end (b) of the sampling capacitor (C) is grounded; the other end (n) of the Capacitor (CX) to be measured is grounded.
2. The simplified capacitance measuring circuit of claim 1, wherein: the sampling capacitor (C) is a replaceable capacitor, comprises a plurality of capacitors with different capacitance values, and can be replaced according to the capacitance value of the capacitor to be tested.
3. The simplified capacitance measuring circuit of claim 1, wherein: the first switch module (S1) comprises a relay (K1), a triode (T1), a diode (D1), a first resistor (R1) and a second resistor (R2); the base electrode of the triode (T1) is connected to the acquisition control module (M) through a second resistor (R2), the collector electrode is connected to the positive electrode of a power supply through a first resistor (R1), the emitter electrode is connected to one control pin of the relay (K1), the other control pin of the relay (K1) is grounded, the positive electrode of the diode (D1) is grounded, and the negative electrode of the diode is connected with the emitter electrode of the triode (T1); a switch contact (x) of the relay (K1) is connected with one end (a) of the sampling capacitor (C), a normally closed contact (y) of the relay (K1) is connected with one end (m) of the Capacitor (CX) to be tested, and a normally open contact (z) of the relay (K1) is connected with the charging module (P).
4. The simplified capacitance measuring circuit of claim 1, wherein: the second switch module (S2) comprises a field effect transistor (T2), a third resistor (R3) and a fourth resistor (R4), the grid electrode of the field effect transistor (T2) is connected to the acquisition control module (M) through the fourth resistor (R4), the drain electrode of the field effect transistor (T2) is connected to one end (a) of the sampling capacitor (C) through the third resistor (R3), and the source electrode of the field effect transistor (T2) is grounded.
5. The simplified capacitance measuring circuit of claim 1, wherein: the charging module (P) comprises a voltage stabilizing diode (D2) and a fifth resistor (R5), the anode of the voltage stabilizing diode (D2) is grounded, the cathode of the voltage stabilizing diode (D3526) is connected to the anode of a power supply through the fifth resistor (R5), and the cathode of the voltage stabilizing diode (D2) is connected to the first switch module (S1).
6. The simplified capacitance measuring circuit of claim 1, wherein: first switch module (S1) be at least two sets of switches, the switch is used for switching on one end (a) of sampling electric capacity (C) and one end (m) of module (P), sampling electric capacity (C) and the electric Capacity (CX) that awaits measuring respectively.
7. The simplified capacitance measuring circuit of claim 1, wherein: the sampling capacitor (C) and the tested Capacitor (CX) are nonpolar capacitors or polar capacitors, when the polar capacitors exist, the end a of the sampling capacitor (C) is a positive electrode, and the end m of the tested Capacitor (CX) is a positive electrode.
8. The simplified capacitance measuring circuit of claim 1, wherein: the acquisition control module (M) at least comprises an analog-to-digital conversion part and two high-low voltage input and output ports.
9. The simplified capacitance measuring circuit of claim 4, wherein: the field effect transistor (T2) is an N communication enhanced field effect transistor.
10. A simple capacitance measurement method comprising the measurement circuit of claim 1, comprising the steps of,
step (1): discharging charge and eliminating interference; the acquisition control module (M) controls the first switch module (S1) to communicate the sampling capacitor (C) with the Capacitor (CX) to be detected; the acquisition control module (M) controls the second switch module (S2) to enable one end (a) of the sampling capacitor (C) to be grounded; the acquisition control module (M) starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, indicates that the discharge is finished, and then the next step is carried out;
step (2): charging; the acquisition control module (M) controls the second switch module (S2) to disconnect one end (a) of the sampling capacitor (C) from the ground through the second switch (S2); the acquisition control module (M) controls the first switch module (S1) to enable the sampling capacitor (C) to be communicated with the charging module (P); the acquisition control module (M) starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable, and a measured voltage value V1 is obtained; entering the next step;
and (3): charge redistribution; the acquisition control module (M) controls the first switch module (S1) to enable the sampling capacitor (C) to be communicated with the Capacitor (CX) to be tested, and the sampling capacitor (C) charges the Capacitor (CX) to be tested; the acquisition control module (M) starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable, and a measured voltage value V2 is obtained; entering the next step;
and (4): calculating the capacitance value of the Capacitor (CX) to be measured; calculating a capacitance value CX of the Capacitance (CX) to be measured by a calculation formula (1-1):
CX=C*(V1-V2)/V2 (1-1)
entering the next step;
and (5): judging measurement; comparing the values of CX and C, if the capacitance value of the currently selected sampling capacitor (C) is closest to the Capacitor (CX) to be detected in the sampling capacitors (C) with a plurality of capacitance values, the obtained CX is the approximate capacitance value of the Capacitor (CX) to be detected, and executing the step (7); if the capacitance value of the currently selected sampling capacitor (C) is not the closest to the Capacitor (CX) to be measured in the sampling capacitors (C) with the plurality of capacitance values, the obtained CX is not the accurate capacitance value of the Capacitor (CX) to be measured, and the step (6) is continuously executed;
and (6): discharging the electric charge and replacing the sampling capacitor (C); the acquisition control module (M) controls the first switch module (S1) to communicate the sampling capacitor (C) with the Capacitor (CX) to be detected; the acquisition control module (M) controls the second switch module (S2) to enable one end (a) of the sampling capacitor (C) to be grounded; the acquisition control module (M) starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, and the discharge is indicated to be finished; selecting a sampling capacitor closest to the CX value obtained by the last measurement from the adopted capacitors (C) with a plurality of capacitance values, accessing a measurement circuit, and executing the step (2) again;
and (7): finishing the measurement; the acquisition control module (M) controls the first switch module (S1) to communicate the sampling capacitor (C) with the Capacitor (CX) to be detected; the acquisition control module (M) controls the second switch module (S2) to enable one end (a) of the sampling capacitor (C) to be grounded; the acquisition control module (M) starts the analog-digital conversion part to acquire voltage until the acquired voltage value is stable and tends to zero, and the discharge is indicated to be finished; and closing the acquisition control module (M) and finishing measurement.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010624104.5A CN111650443A (en) | 2020-07-02 | 2020-07-02 | Simple capacitance value measuring circuit and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010624104.5A CN111650443A (en) | 2020-07-02 | 2020-07-02 | Simple capacitance value measuring circuit and method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN111650443A true CN111650443A (en) | 2020-09-11 |
Family
ID=72347603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010624104.5A Pending CN111650443A (en) | 2020-07-02 | 2020-07-02 | Simple capacitance value measuring circuit and method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111650443A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113532586A (en) * | 2021-08-12 | 2021-10-22 | 矽朋微电子(无锡)有限公司 | Detection method of capacitive sensor |
CN115343515A (en) * | 2022-10-17 | 2022-11-15 | 基合半导体(宁波)有限公司 | Analog front end circuit, capacitance measuring circuit, chip and electronic equipment |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5611693A (en) * | 1979-07-04 | 1981-02-05 | Fujitsu Ltd | Detection circuit for electric charge |
CN1766660A (en) * | 2004-09-08 | 2006-05-03 | 欧姆龙株式会社 | Capacitance measuring arrangement, method, and program |
CN101435838A (en) * | 2007-11-15 | 2009-05-20 | 鸿富锦精密工业(深圳)有限公司 | Apparatus for measuring capacitance capacity |
US20110156839A1 (en) * | 2009-12-31 | 2011-06-30 | Silicon Laboratories Inc. | Capacitive sensor with variable corner frequency filter |
CN103134996A (en) * | 2013-01-31 | 2013-06-05 | 珠海中慧微电子有限公司 | Mutual capacitance sensing circuit and method using charge compensation |
CN105259423A (en) * | 2015-10-22 | 2016-01-20 | 宁波力芯科信息科技有限公司 | Capacitance measurement circuit, liquid level detection circuit and method of using same, capacitance measurement circuit module, drinking fountain, and smart home device |
CN105445562A (en) * | 2015-11-27 | 2016-03-30 | 贵州铜仁高新区科创互联生产力促进中心 | Capacitor capacity test circuit, liquid level height detection circuit, and application method of the liquid level height detection circuit |
CN106645981A (en) * | 2016-12-30 | 2017-05-10 | 上海东软载波微电子有限公司 | Capacitance measuring circuit for capacitor |
CN108918980A (en) * | 2018-07-25 | 2018-11-30 | 济南大学 | A kind of capacitance signal measuring circuit and measurement method |
-
2020
- 2020-07-02 CN CN202010624104.5A patent/CN111650443A/en active Pending
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5611693A (en) * | 1979-07-04 | 1981-02-05 | Fujitsu Ltd | Detection circuit for electric charge |
CN1766660A (en) * | 2004-09-08 | 2006-05-03 | 欧姆龙株式会社 | Capacitance measuring arrangement, method, and program |
CN101435838A (en) * | 2007-11-15 | 2009-05-20 | 鸿富锦精密工业(深圳)有限公司 | Apparatus for measuring capacitance capacity |
US20110156839A1 (en) * | 2009-12-31 | 2011-06-30 | Silicon Laboratories Inc. | Capacitive sensor with variable corner frequency filter |
CN103134996A (en) * | 2013-01-31 | 2013-06-05 | 珠海中慧微电子有限公司 | Mutual capacitance sensing circuit and method using charge compensation |
CN105259423A (en) * | 2015-10-22 | 2016-01-20 | 宁波力芯科信息科技有限公司 | Capacitance measurement circuit, liquid level detection circuit and method of using same, capacitance measurement circuit module, drinking fountain, and smart home device |
CN105445562A (en) * | 2015-11-27 | 2016-03-30 | 贵州铜仁高新区科创互联生产力促进中心 | Capacitor capacity test circuit, liquid level height detection circuit, and application method of the liquid level height detection circuit |
CN106645981A (en) * | 2016-12-30 | 2017-05-10 | 上海东软载波微电子有限公司 | Capacitance measuring circuit for capacitor |
CN108918980A (en) * | 2018-07-25 | 2018-11-30 | 济南大学 | A kind of capacitance signal measuring circuit and measurement method |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113532586A (en) * | 2021-08-12 | 2021-10-22 | 矽朋微电子(无锡)有限公司 | Detection method of capacitive sensor |
CN115343515A (en) * | 2022-10-17 | 2022-11-15 | 基合半导体(宁波)有限公司 | Analog front end circuit, capacitance measuring circuit, chip and electronic equipment |
CN115343515B (en) * | 2022-10-17 | 2023-03-07 | 基合半导体(宁波)有限公司 | Analog front end circuit, capacitance measuring circuit, chip and electronic equipment |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN111650443A (en) | Simple capacitance value measuring circuit and method | |
CN112698240B (en) | Open-short circuit testing device | |
US11249117B2 (en) | Autoranging ammeter with fast dynamic response | |
CN114910808A (en) | Battery internal resistance detection method and battery internal resistance detection circuit | |
CN115840123B (en) | Transistor parameter testing device and testing method | |
CN104181434A (en) | Direct current power supply insulation detection device and detection method | |
CN113589045A (en) | Sensitive resistance measuring device and measuring method | |
CN109900970A (en) | A kind of multi channel detector capacitor automatic measurement system | |
CN112187050A (en) | Precise low-cost programmable power supply module for test equipment | |
CN111175687A (en) | Nonlinear load standard electric energy meter | |
CN214622817U (en) | Composite resistance test circuit | |
CN206725726U (en) | A kind of voltage check device of large-size machine | |
CN106443156B (en) | Electric automobile current measurement circuit | |
CN113533844A (en) | Electric quantity meter circuit, control method, electric quantity meter and terminal | |
CN213069107U (en) | Current acquisition circuit and power battery based on single current sensor | |
CN210835177U (en) | Battery detection circuit | |
CN109239582B (en) | Testing device for charging management integrated circuit | |
CN110361570B (en) | Electronic load | |
CN113589046A (en) | High-precision resistance signal acquisition circuit applied to aviation electromechanical products | |
CN206848232U (en) | It is a kind of to simulate acid, the pH value electric signal generator circuit of alkali concn | |
CN117254810B (en) | Signal acquisition system | |
CN218995622U (en) | Battery internal resistance parameter measuring circuit and battery internal resistance measuring device | |
CN220527888U (en) | POE power supply circuit | |
CN116718814B (en) | Switching circuit and method for measuring current-voltage resistance by using same | |
CN113075459B (en) | Electrostatic capacity detection device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20200911 |
|
WD01 | Invention patent application deemed withdrawn after publication |