CN111640706A - Array substrate preparation method and array substrate - Google Patents
Array substrate preparation method and array substrate Download PDFInfo
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- CN111640706A CN111640706A CN202010597543.1A CN202010597543A CN111640706A CN 111640706 A CN111640706 A CN 111640706A CN 202010597543 A CN202010597543 A CN 202010597543A CN 111640706 A CN111640706 A CN 111640706A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
Abstract
The array substrate preparation method provided by the embodiment of the invention comprises the steps of forming a light shielding layer pattern by adopting an active layer photomask, forming an active layer pattern by utilizing the active layer photomask, and orthographically projecting the light shielding layer pattern on a substrate to cover the orthographic projection of the active layer pattern on the substrate; the light shield layer and the active layer share one active layer light shield to form, so that one light shield layer light shield is saved, and the technical problem that the cost for forming the light shield layer is high in the existing array substrate is solved.
Description
Technical Field
The invention relates to the technical field of OLED display, in particular to a preparation method of an array substrate and the array substrate.
Background
In the existing array substrate preparation method, an independent light shielding layer photomask is usually needed to form the light shielding layer pattern, the formed light shielding layer pattern is used for shielding external light from entering a channel region of an active layer, and the occurrence of a TFT device leakage current phenomenon is prevented, but the production cost is increased by forming the light shielding layer pattern by independently adopting the light shielding layer photomask, so the existing array substrate has the technical problem of high cost for forming the light shielding layer.
Disclosure of Invention
The embodiment of the invention provides an array substrate, which can solve the technical problem that the existing array substrate is high in cost for forming a light shielding layer.
The embodiment of the invention provides a preparation method of an array substrate, which comprises the following steps:
providing a substrate base plate;
preparing an opaque light resistance layer on the substrate;
patterning the light resistance layer by using an active layer photomask to form a light shielding layer;
forming a buffer layer over the light-shielding layer;
preparing a semiconductor layer on the buffer layer, and patterning the semiconductor layer by using the active layer photomask again to form an active layer which is consistent with and coincident with the light shielding layer pattern;
and sequentially preparing a gate insulating layer, a gate electrode, a passivation layer, a source/drain electrode and a flat layer on the semiconductor layer to form the array substrate.
In the array substrate manufacturing method provided by the embodiment of the present invention, in the step of forming the light shielding layer pattern, the method further includes:
and exposing the lightproof photoresist layer by using an active layer photomask and uniform light perpendicular to the active layer photomask, and coating a developing solution to form the light shielding layer pattern.
In the method for manufacturing an array substrate according to an embodiment of the present invention, in the step of forming the active layer pattern, the method further includes:
exposing the semiconductor layer through an active layer photomask and uniform light perpendicular to the active layer photomask, coating a developing solution to form an active layer pattern, and overlapping the orthographic projection of the formed active layer pattern on the substrate and the orthographic projection of the light shielding layer pattern on the substrate.
In the array substrate manufacturing method provided by the embodiment of the present invention, in the step of forming the light shielding layer pattern, the method further includes:
and exposing the lightproof photoresist layer through an active layer photomask and light which is perpendicular to the active layer photomask and has uneven illumination intensity, and coating a developing solution to form the light shielding layer pattern.
In the array substrate manufacturing method provided by the embodiment of the present invention, in the step of forming the light shielding layer pattern, the method further includes:
and exposing the lightproof photoresist layer through an active layer photomask and light rays which form an acute angle with the active layer photomask and have uneven illumination intensity, coating a developing solution to form the light shielding layer pattern, and covering the orthographic projection of the active layer pattern on the substrate by the orthographic projection of the obtained light shielding layer pattern on the substrate.
An embodiment of the present invention provides an array substrate, including:
a light-shielding layer disposed on the substrate, the light-shielding layer including a light-shielding layer pattern; and
a buffer layer disposed on the light-shielding layer; and
an active layer disposed on the buffer layer, the active layer including an active layer pattern;
wherein, the orthographic projection of the light shielding layer pattern on the substrate covers the orthographic projection of the active layer pattern on the substrate.
In the array substrate provided by the embodiment of the invention, the orthographic projection of the light shielding layer pattern on the substrate is overlapped with the orthographic projection of the active layer pattern on the substrate.
In the array substrate provided by the embodiment of the invention, the orthographic projection shapes of the light shielding layer pattern and the active layer pattern on the substrate are the same.
In the array substrate provided by the embodiment of the invention, the orthographic projection of the light shielding layer pattern on the substrate and the orthographic projection of the active layer pattern on the substrate are spliced and combined by a plurality of rectangles.
In the array substrate provided by the embodiment of the invention, the orthographic projection of the light shielding layer pattern on the substrate is an enlarged figure of the orthographic projection of the active layer pattern on the substrate.
Has the advantages that: the array substrate preparation method provided by the embodiment of the invention comprises the steps of forming the light shielding layer pattern by using an active layer photomask, forming the active layer pattern by using the active layer photomask, and carrying out orthographic projection of the light shielding layer pattern on the substrate to cover the orthographic projection of the active layer pattern on the substrate; the light shield layer and the active layer share one active layer light shield to form, so that one light shield layer light shield is saved, and the technical problem that the cost for forming the light shield layer is high in the existing array substrate is solved.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic flow chart of a method for manufacturing an array substrate according to an embodiment of the present invention
Fig. 2 is a schematic cross-sectional view of an array substrate according to an embodiment of the invention;
fig. 3 is a schematic top view of a light shielding pattern and an active layer pattern of an array substrate according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
As shown in fig. 1, in the array substrate manufacturing method provided by the embodiment of the present invention, the step of forming the array substrate includes:
s1, providing a substrate 10;
s2, preparing an opaque photoresist layer on the substrate base plate 10;
s3, patterning the photoresist layer by using the active layer 203 mask to form a light shielding layer;
s4, forming a buffer layer 202 above the light-shielding layer 201;
s5, preparing a semiconductor layer on the buffer layer 202, and patterning the semiconductor layer by using the active layer 203 photomask again to form an active layer 203 which is consistent with and overlapped with the light-shielding layer 201;
and S6, preparing a gate insulating layer, a gate electrode, a passivation layer, a source/drain electrode and a flat layer on the semiconductor layer in sequence to form the array substrate.
In this embodiment, the array substrate preparation method includes forming the light shielding layer 201 pattern by using an active layer 203 photomask, forming the active layer 203 pattern by using the active layer 203 photomask, and performing an orthographic projection of the light shielding layer 201 pattern on the substrate 10 to cover an orthographic projection of the active layer 203 pattern on the substrate 10; the light shield layer 201 and the active layer 203 share one active layer 203 light shield to form, so that one light shield layer 201 light shield is saved, and the technical problem that the cost for forming the light shield layer 201 is high in the existing array substrate is solved.
In one embodiment, in the step of forming the light-shielding layer 201 pattern, the method further includes:
the opaque photoresist layer is exposed by an active layer 203 photomask and uniform light perpendicular to the active layer 203 photomask, and a developing solution is coated to form the light shielding layer 201 pattern.
In one embodiment, the step of patterning the active layer 203 further includes:
exposing the semiconductor layer through an active layer 203 photomask and uniform light perpendicular to the active layer 203 photomask, coating a developing solution to form an active layer 203 pattern, and forming an orthographic projection of the active layer 203 pattern on the substrate 10 to be overlapped with an orthographic projection of the light shielding layer 201 pattern on the substrate 10.
In one embodiment, in the step of forming the light-shielding layer 201 pattern, the method further includes:
the opaque photoresist layer is exposed through an active layer 203 mask and light with uneven illumination intensity perpendicular to the active layer 203 mask, and a developing solution is coated to form the light shielding layer 201 pattern.
In one embodiment, in the step of forming the light-shielding layer 201 pattern, the method further includes:
the opaque photoresist layer is exposed through an active layer 203 photomask and light rays which form an acute angle with the active layer 203 photomask and have uneven illumination intensity, a developing solution is coated to form the light shielding layer 201 pattern, and the orthographic projection of the obtained light shielding layer 201 pattern on the substrate 10 covers the orthographic projection of the active layer 203 pattern on the substrate 10.
As shown in fig. 2, the array substrate provided by the embodiment of the invention includes a light shielding layer 201, a buffer layer 202, and an active layer 203, wherein the light shielding layer 201 is disposed on the substrate 10, the light shielding layer 201 includes a light shielding layer 201 pattern, the buffer layer 202 is disposed on the light shielding layer 201, the active layer 203 is disposed on the buffer layer 202, and the active layer 203 includes an active layer 203 pattern, wherein an orthographic projection of the light shielding layer 201 pattern on the substrate 10 covers an orthographic projection of the active layer 203 pattern on the substrate 10.
In this embodiment, the array substrate comprises a light-shielding layer 201, a buffer layer 202 and an active layer 203, wherein the light-shielding layer 201 is arranged on the substrate 10, the light-shielding layer 201 comprises a pattern of the light-shielding layer 201, the buffer layer 202 is arranged on the light-shielding layer 201, the active layer 203 is arranged on the buffer layer 202, and the active layer 203 comprises a pattern of the active layer 203, wherein an orthographic projection of the pattern of the light-shielding layer 201 on the substrate 10 covers an orthographic projection of the pattern of the active layer 203 on the substrate 10; the light shield layer 201 and the active layer 203 share one active layer 203 light shield to form, so that one light shield layer 201 light shield is saved, and the technical problem that the cost for forming the light shield layer 201 is high in the existing array substrate is solved.
In one embodiment, an orthographic projection of the light shielding layer 201 pattern on the substrate 10 is overlapped with an orthographic projection of the active layer 203 pattern on the substrate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
In one embodiment, the cross-sectional shape of the light-shielding layer 201 pattern is rectangular.
In one embodiment, the cross-sectional shape of the light-shielding layer 201 pattern is a diamond shape.
In one embodiment, the cross-sectional shape of the light-shielding layer 201 pattern is a parallelogram.
In one embodiment, the cross-sectional shape of the light-shielding layer 201 pattern is circular.
In one embodiment, the light shielding layer 201 pattern and the active layer 203 pattern have the same orthographic projection shape on the substrate 10.
In one embodiment, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 and the orthographic projection of the active layer 203 pattern on the substrate 10 are both a spliced combination of a plurality of rectangles.
The light shielding layer 201 pattern may be a spliced combination of three rectangles.
The light shielding layer 201 pattern may also be a spliced combination of four rectangles.
Wherein the head and tail ends of the rectangle are mutually connected.
As shown in fig. 2, an OLED display panel provided in an embodiment of the present invention includes a substrate 10, an array substrate, a pixel defining layer 30, a light emitting functional layer 40, and an encapsulation layer 50, wherein the array substrate includes a light shielding layer 201, a buffer layer 202, and an active layer 203, the light shielding layer 201 is disposed on the substrate 10, the light shielding layer 201 includes a pattern of the light shielding layer 201, the buffer layer 202 is disposed on the light shielding layer 201, the active layer 203 is disposed on the buffer layer 202, the active layer 203 includes a pattern of the active layer 203, and an orthographic projection of the pattern of the light shielding layer 201 on the substrate 10 covers an orthographic projection of the pattern of the active layer 203 on the substrate 10.
In this embodiment, the OLED display panel includes an array substrate, the array substrate includes a substrate 10, an array substrate, a pixel defining layer 30, a light emitting functional layer 40, and an encapsulation layer 50, the array substrate includes a light shielding layer 201, a buffer layer 202, and an active layer 203, the light shielding layer 201 is disposed on the substrate 10, the light shielding layer 201 includes a pattern of the light shielding layer 201, the buffer layer 202 is disposed on the light shielding layer 201, the active layer 203 is disposed on the buffer layer 202, the active layer 203 includes a pattern of the active layer 203, wherein an orthographic projection of the pattern of the light shielding layer 201 on the substrate 10 covers an orthographic projection of the pattern of the active layer 203 on the substrate 10; the light shield layer 201 and the active layer 203 share one active layer 203 light shield to form, so that one light shield layer 201 light shield is saved, and the technical problem that the cost for forming the light shield layer 201 is high in the existing array substrate is solved.
In one embodiment, in the OLED display panel, an orthogonal projection of the light shielding layer 201 pattern on the substrate base plate 10 overlaps an orthogonal projection of the active layer 203 pattern on the substrate base plate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
In one embodiment, in the OLED display panel, the light shielding layer 201 has a rectangular cross-sectional shape.
In one embodiment, in the OLED display panel, the cross-sectional shape of the light shielding layer 201 pattern is a diamond shape.
In one embodiment, in the OLED display panel, the cross-sectional shape of the light-shielding layer 201 pattern is a parallelogram.
In one embodiment, in the OLED display panel, the cross-sectional shape of the light shielding layer 201 pattern is a circle.
In one embodiment, in the OLED display panel, the light shielding layer 201 pattern and the active layer 203 pattern have the same orthographic projection shape on the substrate 10.
In one embodiment, in the OLED display panel, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 and the orthographic projection of the active layer 203 pattern on the substrate 10 are both a spliced combination of a plurality of rectangles.
The light shielding layer 201 pattern may be a spliced combination of three rectangles.
The light shielding layer 201 pattern may also be a spliced combination of four rectangles.
Wherein the head and tail ends of the rectangle are mutually connected.
In one embodiment, as shown in fig. 3, an orthographic projection of the light shielding layer 201 pattern on the base substrate 10 is an enlarged figure of an orthographic projection of the active layer 203 pattern on the base substrate 10.
The OLED display device provided in the embodiment of the present invention includes an array substrate, an optical film, a reflective sheet, a glass substrate, and a diffusion sheet, as shown in fig. 2, the array substrate includes a substrate 10, an array substrate, a pixel defining layer 30, a light emitting functional layer 40, and an encapsulation layer 50, the array substrate includes a light shielding layer 201, a buffer layer 202, and an active layer 203, the light shielding layer 201 is disposed on the substrate 10, the light shielding layer 201 includes a light shielding layer 201 pattern, the buffer layer 202 is disposed on the light shielding layer 201, the active layer 203 is disposed on the buffer layer 202, the active layer 203 includes an active layer 203 pattern, wherein an orthographic projection of the light shielding layer 201 pattern on the substrate 10 covers an orthographic projection of the active layer 203 pattern on the substrate 10.
In the embodiment, the OLED display device includes an array substrate including a substrate 10, an array substrate, a pixel defining layer 30, a light emitting functional layer 40, and an encapsulation layer 50, the array substrate includes a light shielding layer 201, a buffer layer 202, and an active layer 203, the light shielding layer 201 is disposed on the substrate 10, the light shielding layer 201 includes a pattern of the light shielding layer 201, the buffer layer 202 is disposed on the light shielding layer 201, the active layer 203 is disposed on the buffer layer 202, the active layer 203 includes a pattern of the active layer 203, wherein an orthographic projection of the pattern of the light shielding layer 201 on the substrate 10 covers an orthographic projection of the pattern of the active layer 203 on the substrate 10; the light shield layer 201 and the active layer 203 share one active layer 203 light shield to form, so that one light shield layer 201 light shield is saved, and the technical problem that the cost for forming the light shield layer 201 is high in the existing array substrate is solved.
In one embodiment, in the OLED display device, an orthogonal projection of the light shielding layer 201 pattern on the substrate base plate 10 overlaps an orthogonal projection of the active layer 203 pattern on the substrate base plate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
Wherein, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 is the same as the orthographic projection of the active layer 203 pattern on the substrate 10.
In one embodiment, in the OLED display device, the light shielding layer 201 has a rectangular cross-sectional shape.
In one embodiment, in the OLED display device, the cross-sectional shape of the light shielding layer 201 pattern is a diamond shape.
In one embodiment, in the OLED display device, the light shielding layer 201 has a parallelogram shape in cross section.
In one embodiment, in the OLED display device, the cross-sectional shape of the light shielding layer 201 pattern is a circle.
In one embodiment, in the OLED display device, the light shielding layer 201 pattern and the active layer 203 pattern have the same orthographic projection shape on the substrate 10.
In one embodiment, in the OLED display device, the orthographic projection of the light shielding layer 201 pattern on the substrate 10 and the orthographic projection of the active layer 203 pattern on the substrate 10 are both a spliced combination of a plurality of rectangles.
The light shielding layer 201 pattern may be a spliced combination of three rectangles.
The light shielding layer 201 pattern may also be a spliced combination of four rectangles.
Wherein the head and tail ends of the rectangle are mutually connected.
In one embodiment, in the OLED display device, as shown in fig. 3, an orthographic projection of the light shielding layer 201 pattern on the substrate 10 is an enlarged pattern of an orthographic projection of the active layer 203 pattern on the substrate 10.
The array substrate preparation method provided by the embodiment of the invention comprises the steps of forming the light shielding layer pattern by using an active layer photomask, forming the active layer pattern by using the active layer photomask, and carrying out orthographic projection of the light shielding layer pattern on the substrate to cover the orthographic projection of the active layer pattern on the substrate; the light shield layer and the active layer share one active layer light shield to form, so that one light shield layer light shield is saved, and the technical problem that the cost for forming the light shield layer is high in the existing array substrate is solved.
The foregoing detailed description is provided for one of the embodiments of the present invention, and the principle and the implementation of the present invention are explained herein by applying specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A preparation method of an array substrate is characterized by comprising the following steps:
providing a substrate base plate;
preparing an opaque light resistance layer on the substrate;
patterning the light resistance layer by using an active layer photomask to form a light shielding layer;
forming a buffer layer over the light-shielding layer;
preparing a semiconductor layer on the buffer layer, and patterning the semiconductor layer by using the active layer photomask again to form an active layer which is consistent with and coincident with the light shielding layer pattern;
and sequentially preparing a gate insulating layer, a gate electrode, a passivation layer, a source/drain electrode and a flat layer on the semiconductor layer to form the array substrate.
2. The method for manufacturing an array substrate according to claim 1, wherein in the step of forming the light-shielding layer pattern, the method further comprises:
and exposing the lightproof photoresist layer by using an active layer photomask and uniform light perpendicular to the active layer photomask, and coating a developing solution to form the light shielding layer pattern.
3. The method for preparing an array substrate of claim 2, wherein in the step of forming the active layer pattern, further comprising:
exposing the semiconductor layer through an active layer photomask and uniform light perpendicular to the active layer photomask, coating a developing solution to form an active layer pattern, and overlapping the orthographic projection of the formed active layer pattern on the substrate and the orthographic projection of the light shielding layer pattern on the substrate.
4. The method for manufacturing an array substrate according to claim 1, wherein in the step of forming the light-shielding layer pattern, the method further comprises:
and exposing the lightproof photoresist layer through an active layer photomask and light which is perpendicular to the active layer photomask and has uneven illumination intensity, and coating a developing solution to form the light shielding layer pattern.
5. The method for manufacturing an array substrate according to claim 1, wherein in the step of forming the light-shielding layer pattern, the method further comprises:
and exposing the lightproof photoresist layer through an active layer photomask and light rays which form an acute angle with the active layer photomask and have uneven illumination intensity, coating a developing solution to form the light shielding layer pattern, and covering the orthographic projection of the active layer pattern on the substrate by the orthographic projection of the obtained light shielding layer pattern on the substrate.
6. An array substrate, comprising:
a light-shielding layer disposed on the substrate, the light-shielding layer including a light-shielding layer pattern; and
a buffer layer disposed on the light-shielding layer; and
an active layer disposed on the buffer layer, the active layer including an active layer pattern;
wherein, the orthographic projection of the light shielding layer pattern on the substrate covers the orthographic projection of the active layer pattern on the substrate.
7. The array substrate of claim 6, wherein an orthographic projection of the light shielding layer pattern on the substrate overlaps with an orthographic projection of the active layer pattern on the substrate.
8. The array substrate of claim 6, wherein the light shielding layer pattern and the active layer pattern have the same orthographic shape on the substrate.
9. The array substrate of claim 8, wherein an orthographic projection of the light shielding layer pattern on the substrate and an orthographic projection of the active layer pattern on the substrate are a spliced combination of a plurality of rectangles.
10. The array substrate of claim 9, wherein an orthographic projection of the light shielding layer pattern on the substrate is an enlarged pattern of an orthographic projection of the active layer pattern on the substrate.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010597543.1A CN111640706A (en) | 2020-06-28 | 2020-06-28 | Array substrate preparation method and array substrate |
| PCT/CN2020/112083 WO2022000747A1 (en) | 2020-06-28 | 2020-08-28 | Method for preparing array substrate, and array substrate and display panel |
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| CN202010597543.1A CN111640706A (en) | 2020-06-28 | 2020-06-28 | Array substrate preparation method and array substrate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112928127A (en) * | 2021-01-12 | 2021-06-08 | 武汉华星光电技术有限公司 | Array substrate |
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| CN110690231A (en) * | 2019-10-15 | 2020-01-14 | 合肥京东方卓印科技有限公司 | Display back plate and manufacturing method thereof, display panel and display device |
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| CN107331668A (en) * | 2017-06-09 | 2017-11-07 | 武汉华星光电技术有限公司 | A kind of TFT substrate and preparation method |
| CN107885004B (en) * | 2017-12-06 | 2020-12-08 | 京东方科技集团股份有限公司 | Array substrate, display panel, display device and manufacturing process thereof |
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| CN104678643A (en) * | 2015-03-27 | 2015-06-03 | 合肥京东方光电科技有限公司 | Manufacturing methods of display base plate and display panel |
| CN107170756A (en) * | 2017-05-24 | 2017-09-15 | 京东方科技集团股份有限公司 | Array base palte, display device and the method for preparing array base palte |
| CN110400811A (en) * | 2019-08-30 | 2019-11-01 | 合肥鑫晟光电科技有限公司 | Array substrate and display device |
| CN110690231A (en) * | 2019-10-15 | 2020-01-14 | 合肥京东方卓印科技有限公司 | Display back plate and manufacturing method thereof, display panel and display device |
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