CN110764327A - Array substrate and preparation method thereof - Google Patents
Array substrate and preparation method thereof Download PDFInfo
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- CN110764327A CN110764327A CN201911007163.1A CN201911007163A CN110764327A CN 110764327 A CN110764327 A CN 110764327A CN 201911007163 A CN201911007163 A CN 201911007163A CN 110764327 A CN110764327 A CN 110764327A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
Abstract
The embodiment of the application discloses an array substrate and a preparation method thereof, wherein the array substrate comprises a substrate base plate, an alignment mark and a black matrix layer, the alignment mark is positioned between the substrate base plate and the black matrix layer, and the thickness of the alignment mark is 1-2 um. In the array substrate in the embodiment of the application, in the array substrate manufacturing process before the black matrix layer is prepared, the thickness of the alignment mark is increased, and under the condition that the overall height of a film layer of the array substrate is unchanged, the thickness of the black photoresist material layer covering the alignment mark can be reduced by utilizing the photoresist leveling property, so that the transmittance of an alignment light source is increased, and the problem that the black matrix layer cannot be accurately aligned in the BOA technology is solved.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate and a preparation method thereof.
Background
Liquid Crystal Display (LCD) devices have many advantages such as thin body, power saving, and no radiation, and are widely used. Such as: liquid crystal televisions, mobile phones, Personal Digital Assistants (PDAs), digital cameras, computer screens, notebook computer screens, or the like. Liquid crystal display devices typically include a liquid crystal display panel and a backlight module. The Liquid crystal display panel is mainly composed of a Thin Film Transistor Array (TFT Array) substrate, a Color Filter (CF) substrate, and a Liquid crystal layer (Liquid crystal layer) disposed between the two substrates, and has a working principle of applying a driving voltage to the two glass substrates to control the rotation of Liquid crystal molecules of the Liquid crystal layer, and refracting light of the backlight module to generate a picture.
The COA (Color-filter on Array) technology is an integrated technology for directly manufacturing a Color filter layer on an Array substrate, can effectively solve the problems of light leakage and the like caused by alignment deviation in a box aligning process of a liquid crystal display device, and can remarkably improve the display aperture opening ratio.
In a traditional liquid crystal panel manufacturing process, a black matrix layer between sub-pixel gaps is directly formed on a color film substrate, which is the first process of the color film substrate, so that the problem of reference alignment marks (marks) does not exist in the manufacturing process of the black matrix layer. However, in the liquid crystal panel of the new COA technology, the COA technology is originally only to prepare three color film layers of red, green, and blue on the color film substrate side onto the array substrate; with the development of display technology, a color film Array integration (BOA) technology has been developed, which can reduce the deviation of two substrates when aligning, increase the aperture ratio of the liquid crystal display panel, and reduce the parasitic capacitance of the liquid crystal display panel, and is widely applied to the manufacture of the liquid crystal display panel. All film layers (including a black matrix layer, a color film layer and a columnar spacer) on the color film substrate are prepared on the array substrate, so that the aperture opening ratio of the panel is improved, the problem of poor alignment precision when the color film substrate and the array substrate are aligned is fundamentally solved, and various defects caused by alignment deviation are avoided.
However, one problem that cannot be avoided is that the alignment mark cannot be accurately read during the exposure process when the black matrix layer on the color film substrate is prepared on the array substrate. This is because other patterning processes are performed before the black matrix is prepared, and therefore, it is necessary to identify alignment marks in the structures of the layers in the previous processes when preparing the black matrix layer. Because the black matrix layer has a high Optical Density (OD), when the black matrix material is coated and exposed, it is difficult to identify or unable to identify the alignment marks in the structures of the layers in the previous process, and further it affects the alignment of the alignment marks with the mask plate, resulting in the difficulty of accurate alignment and even the inability of alignment of the exposure machine.
Disclosure of Invention
In view of the defects in the prior art, the embodiment of the application provides an array substrate and a preparation method thereof, and solves the problem that a black matrix layer in a BOA technology cannot be aligned accurately.
In order to solve the above problem, in a first aspect, the present application provides an array substrate, the array substrate includes a substrate base plate, an alignment mark and a black matrix layer, the alignment mark is located the substrate base plate with between the black matrix layer, the thickness of the alignment mark is 1-2 um.
Further, the alignment mark includes a first metal layer and a second metal layer, and the first metal layer and the second metal layer are sequentially stacked between the substrate and the black matrix layer.
Furthermore, the first metal layer includes a plurality of first metal lines distributed at intervals, the second metal layer includes a plurality of second metal lines distributed at intervals, and the first metal lines and the second metal lines are distributed in a crossing manner to form the alignment mark.
Further, the thickness of the first metal layer is 0.5 to 1um, and the thickness of the second metal layer is 0.5 to 1 um.
Further, the thickness of the black matrix layer in the projection area of the alignment mark is 3 to 4 um.
Furthermore, the alignment mark is located in a non-display area of the array substrate.
In a second aspect, the present application provides a display panel including the array substrate according to the above embodiments.
In a third aspect, the present application provides a method for manufacturing an array substrate, the method including:
providing a substrate base plate;
preparing an alignment mark on the substrate base plate;
and preparing a black matrix layer on one side of the alignment mark far away from the substrate base plate.
Further, the preparing of the alignment mark on the substrate base plate includes:
preparing a first metal layer on the substrate base plate;
and preparing a second metal layer on the first metal layer to obtain the alignment mark.
Further, the preparing the black matrix layer on the side of the alignment mark far away from the substrate base plate includes:
coating a black material layer on the substrate base plate, wherein the alignment mark is coated by the black material layer;
and patterning the black material layer by taking the position of the alignment mark as a reference to prepare a black matrix layer.
The array substrate has the beneficial effects that the array substrate comprises a substrate base plate, an alignment mark and a black matrix layer, the alignment mark is located between the substrate base plate and the black matrix layer, the thickness of the alignment mark is 1-2um, and compared with the prior art, the array substrate provided by the embodiment of the application can reduce the thickness of the black light resistance material layer covering the alignment mark in the array substrate process before the black matrix layer is prepared by increasing the thickness of the alignment mark and under the condition that the overall height of the film layer of the array substrate is unchanged, so that the alignment light source transmittance is increased, and the problem that the black matrix layer cannot be accurately aligned in the BOA technology is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of an array substrate according to the present application;
fig. 2 is a schematic structural diagram of another embodiment of an array substrate according to the present application;
FIG. 3 is a schematic diagram of an embodiment of an alignment mark provided in the present application;
fig. 4 is a schematic flow chart illustrating an embodiment of a method for manufacturing an array substrate according to an embodiment of the present disclosure;
fig. 5 is a schematic flow chart illustrating a method for manufacturing an array substrate according to another embodiment of the present disclosure;
fig. 6 is a schematic flow chart illustrating a method for manufacturing an array substrate according to another embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be considered as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
For the BOA technology, the black matrix layer on the color film substrate is prepared on the array substrate, and the problem that the alignment mark cannot be accurately read during the exposure process exists. This is because other patterning processes are performed before the black matrix is prepared, and therefore, it is necessary to identify alignment marks in the structures of the layers in the previous processes when preparing the black matrix layer. Because the black matrix layer has a high Optical Density (OD), when the black matrix material is coated and exposed, it is difficult to identify or unable to identify the alignment marks in the structures of the layers in the previous process, and further it affects the alignment of the alignment marks with the mask plate, resulting in the difficulty of accurate alignment and even the inability of alignment of the exposure machine.
Accordingly, embodiments of the present application provide an array substrate and a method for manufacturing the same, which will be described in detail below.
First, an array substrate is provided in an embodiment of the present application, where the array substrate includes a substrate, an alignment mark and a black matrix layer, the alignment mark is located between the substrate and the black matrix layer, and a thickness of the alignment mark is 1-2 um.
Fig. 1 is a schematic structural diagram of an embodiment of an array substrate in the embodiment of the present application.
In this embodiment, the array substrate 10 includes a substrate 100, an alignment mark 110, and a black matrix layer 120, wherein the substrate 100 may be made of inorganic glass, and generally, the substrate is used to support other film layers in the array substrate, so as to provide a horizontal supporting surface for the other film layers of the array substrate. The alignment mark is located between the substrate and the black matrix layer, wherein three color resistances are filled between the black matrix layer, the black matrix layer can shield the disordered scattered light from the liquid crystal layer, prevent the color mixing between sub-pixels and prevent the environmental light from irradiating the thin film transistor channel, in order to better satisfy the shading effect, the whole thickness of the black matrix layer is 5um, and the recognition effect corresponding to the infrared sensor in the exposure machine is related to the thickness of the black matrix layer, when the thickness of the black matrix layer at the projection position of the alignment mark is less than or equal to 4um, the infrared ray can penetrate through the black matrix layer, so that the infrared sensor can recognize the position, the thickness of the position mark in the embodiment is 1-2um, the thickness of the black matrix layer at the projection position of the alignment mark is 3-4 um, so that the infrared light source in the exposure machine can normally perform identification and alignment.
It should be noted that, in the embodiment of the array substrate, only the above structure is described, and it is understood that, in addition to the above structure, the array substrate according to the embodiment of the present invention may further include any other necessary structure as needed, such as a buffer layer, a gate insulating layer, an interlayer dielectric layer (ILD), and the like, and the specific description is not limited herein.
Through providing an array substrate in the embodiment of this application, array substrate includes the substrate base plate, counterpoint mark and black matrix layer, counterpoint mark is located between substrate base plate and the black matrix layer, counterpoint mark's thickness is 1-2um, compare in prior art, the array substrate that this application embodiment provided, in the array substrate processing procedure before preparing the black matrix layer, through having increased the thickness of counterpoint mark, and under the unchangeable circumstances of the whole height of rete of array substrate, utilize the photoresistance leveling characteristic, can attenuate the thickness of the black photoresistance material layer that covers on counterpoint mark, thereby para-position light source transmissivity has been increased, the problem of the unable accurate counterpoint of black matrix layer in the BOA technique has been solved.
On the basis of the above embodiments, in another embodiment of the present application, for describing the alignment mark structure specifically, please refer to fig. 2 and fig. 3, fig. 2 is a schematic structural diagram of another embodiment of the array substrate in the embodiment of the present application; fig. 3 is a schematic structural diagram of an embodiment of an alignment mark of an array substrate according to the present application.
In this embodiment, the alignment mark includes a first metal layer 111 and a second metal layer 112, the first metal layer 111 and the second metal layer 112 are sequentially stacked between the substrate 110 and the black matrix layer 120, wherein the first metal layer is prepared in the non-display region of the array substrate by using the process of preparing the gate electrode layer in the process of preparing the array substrate and by exposing and developing the patterning, the second metal layer is prepared in the non-display region of the array substrate by using the process of preparing the source electrode layer in the process of preparing the array substrate and by exposing and developing the patterning, wherein the first metal layer includes a plurality of first metal lines distributed at intervals, the second metal layer includes a plurality of second metal lines distributed at intervals, the first metal lines and the second metal lines are distributed in a crossing manner to form the alignment mark, the mark size is 230um × 230um, the alignment mark includes a red color-resist alignment mark 301, a black matrix layer 120, and, A green color resist alignment mark 302, a blue color resist alignment mark 303, and a black matrix layer alignment mark 304. In other embodiments, the alignment mark may also have other shapes such as a rectangle and a circle, and the size of the alignment mark may also have other sizes, which is not limited in this application.
In this embodiment, in order to make the alignment recognition of the exposure machine more accurate, a semi-transparent mask mode can be adopted simultaneously, so that the single-layer metal in the alignment mark is thicker, the requirement of reducing the film thickness of the black matrix layer is met, the thicknesses of the first metal layer and the second metal layer in the alignment mark are thicker, and the thickness of the black matrix layer in the projection area of the alignment mark is thinner.
In order to better implement the array substrate in the embodiment of the present application, on the basis of the array substrate, an embodiment of the present application further provides a display panel, where the display panel includes the array substrate in the above embodiment.
In the embodiment of the application, by providing a display panel, the display panel includes the array substrate as above embodiment, the array substrate includes the substrate base plate, counterpoint mark and black matrix layer, the counterpoint mark is located between substrate base plate and the black matrix layer, the thickness of counterpoint mark is 1-2um, compared with the prior art, the array substrate that this embodiment of the application provided, in the array substrate processing procedure before preparing the black matrix layer, through increasing the thickness of counterpoint mark, and under the unchangeable condition of the whole height of rete of array substrate, utilize the photoresistance leveling characteristic, can attenuate the thickness of the black photoresistance material layer that covers on the counterpoint mark, thereby increased counterpoint light source transmissivity, the problem that the black matrix layer can't be accurately counterpointed in the BOA technique is solved.
In order to better implement the array substrate in the embodiment of the present application, on the basis of the array substrate, the embodiment of the present application further provides a method for manufacturing the array substrate, the method including: providing a substrate base plate; preparing an alignment mark on a substrate; and preparing a black matrix layer on one side of the alignment mark far away from the substrate base plate.
As shown in fig. 4, a schematic flow chart of an embodiment of a method for manufacturing an array substrate according to an embodiment of the present application is provided, where the method includes:
s401, providing a substrate base plate.
In this embodiment, the substrate may be made of rigid material or flexible material, and when the substrate is made of rigid material, the substrate may be made of inorganic glass, and when the substrate is made of flexible material, the substrate may be made of polyimide material.
S402, preparing an alignment mark on the substrate base plate.
In one embodiment, each film layer in the thin film transistor, such as a buffer layer, a gate insulating layer, a source/drain layer and an interlayer insulating layer, is sequentially formed on the substrate, wherein the alignment mark includes a first metal layer and a second metal layer, the first metal layer may be the gate layer, the second metal layer may be the source layer, the first metal layer includes a plurality of first metal lines spaced apart from each other, the second metal layer includes a plurality of second metal lines spaced apart from each other, and the first metal lines and the second metal lines are crossed to form the alignment mark.
And S403, preparing a black matrix layer on the side of the alignment mark far away from the substrate.
In one embodiment, after each film layer of the thin film transistor is prepared on the substrate base plate, the array base plate is prepared, and the black matrix layer is prepared on the array base plate.
Compared with the prior art, the array substrate provided by the embodiment of the application can reduce the thickness of the black light resistance material layer covering the alignment mark by increasing the thickness of the alignment mark in the array substrate manufacturing process before the black matrix layer is prepared and utilizing the light resistance leveling characteristic under the condition that the overall height of the film layer of the array substrate is not changed, thereby increasing the transmittance of an alignment light source and solving the problem that the black matrix layer in the BOA technology cannot be aligned accurately.
On the basis of the above embodiments, in another specific embodiment of the present application, the preparing of the alignment mark on the substrate base plate includes: preparing a first metal layer on a substrate; and preparing a second metal layer on the first metal layer to obtain the alignment mark.
As shown in fig. 5, a schematic flow chart of another embodiment of a method for manufacturing an array substrate according to an embodiment of the present application is provided, where the manufacturing of the alignment mark on the substrate includes:
s501, preparing a first metal layer on the substrate.
In this embodiment, in the process of preparing the gate layer on the array substrate, the gate metal layer is formed by sputtering the gate metal on the substrate, the photoresist is coated on the gate metal layer, the photoresist is exposed and developed to perform patterning processing, so as to prepare a pattern of the gate layer, and meanwhile, a pattern of the first metal layer is also prepared in the non-display area of the array substrate, and the gate layer and the first metal layer are prepared by etching.
S502, preparing a second metal layer on the first metal layer to obtain the alignment mark.
In one embodiment, in the process of preparing the source layer on the array substrate, a source metal layer is formed by sputtering a source metal on the substrate, a photoresist is coated on the source metal layer, the photoresist is exposed and developed to perform patterning processing, so as to prepare a pattern of the source layer, and meanwhile, a pattern of the second metal layer is also prepared in a non-display area of the array substrate, and the source layer and the second metal layer are prepared by etching.
On the basis of the above embodiments, in another specific embodiment of the present application, the preparing the black matrix layer on the side of the alignment mark away from the substrate base plate includes: coating a black material layer on the substrate base plate, wherein the alignment mark is coated by the black material layer; and patterning the black material layer by taking the position of the alignment mark as a reference to prepare the black matrix layer. As shown in fig. 6, a schematic flow chart of another embodiment of a method for manufacturing an array substrate according to an embodiment of the present application is provided, where the method includes:
s601, coating a black material layer on the substrate base plate, wherein the black material layer covers the alignment mark.
In this example, after the array substrate is prepared, a black material layer is coated on the array substrate, wherein the black material layer covers the alignment mark. Specifically, the whole thickness of black material layer is 5um, and the black material layer thickness that is located counterpoint mark projection department is 3 to 4 um.
And S602, carrying out patterning treatment on the black material layer by taking the position of the alignment mark as a reference, and preparing the black matrix layer.
In a specific embodiment, after the black material layer is coated, a photoresist layer is coated on the black material layer, at this time, an infrared scanner in an exposure machine performs scanning identification alignment marks through infrared rays to perform alignment, after the alignment is accurately identified, patterning processing is performed on photoresist exposure and development to obtain a patterned photoresist layer, and then the black matrix layer with the pattern is prepared by etching the black material layer.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and a part which is not described in detail in a certain embodiment may refer to the detailed descriptions in the other embodiments, and is not described herein again.
In a specific implementation, each unit or structure may be implemented as an independent entity, or may be combined arbitrarily to be implemented as one or several entities, and the specific implementation of each unit or structure may refer to the foregoing method embodiment, which is not described herein again.
The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
The array substrate and the method for manufacturing the same provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are explained herein by applying specific examples, and the description of the embodiments above is only used to help understanding the method and the core concept of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. The array substrate is characterized by comprising a substrate base plate, alignment marks and a black matrix layer, wherein the alignment marks are located between the substrate base plate and the black matrix layer, and the thickness of the alignment marks is 1-2 um.
2. The array substrate of claim 1, wherein the alignment mark comprises a first metal layer and a second metal layer, and the first metal layer and the second metal layer are sequentially stacked between the substrate and the black matrix layer.
3. The array substrate of claim 2, wherein the first metal layer comprises a plurality of first metal lines spaced apart from each other, the second metal layer comprises a plurality of second metal lines spaced apart from each other, and the first metal lines and the second metal lines are crossed to form the alignment marks.
4. The array substrate of claim 2, wherein the first metal layer is 0.5 to 1um thick, and the second metal layer is 0.5 to 1um thick.
5. The array substrate of claim 1, wherein a thickness of the black matrix layer in the alignment mark projection region is 3 to 4 um.
6. The array substrate of claim 1, wherein the alignment mark is located in a non-display region of the array substrate.
7. A display panel comprising the array substrate according to any one of claims 1 to 6.
8. A preparation method of an array substrate is characterized by comprising the following steps:
providing a substrate base plate;
preparing an alignment mark on the substrate base plate;
and preparing a black matrix layer on one side of the alignment mark far away from the substrate base plate.
9. The method for manufacturing an array substrate according to claim 8, wherein the manufacturing of the alignment mark on the substrate comprises:
preparing a first metal layer on the substrate base plate;
and preparing a second metal layer on the first metal layer to obtain the alignment mark.
10. The method for manufacturing an array substrate according to claim 9, wherein the manufacturing of the black matrix layer on the side of the alignment mark away from the substrate comprises:
coating a black material layer on the substrate base plate, wherein the alignment mark is coated by the black material layer;
and patterning the black material layer by taking the position of the alignment mark as a reference to prepare a black matrix layer.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111276053A (en) * | 2020-02-26 | 2020-06-12 | 合肥维信诺科技有限公司 | Display panel manufacturing method, display panel and display device |
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