CN111628728B

CN111628728B - Audio modulation circuit and electronic device

Info

Publication number: CN111628728B
Application number: CN202010437002.2A
Authority: CN
Inventors: 薛蓉
Original assignee: Shanghai Aiwei Integrated Circuit Technology Co ltd
Current assignee: Shanghai Aiwei Integrated Circuit Technology Co ltd
Priority date: 2020-05-21
Filing date: 2020-05-21
Publication date: 2024-02-02
Anticipated expiration: 2040-05-21
Also published as: CN111628728A

Abstract

The application discloses audio modulation circuit and electronic equipment, audio modulation circuit includes: the integrating amplifying module comprises an integrator and a common mode modulator, wherein the integrator is used for carrying out operational amplification on an input differential signal and outputting a first amplified signal and a second amplified signal, and signal level values of the first amplified signal and the second amplified signal are symmetrical about a common mode reference voltage; the common mode modulator is used for outputting a dynamically adjusted common mode reference voltage to the integrator according to the first amplified signal and the second amplified signal; the first comparator and the second comparator are respectively connected to two output ends of the integration amplifying module and are used for comparing the first amplifying signal and the second amplifying signal with the modulating signals respectively and outputting corresponding first pulse width modulating signals and second pulse width modulating signals. The power consumption of the audio modulation circuit is reduced.

Description

Audio modulation circuit and electronic device

Technical Field

The application relates to the technical field of signal modulation, in particular to an audio modulation circuit and electronic equipment.

Background

Class D audio amplifiers are a commonly used high efficiency amplifier for amplifying audio signals, in systems using class D amplifiers, an analog input signal is converted into a series of pulse modulated signals having different pulse widths to drive an audio speaker.

Existing class D audio amplifiers typically have two outputs connected to the positive and negative poles of the load, respectively, which are typically connected to an LC filter structure or a switch control circuit between the positive and negative poles of the load. In both static and dynamic operating states, the output signal causes a large power consumption on the LC filter structure or the switching control circuit.

Along with the increasing use frequency of portable devices such as smart phones for audio playing, how to reduce the power consumption of a class D audio amplifier in a static state and during audio playing, and improve the available time of the electric quantity of the devices are the problems to be solved in the present day.

Disclosure of Invention

In view of this, the present application provides an audio modulation circuit and an electronic device to solve the problem of greater power consumption of the existing audio amplifier.

An audio modulation circuit provided by the application comprises: the integrating amplifying module comprises an integrator and a common mode modulator, wherein the integrator is used for carrying out operational amplification on an input differential signal and outputting a first amplified signal and a second amplified signal, and signal level values of the first amplified signal and the second amplified signal are symmetrical about a common mode reference voltage; the common mode modulator is used for outputting a dynamically adjusted common mode reference voltage to the integrator according to the first amplified signal and the second amplified signal; the first comparator and the second comparator are respectively connected to two output ends of the integration amplifying module and are used for comparing the first amplifying signal and the second amplifying signal with the modulating signals respectively and outputting corresponding first pulse width modulating signals and second pulse width modulating signals.

Optionally, the common mode modulator is configured to compare the first amplified signal and the second amplified signal with a first reference voltage VH and a second reference voltage VL; according to the comparison result, on the basis of presetting a common mode reference voltage VC, adjusting the output common mode reference voltage; wherein VH > VL, and vh+vl=2vc.

Optionally, when the first amplified signal and the second amplified signal are within a range from the second reference voltage VL to the first reference voltage VH, the common mode reference voltage is equal to the preset common mode reference voltage VC; when the first amplified signal is greater than the first reference voltage VH and the second amplified signal is less than the second reference voltage VL, or the second amplified signal is greater than the first reference voltage VH and the first amplified signal is less than the second reference voltage VL, the common mode reference voltage follows the changing direction of the first amplified signal or the second amplified signal to change in the same direction or in opposite directions on the basis of the preset common mode reference voltage VC.

Optionally, when the first amplified signal is greater than the first reference voltage VH and the second amplified signal is less than the second reference voltage VL, or when the second amplified signal is greater than the first reference voltage VH and the first amplified signal is less than the second reference voltage VL, the common mode reference voltage output by the common mode modulator causes only one of the first comparator or the second comparator to output a pulse width modulated signal with pulses.

Optionally, when the integrating amplifying module is located at a static working point, -the common mode modulator is configured to output a preset common mode reference voltage VC, so that the duty cycle of the first pulse width modulation signal and the second pulse width modulation signal is less than 50%.

Optionally, the duty cycle ranges from 10% to 30%.

Optionally, the method further comprises: and the driving module is connected to the output ends of the first comparator and the second comparator and is used for carrying out power amplification on at least the first pulse width modulation signal and the second pulse width modulation signal.

Optionally, the audio signal processing device further comprises a pre-amplifying module, which is used for carrying out differential amplification on the input audio signal and outputting a pair of differential signals to the integrating amplifying module.

Optionally, the integrator includes: the system comprises a common mode feedback unit, a primary amplifying unit and a secondary amplifying unit; the common mode feedback unit is used for being connected to the output end of the common mode modulator, receiving the common mode reference voltage and outputting a common mode signal to the primary amplifying unit; the first-stage amplifying unit is used for receiving the differential signal, taking the common mode signal as a reference, carrying out first-stage amplification on the differential signal and outputting the differential signal to the second-stage amplifying unit; the second-stage amplifying unit is used for carrying out second-stage amplification on the signal output by the first-stage amplifying unit and outputting the first amplified signal and the second amplified signal, and the second-stage amplifying unit is also used for outputting a feedback signal to the common mode feedback unit.

Optionally, the modulation signal is a triangular wave, a sawtooth wave or a sinusoidal half wave.

Optionally, the lowest level value range of the modulation signal is 0-0.3 VDD, and the highest level value range is 0.7 VDD-VDD, wherein VDD is the power supply voltage.

The application also provides an electronic device comprising: an audio modulation circuit as claimed in any preceding claim.

The integral amplifying module of the audio frequency modulating circuit comprises a common mode modulator and an integrator, wherein the common mode modulator is used for adjusting the output common mode reference voltage according to the amplified signal feedback output by the integrator, and the integral of a first amplified signal and a second amplified signal output by the integrator is enabled to change along the same direction along the change direction of the common mode reference voltage through the output signal feedback, so that when the integral amplifying module is compared with the modulating signal, the duty ratio, the pulse width and the modulating mode of the output pulse width modulating signal can be dynamically adjusted, and the modulating mode of the signal can be adjusted at different signal stages according to the requirement on the modulation of the signal at different stages.

Further, the common mode reference voltage outputted by the common mode modulator is VC in a static working state or in a small signal, so that the modulation signal carries out bilateral modulation on the amplified signal outputted by the integrator, the outputted common mode reference voltage is equal to the preset common mode reference voltage, the pulse width modulation signal outputted to two ends of the load is a low duty ratio signal, and the power consumption, the bottom noise under the small signal and the harmonic distortion degree can be reduced. Under a large signal, the common mode reference voltage output by the common mode modulator is increased or reduced, so that the modulation signal carries out unilateral modulation on the amplified signal output by the integrator, only a pulse width modulation signal with a pulse waveform is output to one end of a load, and the other end is continuously high/low level, and the dynamic power consumption of an LC filter structure or a switch control circuit at the load end can be reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1a is a schematic diagram of an audio modulation circuit according to an embodiment of the invention;

fig. 1b is a schematic waveform diagram of an internal signal of an audio modulation circuit in a static operating state according to an embodiment of the present invention;

fig. 2a is a schematic diagram of an audio modulation circuit according to an embodiment of the invention;

FIG. 2b is a schematic diagram showing waveforms of internal signals of an audio modulation circuit according to an embodiment of the present invention under ideal static operation;

fig. 2c is a schematic waveform diagram of an internal signal of an audio modulation circuit according to an embodiment of the present invention in a static operating state;

FIG. 3 is a schematic diagram of an audio modulation circuit according to an embodiment of the present invention;

FIG. 4a is a schematic waveform diagram of an output PWM signal according to an embodiment of the present invention;

fig. 4b is a schematic diagram of a connection structure between an output terminal of an audio modulation circuit and a load according to an embodiment of the invention;

FIG. 4c is a schematic diagram of the driving signals with different duty cycles and the corresponding induced currents at the output end of the circuit in FIG. 4 b;

FIG. 5 is a waveform diagram illustrating adjustment of a common mode reference voltage according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a common mode modulator of an audio modulation circuit according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a common mode modulator of an audio modulation circuit according to an embodiment of the present invention;

FIGS. 8a and 8b are schematic diagrams illustrating signal waveforms during operation of an audio modulation circuit according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of a common mode modulator of an audio modulation circuit according to an embodiment of the present invention;

FIG. 10 is a schematic diagram of waveforms during audio modulation of an audio modulation circuit according to an embodiment of the present invention;

FIG. 11 is a schematic diagram of an audio modulation circuit according to an embodiment of the invention;

FIG. 12 is a schematic diagram of a common mode modulator of an audio modulation circuit according to an embodiment of the present invention;

fig. 13a is a schematic diagram of an operational amplifier in an audio modulation circuit according to an embodiment of the invention;

FIG. 13b is a schematic diagram illustrating an operational amplifier in an audio modulation circuit according to an embodiment of the present invention;

fig. 14 is a flow chart of an audio modulation method according to an embodiment of the invention;

FIG. 15 is a flow chart illustrating the dynamic adjustment of the common mode reference voltage according to an embodiment of the invention.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application. The various embodiments described below and their technical features can be combined with each other without conflict.

Fig. 1a is a schematic diagram of an audio modulation circuit according to an embodiment of the invention.

In this embodiment, the audio modulation circuit is configured to process a pair of differential signals, where the pair of differential signals are respectively coupled to the input terminals of the amplifier Amp1 to perform fully differential amplification, and two output terminals of the amplifier Amp1 are coupled to two input terminals of the operational amplifier Amp2 through the resistor R2. The pair of differential signals output by the operational amplifier Amp2 are respectively passed through the comparator CMP1 and the comparator CMP2 and a modulation signal S _RAMP The modulation is performed to generate pulse width modulation signals DIN1 and DIP1 with both sides modulated, and the pulse width modulation signals are driven by the driving module 12 to output driving signals VOP and VON, wherein the driving signal VOP is used for being applied to the positive electrode of a load, and the driving signal VON is used for being applied to the negative electrode of the load.

Fig. 1b is a signal waveform diagram of the audio modulation circuit shown in fig. 1a in a static operation state.

In a static working state, an input signal is 0, an output signal is a common mode reference voltage in the operational amplifier Amp2 after passing through the operational amplifier Amp2, the common mode reference voltage is usually set to be 0.5VDD, and a triangular wave modulation signal S with the amplitude of 0-VDD passes through a comparator CMP1 and a comparator CMP2 _RAMP After comparison, the output pulse width modulation signals DIN1 and DIP1 are pulse signals having a duty ratio of 50%.

Because the load two ends of the audio modulation circuit, namely the positive electrode and the negative electrode of the loudspeaker, are usually connected with the LC filtering structure or the switch control circuit, when the driving signals VOP and VON are respectively connected to the LC filtering structure or the switch control circuit at the two ends of the load, static current can be generated in the LC filtering structure or the switch power consumption of the switch control circuit is caused, so that the whole audio modulation circuit has larger static power consumption.

Referring to fig. 2a, a block diagram of an audio modulation circuit according to another embodiment of the invention is shown.

In this embodiment, the pulse width modulation signals DIN1 and DIP1 output from the comparators CMP1 and CMP2 are subjected to half-wave modulation by the half-wave modulation module 11, and then the half-wave modulation signals DIN2 and DIP2 are output. The half-wave modulation process carries out half-wave modulation on the pulse width modulation signals DIN1 and DIP1, and the modulation result is as follows: if din1=vdd, DIP 1=0, then din2=vdd, DIP 2=0; if din1=0, dip1=vdd, din2=0, dip2=vdd; if din1=0, dip1=0, then din2=0, dip2=0; if din1=vdd, DIP 1=vdd, then din2=0, DIP 2=0.

Please refer to fig. 2b, which is a schematic diagram of the signal waveform of the audio modulation circuit of fig. 2a in a static operation state under an ideal situation.

In the static working state, the input signal is 0, the half-wave modulation signals DIN2 and DIP2 are 0, and the driving signals VOP and VON are 0, so that the static current of the load end is 0 in the static working state, and the static power consumption is reduced.

However, in practical situations, referring to fig. 2c, since only one side is a high level signal in the half-wave modulation process, there is a strict requirement on signal timing, and at this time, edges of DIP1 and DIN1 cannot be aligned exactly due to different layout of transmission lines and delays of routing, peak glitches are easily generated in the half-wave modulated signals DIN2 and DINP2, and finally burrs are also generated in the driving signals VOP and VON. The voltage VOP-VON on the load is not 0 because the drive signals VOP and VON have different amplitudes and frequencies of glitches. When the frequency of the glitch signal is less than 20KHz, it falls within the frequency band of the audio, which results in the occurrence of noise floors during static operation. In the case of half-wave modulation, the signal on the other side is lost in the half-wave modulation process, so that The Harmonic Distortion (THD) of the half-wave modulated signal is improved, and the problem is more remarkable particularly in the case of small signals.

In the audio modulation circuit of the above embodiment, only one modulation mode is provided for the audio signal, which cannot meet the requirements of low power consumption, signal distortion avoidance and noise reduction. The applicant further proposes a new scheme based on the above embodiment, which can reduce signal distortion and avoid generating noise at the same time of reducing power consumption of the audio modulation circuit.

Fig. 3 is a schematic structural diagram of an audio modulation circuit according to an embodiment of the invention.

In this embodiment, the audio modulation circuit includes: a common mode modulator 310.

The common mode modulator 310 is configured to output a common mode reference voltage VCOM2, and dynamically adjust the common mode reference voltage VCOM2 according to a pair of differential signals with level values symmetrical about the common mode reference voltage VCOM2.

Further, the common mode modulator 310 is configured to adjust a common mode level value of the pair of differential signals according to the output common mode reference voltage VCOM2, and then adjust the common mode reference voltage VCOM2 according to the feedback of the pair of differential signals.

In this embodiment, the audio modulation circuit further includes an integrator, where the integrator includes an operational amplifier 320 and a capacitor CF2 connected between an input and an output of the operational amplifier 320, and the operational amplifier 320 is configured to integrate a pair of input differential signals and output a first amplified signal VON2 and a second amplified signal VOP2, and level values of the first amplified signal VON2 and the second amplified signal VOP2 are symmetrical about a common mode reference voltage VCOM2. The operational amplifier 320 forms a feedback loop structure between the input terminal and the output terminal of the audio modulation circuit, and a resistor RF2 is connected to the loop structure to reduce noise distortion. The feedback loop structure may improve the quality of the output signal, but is not required.

The common mode modulator 310 is configured to output a dynamically adjusted common mode reference voltage VCOM2 to the operational amplifier 320 according to the level values and the trend of the first amplified signal VON2 and the second amplified signal VOP2.

The common mode modulator 310 and the integrator belong to an integrating amplifying module 300, and the integrating amplifying module 300 is configured to perform an integrating operation on the input differential signals VON1 and VOP1, and perform common mode modulation by feeding back output signals (a first amplified signal VON2 and a second amplified signal VOP 2), so as to output the first amplified signal VON2 and the second amplified signal VOP2 that follow the common mode reference voltage VCOM2.

In this embodiment, the audio amplifying circuit further includes a first comparator 331 and a second comparator 332, where the first comparator 331 is configured to amplify the first amplified signal VON2 with the modulated signal S _RAMP And comparing, and outputting a first pulse width modulation signal VON3. The second comparator 332 is configured to compare the second amplified signal VOP2 with the modulated signal S _RAMP And comparing, and outputting a second pulse width modulation signal VOP3.

The audio amplifying circuit further comprises a driving module 340 connected to the output terminals of the first comparator 331 and the second comparator 332, at least for amplifying the power of the first pulse width modulation signal VON3 and the second pulse width modulation signal VOP3, and amplifying the output signal level values of the first comparator 331 and the second comparator 332 to a first driving signal VOP and a second driving signal VON having ideal level values, so as to drive the following load, and applying the load driving signal vout=vop-VON to the load.

The audio modulation circuit further includes a pre-amplifying module, including an amplifier 350, configured to differentially amplify an input pre-audio analog signal, for example, an audio differential signal, and output two audio analog signals, for example, a pair of differential signals VON1 and VOP1, which are respectively coupled to the integrating amplifying module 300 through a resistor R2, and output the first amplified signal VON2 and the second amplified signal VOP2 after performing an integrating operation. The audio differential signal is coupled to the input end of the amplifier 350 through a capacitor C1 and a resistor R1, a resistor RF1 is connected between the output end of the amplifier 350 and the corresponding output end, the resistor RF1 is a variable resistor, and the gain of the amplifier 350 can be adjusted by adjusting the size of the resistor RF 1. In other embodiments, the audio differential signal may also be directly input to the integral amplification module 300 for integral operational amplification.

The modulation signal S _RAMP Typically a triangular wave having a certain frequency, the triangular wave of a certain frequency and level value can be generated as a modulation signal by a waveform generator. In other embodiments, the modulated signal S _RAMP The first amplified signal VON2 and the second amplified signal VOP2 may also be waveform signals having periodic rising and falling slopes, such as a sawtooth wave or a sinusoidal half wave, to perform pulse width modulation. The modulation signal S _RAMP The frequency of (2) is typically 400KHz to 800KHz, much higher than the frequency of the signal to be modulated.

In this embodiment, the first amplified signal VON2 and the second amplified signal VOP2 are respectively connected to the positive input terminals of the first comparator 331 and the second comparator 332, and the modulation signal S _RAMP Is connected to the negative inputs of the first and second comparators 331, 332. In other embodiments, the first amplified signal VON2 and the second amplified signal VOP2 may be connected to the negative input terminals of the first comparator 331 and the second comparator 332, respectively, and the modulation signal S _RAMP Is connected to the positive input of the first and second comparators 331, 332.

The common mode modulator 310 dynamically modulates the common mode reference voltage VCOM2 so that the signals of the first amplified signal VON2 and the second amplified signal VOP2 integrally follow the same direction as the variation direction of the common mode reference voltage VCOM2, thereby being identical to the modulation signal S _RAMP When comparing, the duty ratio, modulation mode, etc. of the output pulse width modulation signal can be dynamically adjusted.

According to the embodiment, the common mode reference voltage VCOM2 is dynamically adjusted according to the first amplified signal VON2 and the second amplified signal VOP2, so that the duty ratio of the pulse width modulation signal can be dynamically adjusted, and the power consumption of the audio amplifier is effectively reduced.

Further, the method comprises the steps of,in the static operation state, the input signal of the operational amplifier 320 is 0. The common mode reference voltage VCOM2 output by the common mode modulator 310 is equal to a preset common mode reference voltage VC, that is, vcom2=vc, and the first amplified signal VON2 and the second amplified signal VOP2 are both equal to the preset common mode reference voltage VC. By setting a suitable preset common mode reference voltage VC, the signal S can be modulated _RAMP The first amplified signal VON2 and the second amplified signal VOP2 are subjected to bilateral modulation, and in a static working state, the first comparator 331 and the second comparator 332 output the same first pulse width modulated signal VON3 and the second pulse width modulated signal VOP3, so that the output load driving signal vout=vop-von=0. The bilateral modulation means that pulse width modulation is performed on the first amplified signal VON2 and the second amplified signal VOP2, and both comparators output pulse signals.

Due to the fact that the bilateral modulation signals are output in the static working state, the problem of burrs possibly caused by line delay is reduced, and due to the fact that the pulse high-level average value of the first driving signal VOP and the pulse high-level average value of the second driving signal VON are larger than 0, even if signal burrs are generated, due to the fact that the burr signals are weaker, the signal to noise ratio of the signals is larger, and the problem of bottom noise can still be improved. In addition, the two paths of audio analog signals input to the operational amplifier 320 may be processed according to the preset common mode reference voltage VC, so that the duty ratio of the first pulse width modulation signal VON3 and the second pulse width modulation signal VOP3 is less than 50% by reducing the signal duty ratio in the static working state, and the power consumption in the static working state is reduced while the noise floor is improved.

In the embodiment of the present invention, the duty ratios of the first pulse width modulation signal VON3 and the second pulse width modulation signal VOP3 may be adjusted by adjusting the magnitude of the preset common mode reference voltage VC. Preferably, the duty cycle may be made smaller than 50%, for example, may be 10% to 30%.

Referring to fig. 4a, waveforms of the first pwm signal VON3 and the second pwm signal VOP3 with a duty cycle of 25% are shown in an embodiment.

In this embodiment, the signal S is modulated _RAMP Vc=0.25 VDD as a triangular wave with a level range of 0 to VDD. Modulated signal S _RAMP Connected to the cathodes of the first and second comparators 331 and 332, when the first and second amplified signals VON2 and VOP2 are located at the modulation signal S _RAMP And outputs a high level when the triangular wave is above. At this time, in the static operation state, von2=vop2=vc, and the duty ratio of the first pulse width modulation signal VON3 and the second pulse width modulation signal VOP3 is 25%.

In other embodiments, due to the modulated signal S _RAMP The formation of (a) is difficult, and the minimum and maximum level values are difficult to control accurately, and in particular, it is difficult to stabilize the minimum and maximum levels at two extreme values of 0 and VDD. Thus, the modulated signal S _RAMP The signal amplitude of (2) may be in other ranges, the lowest level range is 0 to 0.3VDD, and the highest level range is 0.7VDD to VDD. For example, modulating signal S _RAMP The level value of (2) may be in the range of 0.1 VDD-0.9 VDD, 0.2 VDD-0.8 VDD, etc. to increase the modulation signal S _RAMP Accuracy and stability of the waveform.

When the first driving signal VOP and the second driving signal VON are respectively connected to the LC filter structure or the switch control circuit at the load end, compared with the bilateral modulation signal with 50% duty ratio, the static current generated by the first driving signal VOP and the second driving signal VON with small duty ratio is smaller, so that the static power consumption can be reduced.

Referring to fig. 4b, in an embodiment, the output end of the audio modulation circuit is connected to two ends of the dielectric load.

LC filter structures 400 are connected between the output terminals of the first driving signal VOP and the second driving signal VON and the load, respectively. When a signal is input, an induced current Irep is generated in the inductance of the LC filter structure 400.

Please refer to fig. 4c, which is a schematic diagram of the driving signals with 50% duty cycle and 25% duty cycle and the corresponding induced currents at the output end of the circuit. Wherein the dotted line represents a 50% duty cycle and the solid line represents a 25% duty cycle.

Peak of induced current on inductorValue I _rep-peak =duty×pvcc/(2×fs×l), where duty is the duty ratio, pvcc is the high level value of the driving signal VOP or VON, fs is the modulation frequency of the signal, and L is the inductance value.

The small duty cycle drive signal produces a smaller peak current Irep-peak in the LC filter structure and therefore less power consumption.

Further, the common mode modulator 310 is configured to compare the first amplified signal VON2 and the second amplified signal VOP2 with a first reference voltage VH and a second reference voltage VL; according to the comparison result, on the basis of a preset common mode reference voltage VC, the output common mode reference voltage is adjusted; wherein VH > VL, and vh+vl=2vc.

In the dynamic working state, the input signal is not 0, the first amplified signal VON2 and the second amplified signal VOP2 are analog signals, and the signal amplitude is periodically changed. Obviously, in the dynamic operation state, the first amplified signal VON2 and the second amplified signal VOP2 are a pair of differential signals.

Referring to fig. 5, in an embodiment of the invention, the common mode modulator 310 dynamically adjusts the output common mode reference voltage VCOM2 according to the comparison result between the first amplified signal VON2 and the second amplified signal VOP2 and the first reference voltage VH and the second reference voltage VL.

When the first amplified signal VON2 and the second amplified signal VOP2 are within the range from the first reference voltage VH to the second reference voltage VL, that is, VH > VOP2> VL, VH > VON2> VL, the common mode reference voltage VCOM2 is equal to the preset common mode reference voltage VC.

When the first amplified signal VON2 and the second amplified signal VOP2 are located outside the range from the first reference voltage VH to the second reference voltage VL, that is, when VON2 (or VOP 2) > VH and VON2 (or VOP 2) < VL, the common mode reference voltage VCOM2 increases or decreases on the basis of the preset common mode reference voltage VC along with the change of VON2 (or VOP 2), and specifically, may change in the same direction or in the opposite direction along with VON2 (or VOP 2).

Since the first amplified signal VON2 and the second amplified signal VOP2 are signals having level values symmetrical with respect to the common mode reference voltage VCOM2, the initial common mode reference voltage VCOM 2=vc, and vh+vl=2vc. When the first amplified signal VON2 is greater than VH, the second amplified signal VOP2 is naturally smaller than VL, both of which are located outside the VL-VH range. In this embodiment, when the first amplified signal VON2 is smaller than VL and continues to decrease, the common-mode reference voltage VCOM2 gradually increases with the decrease of the first amplified signal VON2 on the basis of VC, and keeps changing in opposite directions with the first amplified signal VON2, that is, keeps changing in the same direction with the second amplified signal VOP 2.

Referring to fig. 5, in other embodiments, the common mode reference voltage VCOM2' may also be changed in the same direction as the first amplified signal VON2, i.e. in the opposite direction to the second amplified signal VOP2, based on the preset common mode reference voltage VC.

The first reference voltage VH and the second reference voltage VL are both in the range of 0-VDD, according to the modulation signal S _RAMP The first reference voltage VH may be greater than, equal to, or less than the modulation signal S _RAMP The second reference voltage VL may be greater than, equal to, or less than the modulation signal S _RAMP Is a minimum of (2).

When the audio modulation circuit is in a dynamic working state, the input signal is an analog signal with continuously fluctuating level value.

When the input signal is a small signal, the levels of the first amplified signal VON2 and the second amplified signal VOP2 are smaller and are within the range of the first reference voltage VH and the second reference voltage VL, and at this time, the common mode reference voltage vcom2=vc, and the first comparator 331 and the second comparator 332 (please refer to fig. 3) can modulate both the first amplified signal VON2 and the second amplified signal VOP2, and output pulse signals respectively. Because the input signal is smaller, the signal amplitude of the first amplified signal VON2 and the second amplified signal VOP2 is smaller, the distance that the first amplified signal VON2 and the second amplified signal VOP2 deviate from the preset common mode reference voltage VC is smaller, therefore, in the small signal state, the duty ratio of the output first pulse width modulation signal VON3 and the duty ratio of the output second pulse width modulation signal VON3 are close to the duty ratio determined by the preset common mode reference voltage VC in the static working state, the duty ratio of the output first driving signal VOP and the output second driving signal VON is smaller, and the power consumption is smaller. And the bilateral modulation mode is adopted under the small signal, so that The Harmonic Distortion (THD) under the small signal can be reduced, and the signal distortion under the small signal is reduced.

When the input signal is a large signal, the first amplified signal VON2 and the second amplified signal VOP2 are located outside the range of VL-VH, the common mode reference voltage VCOM2 is increased or decreased, the first amplified signal VON2 and the second amplified signal VOP2 are moved up or down along with VCOM2, and under the large signal, the amplitude variation of the first amplified signal VON2 and the second amplified signal VOP is increased, if the partial waveform of the first amplified signal VON2 or the second amplified signal VOP2 is located in the modulation signal S _RAMP Above or below the waveform of (c), the corresponding output signal VON3 or VOP3 after the partial waveform passes through the comparator is high or low. If the first amplified signal VON2 (or the second amplified signal VOP 2) is always located in the modulated signal S _RAMP Above or below the waveforms of (2) so that only the first amplified signal VON2 and the second amplified signal VOP2 can be single-side modulated. The single-side modulation means that one of the first amplified signal VON2 and the second amplified signal VOP2 is pulse-width modulated, only one comparator outputs a pulse signal, and the other comparator continuously outputs a high/low level. Under the large signal, the single-side modulation mode is adopted, only a variable pulse signal is output to one end of the load, and the other end is a continuous high/low level signal, so that the power consumption of an LC filter structure or a switch control circuit at the other end can be reduced, and the overall dynamic power consumption is further reduced.

Fig. 6 is a schematic structural diagram of a common mode modulator according to an embodiment of the invention.

In this embodiment, the common mode modulator includes a comparing unit 610, a biasing unit 620, and an output unit 630.

The comparing unit 610 is configured to compare the first amplified signal VON2 and the second amplified signal VOP2 with a first reference voltage VH and a second reference voltage VL, and output a control signal to the biasing unit 620 according to the comparison result.

The bias unit 620 is configured to output a bias current I5 with a corresponding magnitude to the output unit 630 according to the control signal CTRL output by the comparing unit 610. The magnitude of the bias current I5 is controlled by the control signal CTRL output by the comparing unit 610. When the first amplified signal VON2 and the second amplified signal VOP2 are located in the range from VL to VH, the control signal CTRL controls the bias current i5=0; and if the first amplified signal VON2 and the second amplified signal VOP2 are located outside the range from VL to VH, controlling the bias current I5 to be more than 0.

The output unit 630 is configured to adjust the output common mode reference voltage VCOM2 based on the preset common mode reference voltage VC according to the magnitude of the bias current I5. The output unit 630 includes a resistor R1, where a voltage at one end of the resistor R1 is equal to a preset common mode reference voltage VC, and the other end is used for outputting the common mode reference voltage VCOM2. A bias current I5 flows through the resistor R1 such that the common mode reference voltage VCOM2 varies with the bias current I5.

In this embodiment, the bias unit 620 includes a variable bias current source for providing a bias current I5; and a mirror transistor pair formed by transistors M9 and M10, the sources of the transistors M9 and M10 being connected to a power supply voltage VDD, the drain of the transistor M9 being connected to the bias current source, the drain of the transistor M10 being connected to the common mode reference voltage VCOM2 output of the output unit 630.

In fig. 6, as an example, the bias current I5 flows through the transistor M9 and is mirrored to the transistor M10, and flows from the output terminal of the common mode reference voltage VCOM2 to the input terminal of the preset common mode reference voltage VC, taking the current mirror ratio of M9 and M10 as 1:1 as an example, the variation curve of VCOM2 is shown as VCOM2 in fig. 5.

In other embodiments, by adjusting the current direction of the bias current I5, the bias current flows from the input terminal to the output terminal of the resistor R1 (i.e. the output terminal of the common mode reference voltage VCOM 2), and thus vcom2=vc-I5×r1, the variation curve of VCOM2 is shown as VCOM2' in fig. 5.

By adjusting the magnitude of the bias current I5, the magnitude of the output common mode reference voltage VCOM2 can be controlled. In this embodiment, the transistors M9 and M10 are PMOS transistors, and the width to length ratio of the transistors is the same, so that the current flowing through the transistors M9 and M10 is 1:1; in other embodiments, the aspect ratio of the transistors M9 and M10 may be N:1, the current ratio flowing through is N:1.

In other embodiments, the transistors M9 and M10 may be NMOS transistors, and the connection potentials of the respective poles of the transistors and the level of the control signal may be adjusted accordingly.

In this embodiment, the preset common mode reference voltage VC is output to one end of the resistor R1 through an operational amplifier follower 631, and the input preset common mode reference voltage VC is buffered and output through the operational amplifier follower 631, so that the stability of the preset common mode reference voltage VC input to one end of the resistor R1 can be improved. In other embodiments, the preset common mode reference voltage VC may also be connected to the resistor R1 through other buffer structures, or directly connected to the resistor R1.

The output end of the common mode reference voltage VCOM2 is grounded through a capacitor C, and the stability of the output common mode reference voltage VCOM2 can be improved through filtering of the capacitor C.

Fig. 7 is a schematic structural diagram of a common mode modulator according to an embodiment of the invention.

The bias unit comprises transistors M8-M12, wherein the transistors M11 and M12 are a pair of mirror transistors, the transistors M9 and M10 are a pair of mirror transistors, the sources of the transistors M11, M12, M9 and M10 are all connected to a power supply voltage VDD, the drain electrode of the transistor M11 outputs a bias current I1, the bias current I1 is mirrored to the transistor M12, and the drain electrode of the transistor M9 is connected to the drain electrode of the transistor M8.

The comparison unit 610 includes: transistors M1 to M7 and resistors R2 and R3. The resistors R2 and R3 have the same resistance, the transistors M1, M2, M3 and M4 are PMOS with the same size, and the transistors M5 and M6 are a pair of NMOS mirror transistors with the same size. The sources of the transistors M1 and M2 are connected to the drain of the transistor M12 through a resistor R2, and the drain is connected to the drain of the transistor M5; the sources of the transistors M3 and M4 are connected to the drain of the transistor M12 through a resistor R3, the drain is connected to the drain of the transistor M6, and the sources of the transistors M5 and M6 are grounded. The drains of the transistors M3 and M4 are also connected to the drain of the transistor M7, and the source of the transistor M7 is grounded.

The gate of the transistor M2 is used for inputting the first reference voltage VH, the gate of the transistor M1 is used for inputting the second reference voltage VL, the gate of the transistor M3 is used for inputting the second amplified signal VOP2, and the gate of the transistor M4 is used for inputting the first amplified signal VON2.

In this embodiment, the analysis is performed taking the example that the current mirror ratio of each pair of mirror tubes is 1:1.

The bias current I1 is mirrored through M11 to transistor M12 and split into I2 and I3 in the comparison unit 610, the current of transistor M5 is I2, the current of transistor M6 is I4, and the current of transistor M7 is I5, i3=i4+i5.

The transistors M7 and M8 are mirror transistors, and the current passing through the transistors M7 and M8 is i5=i3-I4, and mirrored through the transistor M9 to the transistor M10, so that the current finally flowing through the resistor R1 in the output unit 630 is I5, vcom2=vc+i5×r1=vc+ (I3-I4) ×r1.

Since transistors M5 and M6 are mirror transistors, i4=i2, vcom2=vc+ (I3-I2) R1. I2 is determined by the second reference voltage VL and the first reference voltage VH, I3 is determined by the second amplified signal VOP2 and the first amplified signal VON2, when VOP2> VH, VON2< VL, the current level of the PMOS transistor is determined by the minimum control voltage applied by the gate, since VON2< VL, I3> I2, VCOM2 will vary, VCOM 2=vc+ (I3-I2) ×r1> VC, and as VOP2 increases, VON2 decreases, I3 gradually increases, so that VCOM2 will also continue to increase; conversely, when VOP2> VH, VON2< VL, with the decrease in VOP2, the increase in VON2, VCOM2 becomes smaller; when VL < VOP2< VH, VL < VON2< VH, I3 is equal to the current I4 of the transistor M6, so that i5=0, vcom2=vc. Please refer to the variation curve of VCOM2 in fig. 5 for the whole variation process.

In other embodiments, the current mirror ratio in each mirror tube may be 1: n, the current is correspondingly proportioned. The current mirror ratio can be set as desired by a person skilled in the art.

Please refer to fig. 8a and 8b, which are schematic waveforms in the above embodiments.

Referring to fig. 8a, in this embodiment, the modulation signal S _RAMP For a triangle wave with an amplitude ranging from 0.2VDD to 0.8VDD, the preset common mode reference voltage VC is smaller than 0.5VDD, for example, the preset common mode reference voltage vc=0.35 VDD is set.

In a static operating state, the duty cycle of the output first drive signal VOP and second drive signal VON is 25%, the duty cycle being determined by VC.

In a dynamic working state, an input signal Vin, when the Vin signal is smaller, is positioned in a range from VL to VH, and VCOM2=VC; the first drive signal VOP and the second drive signal VON are small duty ratio signals which are close to 25% of static duty ratio in a bilateral modulation mode, so that the dynamic power consumption of the circuit can be reduced as a whole, and the bottom noise is small. In addition, in the bilateral modulation mode, the harmonic distortion degree under the small signal can be reduced.

When Vin is gradually increased to make VOP2 and VON2 exceed VL-VH range, under the feedback modulation of VOP2 and VON2 to VCOM2, VCOM2 is gradually increased to further increase the amplitudes of VOP2 and VON2 relative to original standard sine wave waveform, and within a certain signal amplitude range, VON2 is always located in the modulation signal S _RAMP The second drive signal VON is not modulated so as to be always at the low level 0, and only the single-side first amplified signal VOP2 is modulated to output the second drive signal VOP having a pulse waveform. Because the second drive signal VON has no level fluctuation in the unilateral modulation mode, the dynamic power consumption on the LC filter structure of the load end or the switch control circuit of the load end can be reduced.

When Vin is gradually reduced, VCOM2 is gradually reduced and restored to VC, a bilateral modulation process is entered, and as Vin is further reduced, VON2 is gradually increased, VOP2 is decreased until VON2 is more than VH, VOP2 is less than VL, VCOM2 is increased again, so that in a certain signal amplitude range, VOP2 is always positioned at a modulation signal S _RAMP Under the triangular wave, a single-side modulation mode is entered, and the first drive signal VOP is always low level, only for VON2, performing single-side modulation, and outputting a second driving signal VON with a pulse waveform. Because the first drive signal VOP has no level fluctuation in the unilateral modulation mode, the dynamic power consumption on the LC filter structure of the load end or the switch control circuit of the load end caused by continuous level turnover can be reduced.

Referring to fig. 8b, waveforms of the output signals are shown in different operation states.

In the static working state, the first driving signal VOP and the second driving signal VON are pulse modulation signals with the duty ratio of 25% in a bilateral modulation mode, and the signals vout=vop-von=0 output to the load.

In a single-side modulation mode of a dynamic working state, when the first driving signal VOP is a pulse width modulation signal, the second driving signal VON is not modulated and is at a low level, and the output signal vout=vop; when the first driving signal VOP is not modulated and is low, the second driving signal VON is a pulse width modulated signal, and the output signal vout= -VON.

In the above embodiment, the common mode reference voltage VCOM2 is increased for the signal modulation process as an example when the first amplified signal VON2 and the second amplified signal VOP2 are out of the VL to VH range.

Fig. 9 is a schematic structural diagram of a common mode modulator according to another embodiment of the invention.

In this embodiment, taking as an example that the common mode reference voltage VCOM2 decreases when the first and second amplified signals VON2 and VON2 exceed the VL to VH ranges.

In this embodiment, the bias unit of the common mode modulator includes transistors M8' to M12', and the comparison unit 610' includes: transistors M1 'to M7' and resistors R2 and R3.

The transistors M1 'to M12' respectively correspond to the transistors M1 to M12 in fig. 7, but the transistor types are opposite, and the connection manner of the power supply voltage VDD and the ground GND is changed correspondingly, so that the current direction in the common mode modulator is opposite to the current direction in fig. 7.

The bias current I5 'flows from the preset common mode reference voltage VC terminal through the resistor R1 to the common mode reference voltage VCOM2 output terminal, so VCOM2' =vc- (I3 '-I2')×r1.

When VOP2 and VON2 are located outside the VL-VH range, I3' > I2', VCOM2 will change and become smaller than VC, and as VOP2 increases, VON2 decreases, I3' gradually increases, so that VCOM2 will become smaller; conversely, as VOP2 decreases, VON2 increases and VCOM2 increases; when VL < VOP2< VH, VL < VON2< VH, I3' =i2 ', so that I5' =0, vcom2=vc. Please refer to the variation curve of VCOM2' in fig. 5 for the whole variation process.

Please refer to fig. 10, which is a schematic diagram of waveform modulation under the common mode modulator shown in fig. 9.

In this embodiment, the modulation signal S _RAMP The magnitude of (2) is 0.2VDD to 0.8VDD, and the preset common mode reference voltage VC is greater than 0.5VDD, for example, vc=0.71 VDD is set. Please refer to fig. 11, which is a schematic diagram illustrating a structure of an audio modulation circuit according to the embodiment. The output ends of the first comparator 331 and the second comparator 332 in the audio modulation circuit of this embodiment are respectively connected to the inverters INV1 and INV2, and the output signals of the first comparator 331 and the second comparator 332 are inverted and then output to the driving module 340.

In the static operating state, the first comparator 331 and the second comparator 332 output pulse signals with a duty ratio of 85%, and pulse width modulation signals with a duty ratio of 15% are formed after inversion.

In the dynamic working state, in the stage where the input signal Vin is small, vcom2=vc is a bilateral modulation mode, and both VOP2 and VON2 are modulated, and a part lower than the triangular wave outputs a high level and a part higher than the triangular wave outputs a low level.

As the input signal Vin increases continuously, VOP2 and VON2 exceed the VL-VH range, the common mode reference voltage VCOM2 decreases continuously, and a single-side modulation mode is entered, and single-side modulation is sequentially performed on VOP2 and VON 2. In the single-side modulation mode, the comparator on the unmodulated signal side continuously outputs a low level, and after the comparator is inverted, the comparator continuously outputs a high level, so that the first driving signal VOP and the second driving signal VON sequentially generate continuous high levels, and the dynamic power consumption on an LC filter structure or a load driving circuit of a load end caused by continuous inversion of the levels can be reduced. In this embodiment, vl=0.56 VDD, vh=0.86 VDD, and vc=0.71 VDD.

In the whole dynamic working process, as the signals are smaller, the VOP and the VON are signals with the duty ratio of about 15%, and the dynamic power consumption of the circuit can be further reduced as a whole.

In another embodiment, S may also be provided _RAMP In order to obtain a triangular wave with an amplitude of 0.2VDD to 0.8VDD, vc=0.29 VDD, vl=0.14 VDD, vh=0.44 VDD, and in a static operation state, the first comparator 331 and the second comparator 332 of the audio modulation circuit directly output a modulation signal with a duty ratio of 15%, without inverting the signal by an inverter.

In another embodiment, the S _RAMP In order to obtain a triangular wave with an amplitude of 0.2VDD to 0.8VDD, vc=0.35 VDD, vh=0.5 VDD, vl=0.2 VDD, and the duty ratio of the output signal is 25% in a static state. Can reasonably set S according to requirements _RAMP Parameters of VH, VC.

Fig. 12 is a schematic structural diagram of a common mode modulator according to another embodiment of the invention.

The bias unit of the common mode modulator of this embodiment includes transistors M212 to M214, wherein transistors M213 and M214 are a pair of mirror transistors, the sources of transistors M213 and M214 are both grounded GND, and the bias current I21 is mirrored to transistor M214.

The comparing unit 1210 includes: transistors M21 to M211 and resistors R2 and R3. The resistors R2 and R3 have the same resistance, the transistors M21, M22, M23, M24, M25, M26, M27, and M28 are NMOS with the same size, and the transistors M29 and M210 are a pair of PMOS mirror transistors with the same size. The sources and drains of the transistors M21 and M22 are connected in series, the sources and drains of the transistors M23 and M24 are connected in series, the sources of the transistors M22 and M24 are connected to the drain of the transistor M214 through a resistor R2, and the drains of the transistors M21 and M23 are connected to the drain of the transistor M29; the sources and drains of the transistors M25 and M26 are connected in series, the sources and drains of the transistors M27 and M28 are connected in series, the sources of the transistors M26 and M28 are connected to the drain of the transistor M214 through a resistor R3, and the drains of the transistors M25 and M27 are connected to the drain of the transistor M210. The sources of the transistors M29, M210, M211 are connected to the power supply voltage VDD. The drain of transistor M210 is also connected to the drain of transistor M211.

The gates of the transistors M25 and M28 are used for inputting the first reference voltage VH, the gates of the transistors M26 and M27 are used for inputting the second reference voltage VL, the gates of the transistors M21 and M24 are used for inputting the second amplified signal VOP2, and the gates of the transistors M22 and M23 are used for inputting the first amplified signal VON2. In this embodiment, the modulation signal S _RAMP The voltage level ranges from 0.2VDD to 0.8VDD, vl=0.14 VDD, vc=0.29 VDD, and vh=0.44 VDD. Since vl=0.14 VDD, the level value is low, and in order to ensure the on of the transistors, the transistors M21 to M28 all require selecting a transistor with a low threshold on.

The output unit 1230 includes a resistor R1 and an operational amplifier follower 1231, and a preset common mode reference voltage VC is applied to one end of the resistor R1 through the operational amplifier follower 1231. The drain of the transistor M212 of the bias unit is connected to the other end of the resistor R1, the bias current I25 is input to the output unit 1230, and the connection end of the transistor M212 and the resistor R1 is used as the output end of the common mode reference voltage VCOM 2.

In this example, the mirror ratio of each pair of mirror tubes is 1:1.

The bias current I21 is mirrored to the transistor M214 through the transistor M213, the bias current I21 is the sum of the currents I22 and I23 in the comparing unit 1210, the current of the transistor M210 is I24, the current of the transistor M211 is I25, i23=i24+i25.

The transistors M211 and M212 are mirror transistors, and the currents through the transistors M211 and M212 are the same, i.25=i23-I24, and the current flowing through the resistor R1 in the output unit 1230 is I25, vcom2=vc+i25×r1=vc+ (I23-I24) R1.

Since the transistors M210, M29 are mirror image transistors, i24=i22, vcom2=vc+ (I23-I22) ×r1. I24 and I22 are determined by the second amplified signal VOP2 and the first amplified signal VON2, and I23 is determined by the second reference voltage VL and the first reference voltage VH. Since transistors M21, M22 are in series, the current through transistors M21, M22 is determined by the smaller of VON2 and VOP2, as is the current through transistors M23, M24 by the smaller of VON2 and VOP2, the current through transistors M25, M26 by the smaller of VH and VL, and the current through transistors M27, M28 by the smaller of VH and VL.

When VOP2> VH and VON2< VL, i22< I23, i25=i23—i22>0, vcom2 changes to become larger than VC, and as VOP2 increases, VON2 decreases, I22 gradually decreases, so that VCOM2 continues to become larger; conversely, as VOP2 decreases, VON2 increases, VCOM2 decreases, and i22=i24, and thus i25=0, vcom2=vc, when VL < VOP2< VH, VL < VON2< VH. Please refer to the variation curve of VCOM2 in fig. 5 for the whole variation process.

The types of the transistors in the common mode modulator, the mirror current ratio between the mirror transistors and the specific circuit structure of the common mode modulator in the embodiments can be adjusted according to the actual circuit requirements; and the change direction of VCOM2 can be reasonably set by modulating the current direction in the output unit.

In the above embodiment, the audio modulation circuit performs bilateral modulation on the signal in the static working state, so that the noise floor can be reduced; and the duty ratio of the output modulation signal is lower, so that the static power consumption of the circuit can be reduced. In a dynamic working state, when a small signal is in a bilateral modulation mode, the duty ratio of the output modulation signal is relatively low, so that the power consumption can be reduced, and The Harmonic Distortion (THD) under the small signal can be reduced; after the signal is enlarged, the single-side modulation mode is entered, only a single-side output pulse signal is generated, and the dynamic power consumption is low.

In the above embodiment, the preset common mode reference voltage VC determines the duty ratio of the output waveform in the static operating state; the second reference voltage VL and the first reference voltage VH determine when to enter the single-side modulation mode from the double-side modulation mode in the dynamic operation state; the resistor R1 in the common mode modulator determines the adjusting force of the common mode modulator on VCOM2 and controls the speed of entering single-side modulation from double-side modulation. The values of the modulation signal, the preset common mode reference voltage VC, the second reference voltage VL, the first reference voltage VH, and the resistor R1 can be reasonably selected by those skilled in the art based on the above embodiments as needed.

Fig. 13a is a schematic diagram of an operational amplifier 320 (fig. 3) in an audio modulation circuit according to an embodiment of the invention.

In this embodiment, the operational amplifier includes the common mode feedback unit 1301, a first stage amplification unit 1302, and a second stage amplification unit 1303.

The common mode feedback unit 1301 is configured to be connected to an output terminal of the common mode modulator 310 (please refer to fig. 3), and configured to receive the common mode reference voltage VCOM2 and output a common mode signal to the first-stage amplifying unit 1302; the primary amplifying unit 1302 is configured to receive the differential signals VON1 and VON2, and output the differential signals after primary amplifying with reference to the common mode signal input by the common mode feedback unit 1301 to the secondary amplifying unit 1303; the second stage amplifying unit 1303 is configured to perform second stage amplification on the signal output by the first stage amplifying unit 1302, and output the first amplified signal VON2 and the second amplified signal VOP2, and the second stage amplifying unit 1303 is further configured to output a feedback signal to the common mode feedback unit 1401, so as to form a loop feedback control.

Referring to fig. 13b, a schematic circuit diagram of an operational amplifier 320 (refer to fig. 3) in an embodiment is shown.

The signals VBP1, VBP2, VBN1, VBN2 are bias voltages inside the operational amplifier 210.

Fig. 13b is merely an example of a configuration of an operational amplifier that may be used, and in other embodiments, those skilled in the art may use an operational amplifier having other different circuit configurations.

The embodiment of the invention also provides electronic equipment such as a mobile phone, a tablet personal computer, a power amplifier and the like, which comprises the audio modulation circuit. Through the audio modulation circuit, the noise and the power consumption of the electronic equipment in a static working state and the signal distortion degree of a small signal can be reduced; and the dynamic power consumption in the dynamic working state can be reduced, so that the tone quality of the electronic equipment and the service life of the battery electric quantity of the electronic equipment are improved.

The embodiment of the invention also provides an audio modulation method.

Fig. 14 is a flowchart of an audio modulation method according to an embodiment of the invention.

In this embodiment, the audio modulation method includes the steps of:

step S1401: and carrying out differential operational amplification on the two paths of audio analog signals, and outputting a first amplified signal and a second amplified signal, wherein the first amplified signal and the second amplified signal are differential signals with a pair of level values symmetrical about a common-mode reference voltage.

The audio differential signal can be output after the differential amplification of the externally input analog audio signal; the digital audio signal inputted from the outside may be digital-to-analog converted, and then the audio differential signal may be outputted by differential amplification. The differential amplification is an optional step, and may also directly perform operational amplification on the analog audio signal.

The operational amplification is an integral operational amplification, and is performed by an integrator to output a first amplified signal and a second amplified signal symmetrical about a common mode reference voltage.

In one embodiment, the common mode reference voltage is VCOM2, the first amplified signal is VON2, the second amplified signal is VOP2, and von2+vop2=2vcom2.

Step S1402: and dynamically adjusting the common mode reference voltage according to the first amplified signal and the second amplified signal.

By dynamically modulating the common-mode reference voltage VCOM2, the signal of the first amplified signal VON2 and the signal of the second amplified signal VOP2 are enabled to integrally follow the change direction of the common-mode reference voltage VCOM2 to change in the same direction, so that the level values of the first amplified signal VON2 and the second amplified signal VOP2 are adjusted, and then the common-mode reference voltage VCOM2 is adjusted in a feedback manner according to the first amplified signal VON2 and the second amplified signal VOP 2.

Step S1403, comparing the first amplified signal and the second amplified signal with the modulation signals, respectively, and outputting a first pulse width modulation signal and a second pulse width modulation signal.

The modulation signal S _RAMP A triangular wave having a certain frequency may be employed, and a triangular wave of a certain frequency and level value may be generated as a modulation signal by a waveform generator. In other embodiments, the modulated signal S _RAMP The first amplified signal VON2 and the second amplified signal VOP2 may also be waveform signals having periodic rising and falling slopes, such as a sawtooth wave or a sinusoidal half wave, to perform pulse width modulation. The modulation signal S _RAMP The frequency of (2) is typically 400KHz to 800KHz, much higher than the frequency of the signal to be modulated.

The first amplified signal VON2 and the adjustment signal S can be compared by two amplifiers, respectively _RAMP And comparing the second amplified signal VOP2 with the adjustment signal S _RAMP When the signal is greater than S _RAMP And outputting a high/low level, thereby outputting a pulse width modulation signal according to the comparison result.

By dynamically modulating the common-mode reference voltage VCOM2, the signals of the first amplified signal VON2 and the second amplified signal VOP2 integrally follow the same direction of the variation direction of the common-mode reference voltage VCOM2, thereby being identical to the modulation signal S _RAMP When comparing, the duty ratio, pulse width, etc. of the output pulse width modulation signal can be dynamically adjusted.

In the static operating state, the input signal is 0. The common mode reference voltage VCOM2 is set equal to the preset common mode reference voltage VC, that is, vcom2=vc, and the first amplified signal VON2 and the second amplified signal VOP2 are both equal to the preset common mode reference voltage VC. By setting a proper preset common mode reference voltage VC, the first amplified signal VON2 and the second amplified signal VOP2 can be subjected to bilateral modulation, so that in a static working state, the same first pulse width modulation signal VON3 and second pulse width modulation signal VOP3 are output, and further, the output load driving signal vout=vop-von=0. The bilateral modulation means that pulse width modulation is performed on the first amplified signal VON2 and the second amplified signal VOP2, and both comparators output pulse signals. Because the differential signals are subjected to bilateral modulation, subtraction operation is not performed between the signals in the circuit, the problem of burrs possibly caused by line delay is reduced, and the pulse high-level average of the first drive signal VOP and the second drive signal VON is larger than 0, even if signal burrs are generated, the signal to noise ratio of the signals is larger due to weaker burr signals, and the problem of bottom noises can still be improved.

The duty ratios of the first pulse width modulation signal VON3 and the second pulse width modulation signal VOP3 in the static working state can be adjusted by adjusting the magnitude of the preset common mode reference voltage VC. Preferably, the duty cycle may be made smaller than 50%, for example, may be 10% to 30%. The static current generated by the low duty cycle is smaller, and the static power consumption can be reduced.

In the dynamic operating state, only one signal can be modulated by the signal S when the first amplified signal VON2 and the second amplified signal VOP2 reach a certain amplitude by adjusting the common mode reference voltage VCOM2 _RAM The modulation enters a unilateral modulation mode, one end outputs a pulse width modulation signal with pulses, and the other end outputs high/low level all the time, so that dynamic power consumption can be reduced.

Step S1404, power amplifying the first pwm signal and the second pwm signal, and outputting the amplified signals.

Amplifying the first pulse width modulation signal and the second pulse width modulation signal to a first driving signal VOP and a second driving signal VON with ideal level values so as to drive a subsequent load, and applying a load driving signal vout=vop-VON to a load terminal.

Fig. 15 is a flowchart of a method for dynamically adjusting a common mode reference voltage according to an embodiment of the invention.

In the above embodiment, in step S1403, the method for dynamically adjusting the common mode reference voltage includes the following steps:

step S1501 compares the first and second amplified signals VON2 and VOP2 with the first and second reference voltages VH and VL.

Wherein the first reference voltage VH is greater than the second reference voltage VL, and vh+vl=2vc.

The comparison result includes the following two cases: VOP2 and VON2 are located in the VL-VH range; VOP2 and VON2 are outside the VL-VH range.

S1502: according to the comparison result, the output common mode reference voltage VCOM2 is adjusted based on the preset common mode reference voltage VC.

When VOP2 and VON2 are in the range from VL to VH, the common mode reference voltage VCOM2 is controlled to be equal to the preset common mode reference voltage VC, i.e. vcom2=vc. In a static working state, von2=vop2=vc, by setting a proper preset common mode reference voltage VC, the modulation signal SRAMP can perform bilateral modulation on the first amplified signal VON2 and the second amplified signal VOP2, and output the same first pulse width modulation signal VON3 and second pulse width modulation signal VOP3, so that the output load driving signal vout=vop-von=0, and the problem of noise floor in the static working state can be improved. Further, the duty ratios of the first pwm signal VON3 and the second pwm signal VOP3 may be adjusted by adjusting the magnitude of VC. Preferably, the duty cycle may be made smaller than 50%, for example, 10% -30%, to reduce the quiescent current.

In a small signal state of the dynamic operation state, when VOP2 and VON2 are also located in the VL to VH range, vcom2=vc, and both VON2 and VOP2 are modulated, and two pulse signals are respectively output. Because the input signal is smaller, the signal amplitude of the first amplified signal VON2 and the second amplified signal VOP2 is smaller, and the distance that the first amplified signal VON2 and the second amplified signal VOP2 deviate from the preset common mode reference voltage VC is smaller, therefore, in the small signal state, the duty ratio of the output first pulse width modulation signal VON3 and the duty ratio of the output second pulse width modulation signal VON3 are close to the duty ratio determined by the preset common mode reference voltage VC in the static working state, the duty ratio is smaller, and the power consumption is smaller. And the bilateral modulation mode is adopted under the small signal, so that The Harmonic Distortion (THD) under the small signal can be reduced, and the signal distortion under the small signal is reduced.

In a large signal state of the dynamic working state, when VOP2 and VON2 are located outside the VL-VH range, the common mode reference voltage VCOM2 is controlled to be in the preset state along with the change of VOP2 or VON2On the basis of the common mode reference voltage VC, the first amplified signal VON2 and the second amplified signal VOP2 move up or down along with VCOM2, and under the large signal, the amplitude variation of the first amplified signal VON2 and the second amplified signal VOP increases, so that part of the waveforms of the first amplified signal VON2 or the second amplified signal VOP2 are always located in the modulation signal S _RAMP Above or below the waveform of (a) cannot receive the modulated signal S _RAMP So that only the first amplified signal VON2 and the second amplified signal VOP2 can be single-side modulated. Therefore, under the large signal, the single-side modulation mode is adopted, only a variable pulse signal is output to one end of the load, and the other end is a continuous high/low level signal, so that the power consumption of an LC filter structure or a switch control circuit at the other end can be reduced, and the overall dynamic power consumption is further reduced.

Specifically, according to the comparison result, on the basis of the preset common mode reference voltage VC, the method for adjusting the output common mode reference voltage includes: providing a resistor, enabling the voltage at one end of the resistor to be equal to a preset common mode reference voltage VC, and obtaining a voltage signal at the other end of the resistor as the common mode reference voltage; and according to the comparison result, adjusting the magnitude of the bias current flowing through the resistor, thereby adjusting the output common mode reference voltage VCOM2.

Further, by controlling the direction in which the bias current flows through the resistor, the direction of variation of the common mode reference voltage VCOM2 can be controlled. When the bias current flows from the common mode reference voltage terminal to the preset common mode reference voltage terminal, vcom2=vc+i×r1; or when the bias current flows from the preset common mode reference voltage terminal to the common mode reference voltage terminal, vcom2=vc-i×r1, I is the bias current, and R1 is the resistor.

The audio modulation method can carry out bilateral modulation on the signal in a static working state, and can reduce the background noise; and the output modulation signal has lower duty ratio, so that the static power consumption can be reduced. In a dynamic working state, when a small signal is generated, bilateral modulation is carried out on the signal, the duty ratio of the output modulation signal is lower, and the power consumption and The Harmonic Distortion (THD) under the small signal can be reduced; after the signal is enlarged, the signal is subjected to unilateral modulation, and only unilateral output pulse signals are output, so that dynamic power consumption is reduced.

That is, the foregoing embodiments are merely examples of the present application, and are not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application, such as the combination of technical features of the embodiments, or direct or indirect application to other related technical fields, are included in the scope of the patent protection of the present application.

Claims

1. An audio modulation circuit, comprising:

the integrating amplifying module comprises an integrator and a common mode modulator, wherein the integrator is used for carrying out operational amplification on an input differential signal and outputting a first amplified signal and a second amplified signal, and signal level values of the first amplified signal and the second amplified signal are symmetrical about a common mode reference voltage; the common mode modulator is used for outputting a dynamically adjusted common mode reference voltage to the integrator according to the first amplified signal and the second amplified signal; the dynamic adjustment process of the common mode reference voltage comprises the following steps: when the first amplified signal and the second amplified signal are within a range from the second reference voltage VL to the first reference voltage VH, the common mode reference voltage is equal to a preset common mode reference voltage VC; when the first amplified signal is greater than the first reference voltage VH and the second amplified signal is less than the second reference voltage VL, or the second amplified signal is greater than the first reference voltage VH and the first amplified signal is less than the second reference voltage VL, the common mode reference voltage changes in the same direction or in opposite directions on the basis of the preset common mode reference voltage VC along with the changing direction of the first amplified signal or the second amplified signal;

The first comparator and the second comparator are respectively connected to two output ends of the integration amplifying module and are used for comparing the first amplifying signal and the second amplifying signal with the modulating signals respectively and outputting corresponding first pulse width modulating signals and second pulse width modulating signals.

2. The audio modulation circuit of claim 1, wherein VH > VL, and vh+vl=2vc.

3. The audio modulation circuit according to claim 1, wherein when the first amplified signal is greater than the first reference voltage VH and the second amplified signal is less than the second reference voltage VL, or the second amplified signal is greater than the first reference voltage VH and the first amplified signal is less than the second reference voltage VL, the common mode reference voltage output by the common mode modulator causes only one of the first comparator and the second comparator to output a pulse width modulated signal having pulses.

4. The audio modulation circuit of claim 1, wherein the common mode modulator is configured to output a preset common mode reference voltage VC when the integrating amplification module is at a quiescent operating point such that the duty cycle of the first and second pulse width modulated signals is less than 50%.

5. The audio modulation circuit of claim 4, wherein the duty cycle is in the range of 10% to 30%.

6. The audio modulation circuit of claim 1, further comprising: and the driving module is connected to the output ends of the first comparator and the second comparator and is used for carrying out power amplification on at least the first pulse width modulation signal and the second pulse width modulation signal.

7. The audio modulation circuit of claim 1, further comprising a pre-amplification module for differentially amplifying an input audio signal and outputting a pair of differential signals to the integral amplification module.

8. The audio modulation circuit of claim 1, wherein the integrator comprises: the system comprises a common mode feedback unit, a primary amplifying unit and a secondary amplifying unit; the common mode feedback unit is used for being connected to the output end of the common mode modulator, receiving the common mode reference voltage and outputting a common mode signal to the primary amplifying unit; the first-stage amplifying unit is used for receiving the differential signal, taking the common mode signal as a reference, carrying out first-stage amplification on the differential signal and outputting the differential signal to the second-stage amplifying unit; the second-stage amplifying unit is used for carrying out second-stage amplification on the signal output by the first-stage amplifying unit and outputting the first amplified signal and the second amplified signal, and the second-stage amplifying unit is also used for outputting a feedback signal to the common mode feedback unit.

9. The audio modulation circuit of claim 1, wherein the modulation signal is a triangular wave, a sawtooth wave, or a sinusoidal half wave.

10. The audio modulation circuit of claim 9, wherein the modulation signal has a minimum level value ranging from 0 to 0.3VDD and a maximum level value ranging from 0.7VDD to VDD, wherein VDD is a power supply voltage.

11. An electronic device, comprising: audio modulation circuit according to any of claims 1 to 10.