CN111613661A - Tunnel junction, preparation method and application thereof - Google Patents
Tunnel junction, preparation method and application thereof Download PDFInfo
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- CN111613661A CN111613661A CN201910135365.8A CN201910135365A CN111613661A CN 111613661 A CN111613661 A CN 111613661A CN 201910135365 A CN201910135365 A CN 201910135365A CN 111613661 A CN111613661 A CN 111613661A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66977—Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects
Abstract
The present invention provides a tunnel junction, comprising: the substrate, and from the bottom up sets gradually on the substrate: the metal-clad laminate comprises a first normal metal layer, an insulating layer and a second normal metal layer, wherein the insulating layer is provided with a concave step structure, and upper and lower films of the step are disconnected. Also provides a preparation method and application of the tunnel junction. The invention provides a new micro-processing process approach for preparing the vacuum tunnel junction. This involves micromachining techniques to prepare the devices: the tunnel junction device prepared by the method comprises ultraviolet lithography, wet etching and coating processes such as magnetron sputtering or electron beam evaporation. The ultraviolet exposure technology and the wet etching technology are matched to obtain a plurality of vacuum tunnel junctions, and the preparation success rate is high.
Description
Technical Field
The invention belongs to the field of condensed state physics, and particularly relates to a tunnel junction, and a preparation method and application thereof.
Background
The two layers of normal metal are separated by a thin oxide layer barrier to form a normal metal-insulating layer-normal metal tunnel junction, which is abbreviated as an N-I-N junction. When the insulating layer is thin enough, there is a certain chance that electrons will tunnel through this barrier. In 1962, josephson found that when two superconductors were separated by a thin insulating layer to form a superconducting tunnel junction S-I-S, when the voltage at the two ends of the junction was zero, there was a tunnel current formed by a superconducting electron pair in the junction, which is called the dc josephson effect, and when the dc voltage at the two ends of the junction was not zero, there was an alternating superconducting current whose frequency was proportional to the voltage at the two ends of the junction, which is called the ac josephson effect. The S-I-S junction is often referred to as a josephson junction. The existing methods for fabricating tunnel junctions can be broadly classified into two types, vertical triple-layer junctions and planar junctions. The three-layer junction process is usually to prepare three layers of thin films by sputtering or evaporation, and then to form small junction regions and electrodes by using a multi-step micro-processing technique, wherein the micro-processing steps are shown in fig. 1. In recent years, a method for preparing Al/AlOx/Al Josephson junctions by inclined evaporation of a Dolan microbridge suspended mask is newly developed, and a micromachining process is shown in figure 2. The three-layer vertical junction process has the advantages that the thickness of the middle insulating layer is easy to control accurately, and parameters such as critical current, junction resistance and the like of the junction can be controlled accurately by accurately controlling the thickness of the middle Al layer, the oxidation time and the like, so that the required tunnel junction is obtained. The three-layer film structure has the disadvantage that the selection of the material of the intermediate insulating layer is relatively narrow, and only the aluminum oxide film is a relatively mature insulating layer material at present. Another limitation of this method is that due to the high local temperature during the preparation of the sample by magnetron sputtering or electron beam evaporation, many nano materials that are not high temperature resistant cannot be used as the intermediate layer, thereby affecting the research on the tunneling property thereof.
The process of the planar junction can also be roughly divided into two types, one is to prepare a film strip by photoetching or argon ion etching, and then to etch a nano-micro bridge by using ion beams to realize weak connection, as shown in fig. 3. The difficulty of this process is the size control of the nanobridge. Compared with a tunnel junction made of an insulating material, the distance that electrons can tunnel in vacuum is smaller, and the existing micromachining technology is difficult to accurately control the size below 10 nm. Therefore, only weak connections formed by the nano-microbridge can be generally prepared by applying the ion beam etching technology. Another more mature method of fabricating tunnel junctions was proposed by Park et al 1999. They firstly apply electron beam lithography and shadow evaporation technology to prepare gold nanowires, then the two ends of the gold nanowires are connected with large current, the gold nanowires can be burnt off when the large current is connected due to stress and other reasons, and gaps of about 1nm are obtained on the nanowires, as shown in fig. 4. The single electron tunneling curve of the CdSe nanoparticles is measured by placing the CdSe nanoparticles in the gap. The method can accurately control the width of the gap by accurately controlling the magnitude of the applied current, thereby controlling the junction resistance and having certain repeatability. The method has the advantages that the vacuum tunneling junction is really realized, various nano materials can be implanted into the gap, and the tunneling property of the nano materials can be researched. However, this method has a limitation in that the material capable of fabricating such a tunnel junction is very limited. Because only the gold nanowires can be evaporated under a large current to cause the breakage of the nanowires. This limits the method to only produce N-I-N tunnel junctions with gold as the electrode.
Disclosure of Invention
Therefore, the present invention aims to overcome the defects in the prior art and provide a tunnel junction, and a preparation method and application thereof.
To achieve the above object, a first aspect of the present invention provides a tunnel junction comprising:
the substrate, and from the bottom up sets gradually on the substrate:
a first normal metal layer disposed on the substrate;
the insulating layer is arranged on the normal metal layer; and
the second normal metal layer is arranged on the insulating layer;
the insulating layer is provided with a concave step structure, and the upper film and the lower film of the step are disconnected.
The tunnel junction according to the first aspect of the present invention, wherein the substrate material is selected from one or more of: silicon, sapphire; preferably silicon;
the thickness of the substrate is 300 to 500 micrometers, preferably 400 micrometers.
The tunnel junction according to the first aspect of the present invention, wherein the first and second normal metal layers are the same material;
preferably, the normal metal layer material is selected from one or more of the following: nb, Au, NbTiN, Al; preferably Nb or Au; and/or
The thickness of the normal metal layer is 50-100 nanometers, preferably 80 nanometers.
The tunnel junction according to the first aspect of the present invention, wherein the insulating layer material is selected from one or more of: In-Ga-Zn-O, ZnO; preferably In-Ga-Zn-O; and/or
The thickness of the insulating layer is 100-500 nm, preferably 300 nm.
The tunnel junction according to the first aspect of the present invention, wherein a nanoparticle material is implanted in the gap formed by the recess;
preferably, the nanoparticle material is selected from one or more of: mn12，Mn3，Fe3O4(ii) a And/or
The particle size of the nano-particle material is 2-50 nanometers, preferably 2 nanometers.
A second aspect of the present invention provides the method for preparing a tunnel junction according to the first aspect, the method comprising the steps of:
(1) gluing: spin-coating photoresist on a substrate with an insulating layer and baking;
(2) photoetching: carrying out ultraviolet photoetching, developing and fixing on the sample in the step (1) after exposure;
(3) wet etching: carrying out wet etching on the sample obtained in the step (2) by using etching liquid;
(4) removing the photoresist: soaking the sample obtained in the step (3) in an organic solution to remove the surface photoresist;
(5) alignment: repeating the steps (1) and (2), exposing the pattern by using an overlay technology in the step (2), and developing and fixing;
(6) sputtering a film: and (5) sputtering a normal metal layer in the sample obtained in the step (5) by using a magnetron sputtering method, and removing photoresist from the sputtered sample to obtain the tunnel junction.
The production method according to the second aspect of the present invention, wherein the method further comprises:
(7) implanting a nanoparticle material: forming a single-layer nanoparticle film by an LB film forming method, and physically adsorbing the film into a gap.
The preparation method according to the second aspect of the present invention, wherein in the step (3), the etching solution is hydrochloric acid, phosphoric acid, nitric acid, hydrofluoric acid; preferably hydrochloric acid; and/or
The mass percentage concentration of the etching liquid is 5-20%, preferably 8-15%, and most preferably 10%.
A third aspect of the invention provides a tunnel junction device comprising a tunnel junction according to the first aspect.
A fourth aspect of the invention provides the use of a tunnel junction according to the first aspect or prepared according to the method of the second aspect in the preparation of a superconducting quantum device; preferably, the quantum device is a tunnel junction device.
The invention relates to a manufacturing process for manufacturing a tunnel junction, which utilizes ultraviolet lithography and wet etching technology and magnetron sputtering coating technology to prepare a vacuum tunnel junction. The exposure, development and etching parameters are the key to the fabrication.
Aiming at the current technical situation of preparing tunnel junctions and vacuum tunnel junctions in the prior art, the invention applies the ultraviolet lithography and the wet etching technology to obtain insulating material steps with sunken edges on a substrate, magnetron sputtering is carried out on the steps for the last time to prepare metal micro-strips, and nano-sized gaps are obtained at the steps by adjusting the height of the steps and the thickness of a metal film, so as to realize vacuum tunneling.
The specific implementation steps are shown in fig. 5. The present invention uses indium-potassium-zinc-oxygen (In-Ga-Zn-O (a-IGZO)) as an insulating material of the first layer. The a-IGZO material is a novel amorphous oxide semiconductor, and the conductivity of the material can be adjusted in a large range by adjusting the proportion of oxygen during preparation, so that a series of indium-potassium-zinc-oxygen thin film materials with conductive behaviors from metallic to insulating are realized. The indium-potassium-zinc-oxygen film avoids height fluctuation caused by the grain boundary of a polycrystalline material due to the amorphous growth, has a smoother surface and very low roughness, and is suitable for being used as a substrate material. Another advantage of the inga-zn-o material for this method is that it can be wet etched. The indium-potassium-zinc-oxygen can be wet etched with a 10% dilute hydrochloric acid solution. The wet etching is to soak the etched material in the etching solution for etching by utilizing the chemical reaction between the material and the etching solution, and the required part is protected by glue, thereby obtaining the required pattern. Due to the poor anisotropic performance of chemical reaction, the wet etching has lateral undercutting, and the width of the lateral etching is close to the depth of the vertical etching. The invention utilizes the characteristic of wet etching, and forms an inward concave step on the pattern by carrying out wet etching on the indium-potassium-zinc-oxide thin film material and utilizing transverse underetching. The inward-concave step can well ensure that the upper film and the lower film of the step are disconnected when the step is coated with a film. The connecting resistance of the upper film and the lower film of the step is controlled by adjusting the height of the step and the depth of the transverse underetching, so that the vacuum tunnel junction is realized. The vacuum gap formed by the concave part can also be implanted with various nano-particle materials, so that the research on the tunneling properties of the materials is realized. The tunnel junction prepared by the method can almost randomly select materials at two ends of the junction, and the existing materials capable of being made into films can be used as the materials at the two ends of the junction, so that the method can be used for preparing N-I-N junctions and S-I-S junctions. Meanwhile, the film thickness can be accurately controlled by the film coating technology, so the success rate of preparing the vacuum gap below 10nm is greatly improved.
The method is a process combining ultraviolet exposure, wet etching and magnetron sputtering coating. Coating S1813 glue on a sheet with an In-GA-Zn-O film, carrying out ultraviolet exposure according to a defined pattern, and dissolving the S1813 glue In an exposed area after development; the remaining glue serves as a mask for wet etching, the sample forms an inverted cone due to the isotropic lateral undercutting of the wet etching during etching, and the upper layer part covered by the glue surface is kept intact. And obtaining the Josephson junction through the steps of whirl coating, exposure, sputtering and the like.
The method of the present invention may have, but is not limited to, the following beneficial effects:
the invention provides a new micro-processing process approach for preparing the vacuum tunnel junction. This involves micromachining techniques to prepare the devices: the tunnel junction device prepared by the method comprises ultraviolet lithography, wet etching and coating processes such as magnetron sputtering or electron beam evaporation. The ultraviolet exposure technology and the wet etching technology are matched to obtain a plurality of vacuum tunnel junctions, and the preparation success rate is high.
Drawings
Embodiments of the invention are described in detail below with reference to the attached drawing figures, wherein:
FIG. 1 shows a prior art process for the preparation of Nb/AlOx/Nb Josephson junctions.
Fig. 2 shows a schematic diagram of the process steps of preparing Al/AlOx/Al josephson junction by oblique evaporation of a Dolan microbridge suspended mask in the prior art, wherein fig. 2a shows the structure of glue, fig. 2b shows the structure of electron beam exposure pattern, fig. 2c shows the suspended mask obtained after development, fig. 2d shows the oblique angle evaporation of the first layer of aluminum film, fig. 2e shows the oxidation of the surface of the first layer of aluminum film, fig. 2f shows the evaporation of the second layer of aluminum film with an opposite angle, and fig. 2g shows the removal of glue.
Fig. 3 shows a planar junction process of preparing a thin film into a film strip by photolithography or argon ion etching and then using an ion beam to etch a nano-microbridge to realize weak connection in the prior art, wherein fig. 3a shows the film strip by photolithography and Ar ion etching, and fig. 3b shows the nano-microbridge josephson junction etched by the ion beam.
Fig. 4 shows a field emission scanning electron microscope image of gold nanowires by a process of preparing planar junctions from gold nanowires in the prior art, the gold nanowires being composed of a 10nm thin gold film and a 90nm thick gold film, wherein fig. 4a shows the field emission scanning electron microscope image before the gold nanowires are broken, and fig. 4b shows the field emission scanning electron microscope image after the gold nanowires are broken.
Fig. 5 shows a cross-sectional view of the inventive method, process flow (first stage) to prepare a recessed insulating substrate step.
FIG. 6 shows a top view of the inventive method, the resulting recessed IGZO film and superconducting Nb layer pattern.
Fig. 7 shows a cross-sectional view of a Nb-I-Nb josephson junction prepared in example 1 of the present invention.
Fig. 8 shows a Nb-I-Nb junction resistance temperature curve, in which fig. 8a shows a resistance temperature curve of the entire temperature region and fig. 8b shows a resistance temperature curve of the low temperature region.
FIG. 9a shows the Nb-I-Nb junction IV curve and FIG. 9b shows the dV/dI curve.
Detailed Description
The invention is further illustrated by the following specific examples, which, however, are to be construed as merely illustrative, and not limitative of the remainder of the disclosure in any way whatsoever.
This section generally describes the materials used in the testing of the present invention, as well as the testing methods. Although many materials and methods of operation are known in the art for the purpose of carrying out the invention, the invention is nevertheless described herein in as detail as possible. It will be apparent to those skilled in the art that the materials and methods of operation used in the present invention are well within the skill of the art, provided that they are not specifically illustrated.
The reagents and instrumentation used in the following examples are as follows:
reagent:
a-IGZO material, HCl solution, available from Beijing, Inc., national pharmaceutical group chemical reagents; s1813 glue, positive photoresist developer, purchased from Suzhou research.
The instrument comprises the following steps:
UV lithography system, available from Karl Suss, Germany, model MA 6;
magnetron sputtering apparatus, available from Shenyang PolyZhi, model JZCK-360S.
Example 1
This example serves to illustrate the process of the invention.
The steps and related parameters are shown In FIG. 5, In-Ga-Zn-O (a-IGZO)) is used as the first layer of insulating material, the thickness of the InGaZnO insulating layer is 300nm, the insulating layer with the thickness of 300nm is sputtered by a reactive magnetron sputtering method, and the background vacuum is 1 × 10-4Pa, sputtering power 80W, sputtering pressure 1Pa, argon-oxygen ratio 60: 3, time 24 minutes.
1. Gluing: an ultraviolet photoresist S1813 glue is used. The glue was spread evenly on the sheet using a bench spin coater at 4000 rpm. Then baked on a hot plate at 115 ℃ for 2 minutes.
2. Using an ultraviolet lithography system, the mask is 2inch, the exposure pattern is shown in fig. 6a, and the developing uses a positive photoresist developer, the developing time is 33s, and the fixing time is 30s using deionized water.
3. The wet etching uses an HCl solution, the etching rate varies according to the temperature and the concentration of the HCl solution, and a dilute hydrochloric acid solution with a concentration of 10% is generally used. The actual etch depth varies with temperature, and the etch time is typically increased to achieve lateral undercutting. The InGaZnO film with the thickness of 300nm is soaked in 10% hydrochloric acid etching solution for 3 minutes, the etching depth is 300nm, and the soaking time is prolonged to 10 minutes, so that the transverse underetching can be realized.
4. Removing the photoresist: and soaking in acetone solution for at least 10 min to remove the UV photoresist on the upper surface of the IGZO.
5. The steps 1 and 2 are repeated, and the reverse pattern shown in the pattern 2b is exposed by the overlay technique in step 2, and development and fixing are performed in the same manner. So that the place needing film plating leaks out and other places are protected by glue. And placing the overlay mark in the center of the exposure pattern, and then realizing overlay by utilizing the zooming of the magnification factor of an electron microscope. The registration precision is less than 2 μm, and the process requirements of submicron device preparation can be met.
6. Sputtering Nb superconducting film with certain thickness by using a magnetron sputtering coating method, wherein the back vacuum of magnetron sputtering is 5 x 10-8Pa, sputtering gas is Ar gas with the purity of 99.99 percent, the sputtering pressure is 0.35Pa, the power of a direct current sputtering source is 120w, the sputtering rate is about 30nm/min, the lift-off technology is applied, glue at the place without the film is removed, acetone solution is adopted for ultrasonic maintenance for 60s in ultrasonic wave with the power of 40w, then the glue is soaked for 1h, taken out and cleaned by isopropanol solution, and the nitrogen is blown dry. A graph as shown in fig. 6b is obtained.
Fig. 7 shows a cross-sectional view of the Nb-I-Nb josephson junction prepared in this example fig. 8 shows a resistance temperature curve of the Nb-I-Nb junction, in which fig. 8a shows a resistance temperature curve of the entire temperature zone and fig. 8b shows a resistance temperature curve of the low temperature zone. FIG. 9 shows the Nb-I-Nb junction IV curve and dV/dI curve.
Example 2
This example serves to illustrate the process of the invention.
The method changes the Nb film plated by magnetron sputtering in the sixth step in the example 1 into an Au film plated to prepare the N-I-N junction, and the Au film plating condition and the background vacuum are 5 x 10-7Pa, the sputtering gas is Ar gas with the purity of 99.99 percent, the sputtering pressure is 0.35Pa, the power of a direct current sputtering source is 80w, and the sputtering rate is about 30 nm/min.
Example 3
This example serves to illustrate the process of the invention.
The method comprises the steps of forming a single-layer film on nanoparticles in water by using a Langmuir-Blodgett film forming method, immersing the prepared device in water with the nanoparticles, standing for 10 minutes, removing the device, and blowing dry with dry nitrogen to enable a part of the nanoparticles to enter a vacuum gap, so that the research on the tunneling property of the material is realized. The nanoparticles not in the gap do not influence the measurement result because they do not participate in the conduction. Mn with a particle size of 3nm12the-tBuAc nanoparticles were formed into monolayer films in water by a Langmuir-Blodgett film-forming method by first weighing 0.025gMn12The crystals of-tBuAc were placed in a 50mL clean beaker and 20mL of anhydrous ether was added until the crystals were completely dissolved. And (2) injecting 400mL of deionized water into a 500mL beaker, sucking the ether solution containing Mn12-tBuAc and dripping 1 drop of the ether solution onto the surface of the deionized water by using a suction pipe, waiting for 20 minutes until Mn12-tBuAc molecules are completely spread and stabilized on the water surface, immersing the device prepared in the embodiment 1 or 2 into water with nanoparticles, standing for 10 minutes, removing the device, and drying by using dry nitrogen to enable part of the nanoparticles to enter a vacuum gap.
Although the present invention has been described to a certain extent, it is apparent that appropriate changes in the respective conditions may be made without departing from the spirit and scope of the present invention. It is to be understood that the invention is not limited to the described embodiments, but is to be accorded the scope consistent with the claims, including equivalents of each element described.
Claims (10)
1. A tunnel junction, comprising:
the substrate, and from the bottom up sets gradually on the substrate:
a first normal metal layer disposed on the substrate;
the insulating layer is arranged on the normal metal layer; and
the second normal metal layer is arranged on the insulating layer;
the insulating layer is provided with a concave step structure, and the upper film and the lower film of the step are disconnected.
2. The tunnel junction of claim 1 wherein the substrate material is selected from silicon or sapphire, preferably silicon; and/or
The thickness of the substrate is 300 to 500 micrometers, preferably 400 micrometers.
3. The tunnel junction of claim 1 or 2 wherein the first and second normal metal layers are of the same material;
preferably, the normal metal layer material is selected from one or more of the following: nb, Au, NbTiN, Al; preferably Nb or Au; and/or
The thickness of the normal metal layer is 50-100 nanometers, preferably 80 nanometers.
4. The tunnel junction of any of claims 1 to 3 wherein the insulating layer material is selected from one or more of: In-Ga-Zn-O, ZnO; preferably In-Ga-Zn-O; and/or
The thickness of the insulating layer is 100-500 nm, preferably 300 nm.
5. The tunnel junction of any one of claims 1-4 wherein a nanoparticle material is implanted in the gap formed by the recess;
preferably, the nanoparticle material is selected from one or more of: mn12，Mn3，Fe3O4(ii) a And/or
The particle size of the nano-particle material is 2-50 nanometers, preferably 2 nanometers.
6. The method of preparing a tunnel junction according to any of claims 1 to 5, characterized in that it comprises the steps of:
(1) gluing: spin-coating photoresist on a substrate with an insulating layer and baking;
(2) photoetching: carrying out ultraviolet photoetching, developing and fixing on the sample in the step (1) after exposure;
(3) wet etching: carrying out wet etching on the sample obtained in the step (2) by using etching liquid;
(4) removing the photoresist: soaking the sample obtained in the step (3) in an organic solution to remove the surface photoresist;
(5) alignment: repeating the steps (1) and (2), exposing the pattern by using an overlay technology in the step (2), and developing and fixing;
(6) sputtering a film: and (5) sputtering a normal metal layer in the sample obtained in the step (5) by using a magnetron sputtering method, and removing photoresist from the sputtered sample to obtain the tunnel junction.
7. The method of claim 6, further comprising:
(7) implanting a nanoparticle material: forming a single-layer nanoparticle film by an LB film forming method, and physically adsorbing the film into a gap.
8. The method according to claim 6 or 7, wherein in the step (3), the etching solution is selected from one or more of the following: hydrochloric acid, phosphoric acid, nitric acid, hydrofluoric acid; preferably hydrochloric acid; and/or
The mass percentage concentration of the etching liquid is 5-20%, preferably 8-15%, and most preferably 10%.
9. A tunnel junction device, characterized in that it comprises a tunnel junction according to any of claims 1 to 5.
10. Use of a tunnel junction according to any one of claims 1 to 5 or a tunnel junction produced by a method according to any one of claims 6 to 8 for the production of a superconducting quantum device; preferably, the quantum device is a tunnel junction device.
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