CN111613634B - Display panel - Google Patents

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Publication number
CN111613634B
CN111613634B CN202010455906.8A CN202010455906A CN111613634B CN 111613634 B CN111613634 B CN 111613634B CN 202010455906 A CN202010455906 A CN 202010455906A CN 111613634 B CN111613634 B CN 111613634B
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layer
metal
metal layer
transparent protective
groove
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CN111613634A (en
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罗传宝
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention provides a display panel and a preparation method thereof, wherein the display panel comprises: the LED comprises a substrate, a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer, a transparent protective layer, a second insulating layer and an LED. Through setting up the transparent protective layer of protection at the second metal level, prevent in subsequent processing procedure, the high temperature arouses the thermal oxidation of second metal level, can avoid the copper acid etching of second metal level to form "cap peak" structure, can not lead to the rupture membrane of follow-up rete preparation. In the process of preparing the display panel, the transparent protective layer of the first groove is etched by oxalic acid wet medicament to form the first groove, which ensures that the solder paste transferred into the first groove by the LED contacts with the second metal layer.

Description

Display panel
Technical Field
The invention relates to the technical field of Mini-LED or Micro-LED display, in particular to a display panel.
Background
The MiniLED/MicroLED (MLED) display technology enters an accelerated development stage in the last two years and is applied to the application field of small and medium-sized displays. Compared to organic light-Emitting Diode (OLED) screens, MLED displays exhibit better performance in terms of cost, contrast, high brightness, and thin profile. In the MLED display technology, the backboard technology is used as a key technology, and optimization of the backboard technology is important to the MLED display technology. The conventional BCE (i.e., back channel etched structure) thin film transistor back plate technology adopts a 6mask (6 mask) technology, wherein the metal layer (M2) uses a molybdenum/copper laminated structure, a part of the metal layer 11 is used as a binding layer of the LED, and ITO is used as a COF binding protection layer.
In the process of manufacturing the structure shown in fig. 1, the passivation layer (PV) film forming temperature is increased due to the low process temperature, and the subsequent thermal annealing process of the PV process is easy to cause oxidation or even falling of the copper electrode in the metal layer (M2), which affects the electrode conductivity. In addition, the required heat treatment temperature of semiconductors varies with the material composition, and a high temperature process is required for partial oxides, which is not well compatible.
Generally, in order to adapt to high temperature process, a three-layer laminated structure is adopted as the metal layer (M2), the structure is an upper barrier layer/a metal wire/a lower barrier layer, and metal (molybdenum, titanium or nickel) or alloy is adopted as the material of the upper barrier layer of M2, so that the metal-titanium-nickel composite material has good thermal stability and strong oxidation resistance, and can improve the process effect. However, the bonding force between the upper barrier layer and the solder paste required by bonding of the LED is poor, and the bonding effect is affected. In addition, the three-layer laminated structure has high requirements on wet medicament selection during etching, and the metal wire is easy to have an etching morphology (marked by 12 in figure 2) such as a cap edge, so that the subsequent PV or ITO coverage is affected, and the risk of film breakage is high.
Therefore, there is an urgent need to provide a display panel and a method of manufacturing the same, which can effectively protect the metal layer (M2) and prevent the metal lines from being easily formed in a "cap rim" structure.
Disclosure of Invention
An object of the present invention is to provide a display panel, which can effectively protect the metal layer (M2) and prevent the metal lines from being prone to "capping".
Specifically, the present invention provides a display panel comprising: a substrate; the first metal layer is arranged on the substrate; the first insulating layer is arranged on the substrate and the first metal layer; a semiconductor layer disposed on the first insulating layer; the second metal layer is arranged on the first insulating layer and the semiconductor layer; the transparent protective layer is arranged on the second metal layer; and the second insulating layer is arranged on the substrate and coats the transparent protective layer, the second metal layer and the semiconductor layer.
Further, the second insulating layer comprises a first groove and a second groove; the first groove extends downwards to the upper surface of the second metal layer; the second groove extends downwards to the upper surface of the transparent protective layer.
Further, the display panel further includes: and the LED is arranged in the first groove and connected with the second metal layer.
Further, the display panel further includes: and the corresponding part of the transparent protective layer in the second groove is a COF binding layer.
Further, the first metal layer comprises a grid electrode, the grid electrode is arranged below the semiconductor layer, and the second metal layer comprises a source electrode and a drain electrode; the grid electrode, the semiconductor layer and the source-drain electrode form a thin film transistor.
Further, the first metal layer includes a peripheral trace; the second metal layer includes a COF-binding trace, which connects the peripheral trace.
Further, the second metal layer comprises an LED binding wire connected with the LED.
Further, the material of the transparent protective layer comprises indium tin oxide.
Another object of the present invention is to provide a method for manufacturing a display panel, including: providing a substrate; forming a first metal layer on the substrate; forming a first insulating layer on the substrate and coating the first metal layer; forming a semiconductor layer on the first insulating layer; depositing a layer of metal material on the first insulating layer and coating the semiconductor layer; depositing a layer of transparent conductive material on the metal material; etching patterns on the transparent conductive material and the metal material to obtain a second metal layer and a transparent protective layer; forming a second insulating layer on the substrate and coating the second metal layer and the semiconductor layer; a first groove and a second groove are respectively formed in the surface of the second insulating layer, the first groove extends downwards to the upper surface of the second metal layer, and the second groove extends downwards to the upper surface of the transparent protective layer; an LED is bonded into the first recess.
Further, in the step of etching the transparent conductive material and the metal material together to obtain the second metal layer and the transparent protective layer, the method specifically includes: and etching the transparent conductive material by using oxalic acid chemical agent to obtain an etching pattern of the transparent protective layer by using the transparent protective layer as the metal material, and etching the metal material by using H2O2 chemical agent to obtain the second metal layer.
The beneficial effects of the invention are as follows: the invention provides a display panel and a preparation method thereof, wherein a protective transparent protective layer is arranged on a second metal layer, so that the thermal oxidation of the second metal layer caused by high temperature in the subsequent process is prevented, the 'hat brim' structure formed by copper acid etching of the second metal layer can be avoided, and the film breakage in the subsequent film preparation is avoided. In the process of preparing the display panel, the transparent protective layer of the first groove is etched by oxalic acid wet medicament to form the first groove, which ensures that the solder paste transferred into the first groove by the LED contacts with the second metal layer.
Drawings
The technical solution and other advantageous effects of the present invention will be made apparent by the following detailed description of the specific embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic structural view of a display panel portion of the prior art.
Fig. 2 is a schematic view of a prior art wire "bill" structure.
Fig. 3 is a schematic structural diagram of a display panel according to the present invention.
Fig. 4 is a schematic structural diagram of a display panel in step S1 to step S2 provided by the present invention.
Fig. 5 is a schematic structural diagram of the display panel in step S3 according to the present invention.
Fig. 6 is a schematic structural diagram of the display panel in step S4 according to the present invention.
Fig. 7 is a schematic structural diagram of a display panel in step S5 to step S6 according to the present invention.
Fig. 8 is a schematic structural diagram of the display panel in step S7 according to the present invention.
Fig. 9 is a schematic structural diagram of the display panel in step S7 according to the present invention.
Fig. 10 is a schematic structural diagram of a display panel in step S8 to step S9 according to the present invention.
Fig. 11 is a schematic structural diagram of a display panel after the completion of step S9 according to the present invention.
A display panel 100;
a substrate 101; a first metal layer 102; a first insulating layer 103;
a semiconductor layer 104; a second metal layer 105; a transparent protective layer 107;
a second insulating layer 106; an LED108; a first recess 1061;
a second recess 1062; a gate 1021; a source-drain electrode 1052;
peripheral trace 1022; COF bond wire 1051; LED binding trace 1053.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the present disclosure, components and arrangements of specific examples are described below. They are, of course, merely examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.
As shown in fig. 3, the present invention provides a display panel 100 including: a substrate 101, a first metal layer 102, a first insulating layer 103, a semiconductor layer 104, a second metal layer 105, a transparent protective layer 107, a second insulating layer 106, and an LED108.
The substrate 101 is a transparent substrate.
The first metal layer 102 is disposed on the substrate 101, and has a thickness of 5000-8000 angstroms.
The first insulating layer 103 is disposed on the substrate 101 and the first metal layer 102. The film structure of the first insulating layer 103 includes a single layer structure and a stacked layer structure, and the material of the single layer structure includes SiOx or SiNx. The thickness of the first insulating layer 103 is 2000-5000 angstroms.
The laminated structure includes: siOx/SiNx stack, siNx/SiOx stack, siOx/SiNx/SiNO stack, siOx/SiNx/Al2O3 stack or SiOx/SiNx/AlN stack.
The semiconductor layer 104 is provided on the first insulating layer 103. The material comprises semiconductor metal oxides such as IGZO, IGZTO, IZO, IGTO and the like.
The second metal layer 105 is disposed on the first insulating layer 103 and the semiconductor layer 104, and has a thickness of 5000-8000 angstroms.
In one embodiment, the second metal layer 105 is a three-layer stacked structure. The second metal layer 105 includes: an upper barrier layer, a metal trace, and a lower barrier layer. The metal wire is arranged between the upper barrier layer and the lower barrier layer, the material of the metal wire comprises copper, and the material of the upper barrier layer and the material of the lower barrier layer comprise molybdenum, titanium, nickel and alloy.
In one embodiment, the second metal layer 105 is a dual-layer stack structure, and includes an upper barrier layer and a metal trace, where a material of the upper barrier layer includes molybdenum or a molybdenum-titanium alloy. The material of the metal wire comprises copper.
The transparent protective layer 107 is disposed on the second metal layer 105, and has a thickness of 400-1000 angstroms. The material of the transparent protective layer 107 includes indium tin oxide. Namely transparent ITO.
The transparent protection layer 107 is used for protecting the second metal layer 105, preventing the second metal layer 105 from being thermally oxidized due to high temperature in the subsequent process, so that a "cap peak" structure formed by etching the second metal layer 105 with copper acid can be avoided, and film breakage in the subsequent film preparation can not be caused.
The second insulating layer 106 is disposed on the substrate 101 and encapsulates the transparent protective layer 107, the second metal layer 105, and the semiconductor layer 104. The second insulating layer 106 has a thickness of 2000-5000 angstroms.
The film structure of the second insulating layer 106 includes a single layer structure and a stacked layer structure, and the material of the single layer structure includes SiOx or SiNx.
The laminated structure includes: siOx/SiNx stack, siNx/SiOx stack, siOx/SiNx/SiNO stack, siOx/SiNx/Al2O3 stack or SiOx/SiNx/AlN stack.
The second insulating layer 106 includes a first recess 1061 and a second recess 1062.
The first recess 1061 extends downward to the upper surface of the second metal layer 105; the second groove 1062 extends downward to the upper surface of the transparent protective layer 107.
The LED108 is disposed in the first recess 1061 and connects the second metal layer 105.
The corresponding portion of the transparent protective layer 107 in the second groove 1062 is a COF binding layer 1072.
The invention provides the protective transparent protective layer 107 on the second metal layer 105, so as to prevent the contact with ITO from being influenced by the damage of dry etching gas to the Cu surface when the second insulating layer 106 is perforated.
The first metal layer 102 includes a gate 1021, and the gate 1021 is disposed under the semiconductor layer 104.
The second metal layer 105 includes a source-drain electrode 1052, and the transparent protective layer 107 is also disposed on the source-drain electrode 1052.
The gate 1021, the semiconductor layer 104, and the source-drain electrode 1052 form a thin film transistor that functions as a switch.
In other embodiments, the thin film transistor is a bottom gate thin film transistor, and the material of the semiconductor layer 104 includes polysilicon.
The first metal layer 102 further includes a peripheral trace 1022, and the peripheral trace 1022 is patterned together with the gate 1021.
The second metal layer 105 further includes COF bonding wires 1051 and LED108 bonding wires, and the COF bonding wires 1051 are connected to the peripheral wires 1022.
The LED108 is disposed in the first recess 1061, and the LED bonding wire 1053 connects the LED108.
The present invention provides a display panel 100, by disposing a protective transparent protective layer 107 on a second metal layer 105, thermal oxidation of the second metal layer 105 caused by high temperature in a subsequent process is prevented, so that a "cap peak" structure formed by copper acid etching of the second metal layer 105 can be avoided, and film breakage in subsequent film preparation is not caused.
The invention also provides a preparation method of the display panel, which comprises the following steps S1 to S9.
S1, as shown in FIG. 4, a substrate 101 and an LED108 are provided, wherein the LED108 comprises a Mini-LED or a Micro-LED.
S2, with continued reference to FIG. 4, a first metal layer 102 is formed on the substrate 101, and has a thickness of 5000-8000 angstroms.
Specifically, a metal material is deposited on the substrate 101 by physical vapor deposition, and the first metal layer 102 is patterned by a photolithography process, where the first metal layer 102 includes the gate 1021 and the peripheral trace 1022. The metallic material includes a single-layer molybdenum structure or a double-layer molybdenum/copper structure.
S3, as shown in FIG. 5, a first insulating layer 103 is formed on the substrate 101 and covers the first metal layer 102, and a connection hole is formed on the first insulating layer 103.
The film structure of the first insulating layer 103 includes a single layer structure and a stacked layer structure, and the material of the single layer structure includes SiOx or SiNx.
The laminated structure includes: siOx/SiNx stack, siNx/SiOx stack, siOx/SiNx/SiNO stack, siOx/SiNx/Al2O3 stack or SiOx/SiNx/AlN stack.
S4, as shown in fig. 6, a semiconductor layer 104 is formed on the first insulating layer 103.
Specifically, by depositing IGZO, IGZTO, IZO or IGTO semiconductor metal oxide and thermally annealing. The semiconductor layer 104 channel of the thin film transistor is formed through a photolithography process. Among them, oxalic acid-based chemical solution can be used as etchant.
S5, as shown in FIG. 7, a metal material 112 with a thickness of 5000-8000A is deposited on the first insulating layer 103 and encapsulates the semiconductor layer 104.
In one embodiment, the metal material 112 is a three-layer stacked structure. The second metal layer 105 includes: an upper barrier layer, a metal trace, and a lower barrier layer. The metal wire is arranged between the upper barrier layer and the lower barrier layer, the material of the metal wire comprises copper, and the material of the upper barrier layer and the material of the lower barrier layer comprise molybdenum, titanium, nickel and alloy.
In one embodiment, the metal material 112 is a dual-layer stack structure, including an upper barrier layer and a metal trace, and the material of the upper barrier layer includes molybdenum or molybdenum-titanium alloy. The material of the metal wire comprises copper.
S6, continuing to refer to FIG. 7, a layer of 400-1000 angstroms of transparent conductive material 113 is deposited on the metal material.
The transparent conductive material 113 includes indium tin oxide.
And S7, etching the transparent conductive material and the metal material together to obtain a second metal layer 105 and a transparent protective layer 107.
In the step of etching the transparent conductive material and the metal material together to obtain the second metal layer 105 and the transparent protection layer 107, specifically, the method includes.
S701, as shown in fig. 8, the transparent protective layer 107 is obtained by etching the transparent conductive material with an oxalic acid chemical agent.
The transparent protective layer 107 includes a COF bonding layer 1072, a source-drain pattern 1071, and an LED bonding pattern 1073.
S702, as shown in fig. 9, etching the metal material using the transparent protective layer 107 as an etching pattern of the metal material, and etching the metal material using an H2O 2-based chemical to obtain the second metal layer 105.
The second metal layer 105 includes a source-drain electrode 1052, a COF bonding wire 1051, and an LED bonding wire 1053. The COF binding wire 1051 is connected to the peripheral wire 1022 or COF pad terminal through a connection hole.
The transparent protection layer 107 is disposed on the source-drain electrode 1052, the COF bonding wire 1051 and the LED bonding wire 1053, and is used for protecting the second metal layer 105, so as to prevent the second metal layer 105 from being thermally oxidized due to high temperature in the subsequent process.
This step forms and patterns the transparent protective layer 107 along with the second metal layer 105, and avoids the formation of a "cap peak" structure by Cu acid etching of the three-layer laminated structure of the second metal layer 105, thereby causing breakage of the film layer.
S8, as shown in FIG. 10, a second insulating layer 106 of 2000-5000 angstroms is formed on the substrate 101 and covers the second metal layer and the semiconductor layer 104.
The film structure of the second insulating layer 106 includes a single layer structure and a stacked layer structure, and the material of the single layer structure includes SiOx or SiNx.
The laminated structure includes: siOx/SiNx stack, siNx/SiOx stack, siOx/SiNx/SiNO stack, siOx/SiNx/Al2O3 stack or SiOx/SiNx/AlN stack.
The laminated structure of the invention is A/B laminated, namely, A material is used as one layer, B material is used as the other layer, and B layer is arranged above A layer.
S9, with continued reference to fig. 10, a first groove 1061 and a second groove are formed in the surface of the second insulating layer 106, where the first groove 1061 extends downward to the upper surface of the second metal layer, and the second groove 1062 extends downward to the upper surface of the transparent protective layer 107.
Specifically, the first grooves 1061 and the second grooves are formed by performing a hole-forming process by dry etching the passivation layer with a strong oxidizing gas such as F-series; the transparent protective layer 107 of the first recess 1061 is etched by oxalic acid wet chemical to form the first recess 1061 (as shown in fig. 11), which ensures that the solder paste transferred into the first recess 1061 by the LED108 contacts the second metal layer. Wherein the solder paste is printed on the bottom of the LED108.
The transparent protective layer 107 in the first groove 1061 is etched by adopting a wet medicament, so that the final solder paste of the LED108 can be tightly combined with Cu of the second metal layer, and meanwhile, plasma (plasma) physical bombardment and etching product residues are avoided due to wet etching, so that the overlarge contact resistance between the anode and cathode of the LED chip and Cu can be avoided.
S10, binding the LEDs into the first grooves.
Specifically, the LED is subjected to the processes of solder paste hard brushing, transferring the LED chip into the first groove 1061, reflow soldering and the like, and finally the Mini-LED or Micro-LED display panel is formed.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of the above examples is only for aiding in understanding the technical solution of the present invention and its core ideas; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (6)

1. A display panel, comprising:
a substrate;
the first metal layer is arranged on the substrate and comprises a peripheral wiring;
the first insulating layer is arranged on the substrate and the first metal layer;
a semiconductor layer disposed on the first insulating layer;
the second metal layer is arranged on the first insulating layer and the semiconductor layer, a lower barrier layer, a metal wire and an upper barrier layer are sequentially stacked on the second metal layer, the material of the metal wire comprises copper, the second metal layer comprises a COF binding wire, and the COF binding wire is connected with the peripheral wire;
the transparent protective layer is arranged on the second metal layer;
the second insulating layer is arranged on the substrate and coats the transparent protective layer, the second metal layer and the semiconductor layer, the second insulating layer comprises a first groove and a second groove, the first groove is formed by etching the second insulating layer and etching the transparent protective layer by oxalic acid wet method medicament, the first groove extends downwards to the upper surface of the second metal layer, the second groove extends downwards to the upper surface of the transparent protective layer, the corresponding part of the transparent protective layer in the second groove is a COF binding layer, and the COF binding layer is arranged on the COF binding wire;
and the LED is arranged in the first groove, and the solder paste of the LED is connected with the second metal layer.
2. The display panel of claim 1, wherein the first metal layer comprises a gate electrode disposed under the semiconductor layer;
the second metal layer comprises a source electrode and a drain electrode;
the grid electrode, the semiconductor layer and the source-drain electrode form a thin film transistor.
3. The display panel of claim 1, wherein the second metal layer includes LED bonding traces connecting the LEDs.
4. The display panel of claim 1, wherein the material of the transparent protective layer comprises indium tin oxide.
5. A method for manufacturing a display panel, comprising:
providing a substrate;
forming a first metal layer on the substrate;
patterning the first metal layer to form a peripheral wiring;
forming a first insulating layer on the substrate and coating the first metal layer;
forming a semiconductor layer on the first insulating layer;
sequentially depositing a lower barrier layer, a metal wire and an upper barrier layer on the first insulating layer, and coating the semiconductor layer to form a second metal layer;
depositing a transparent protective layer on the metal material;
etching the transparent protective layer and the second metal layer together to form a COF binding wire, wherein the COF binding wire is connected with the peripheral wire;
forming a second insulating layer on the substrate and coating the second metal layer and the semiconductor layer;
a first groove and a second groove are respectively formed in the surface of the second insulating layer, the first groove is formed by etching the second insulating layer and oxalic acid wet method medicament etching the transparent protective layer through dry method, the first groove extends downwards to the upper surface of the second metal layer, the second groove extends downwards to the upper surface of the transparent protective layer, and a part of the transparent protective layer corresponding to the second groove is a COF binding layer;
and transferring the LED with the bottom printed with the solder paste into the first concave groove, wherein the solder paste is contacted with the second metal layer.
6. The method of manufacturing a display panel according to claim 5, wherein the step of etching the transparent conductive material and the metal material together to obtain the second metal layer and the transparent protective layer comprises:
etching the transparent conductive material with oxalic acid chemical agent to obtain the transparent protective layer
And etching the metal material by using the transparent protective layer as an etching pattern of the metal material and adopting an H2O2 series medicament to obtain the second metal layer.
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