CN111613634A - Display panel - Google Patents

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Publication number
CN111613634A
CN111613634A CN202010455906.8A CN202010455906A CN111613634A CN 111613634 A CN111613634 A CN 111613634A CN 202010455906 A CN202010455906 A CN 202010455906A CN 111613634 A CN111613634 A CN 111613634A
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Prior art keywords
layer
metal
metal layer
display panel
groove
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CN202010455906.8A
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CN111613634B (en
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罗传宝
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention provides a display panel and a preparation method thereof, wherein the display panel comprises: the LED comprises a substrate, a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer, a transparent protective layer, a second insulating layer and an LED. The transparent protective layer for protection is arranged on the second metal layer, so that thermal oxidation of the second metal layer caused by high temperature in subsequent processing procedures is prevented, a cap peak structure formed by etching of the copper acid of the second metal layer can be avoided, and film breaking in subsequent film preparation can not be caused. In the manufacturing process of the display panel, the transparent protective layer of the first groove is etched by oxalic acid series wet method medicament to form the first groove, which ensures that the tin paste transferred to the first groove of the LED is contacted with the second metal layer.

Description

Display panel
Technical Field
The invention relates to the technical field of Mini-LED or Micro-LED display, in particular to a display panel.
Background
The MiniLED/MicroLED (MLED) display technology enters an accelerated development stage in the last two years and is applied to the application field of small and medium-sized displays. Compared to an organic light-Emitting Diode (OLED) screen, the MLED display exhibits better performance in terms of cost, contrast, high brightness, and thin profile. In the MLED display technology, the backplane technology is taken as a key technology, and the optimized backplane technology is crucial to the MLED display technology. The conventional BCE (i.e., back channel etch type structure) thin film transistor backplane technology employs a 6mask (6 mask) technology, in which a molybdenum/copper stack structure is used as a metal layer (M2), a portion of the metal layer 11 is used as a bonding layer of an LED, and ITO is used as a COF bonding protection layer.
In the fabrication of the structure shown in fig. 1, due to the low process temperature, the film formation temperature of the passivation layer (PV) is increased and the thermal annealing process of the subsequent PV process is liable to cause the copper electrode in the metal layer (M2) to be oxidized and even fall off, thereby affecting the conductivity of the electrode. In addition, the heat treatment temperature required for semiconductors varies with the material composition, and a high temperature process is required for part of the oxide, which is not well compatible with this technique.
Generally, in order to adapt to a high temperature process, a three-layer stacked structure is adopted as a metal layer (M2), the structure of the metal layer is an upper barrier layer/a metal wire/a lower barrier layer, and a metal (molybdenum, titanium or nickel) or an alloy is used as a material of the upper barrier layer of M2, although the material has good thermal stability and strong oxidation resistance, the process effect can be improved. However, the bonding force of the solder paste required by bonding the upper blocking layer and the LED is poor, and the bonding effect is influenced. In addition, the three-layer laminated structure has high requirements on wet chemical agent selection during etching, the metal wire is easy to have etching appearances (marked by 12 in figure 2) such as 'cap edge' and the like, the subsequent PV or ITO covering is influenced, and the risk of film breaking is high.
Therefore, it is desirable to provide a display panel and a method for manufacturing the same, which can effectively protect the metal layer (M2) and prevent the metal lines from being prone to "hat-brim".
Disclosure of Invention
An object of the present invention is to provide a display panel, which can effectively protect a metal layer (M2) and prevent a metal line from being prone to a 'cap edge'.
Specifically, the present invention provides a display panel comprising: a substrate; the first metal layer is arranged on the substrate; the first insulating layer is arranged on the substrate and the second insulating layer; a semiconductor layer disposed on the first insulating layer; a second metal layer disposed on the first insulating layer and the semiconductor layer; the transparent protective layer is arranged on the second metal layer; and the second insulating layer is arranged on the substrate and coats the transparent protective layer, the second metal layer and the semiconductor layer.
Further, the second insulating layer includes a first groove and a second groove; the first groove extends downwards to the upper surface of the second metal layer; the second groove extends downwards to the upper surface of the transparent protection layer.
Further, the display panel further includes: and the LED is arranged in the first groove and connected with the second metal layer.
Further, the display panel further includes: and the corresponding part of the transparent protection layer in the second groove is a COF binding layer.
Further, the first metal layer comprises a gate, the gate is arranged below the semiconductor layer, and the second metal layer comprises a source drain electrode; the grid, the semiconductor layer and the source and drain electrodes form a thin film transistor.
Further, the first metal layer comprises a peripheral trace; the second metal layer comprises COF binding wires which are connected with the peripheral wires.
Further, the second metal layer includes an LED bonding trace connected to the LED.
Further, the material of the transparent protective layer comprises indium tin oxide.
Another object of the present invention is to provide a method for manufacturing a display panel, including: providing a substrate; forming a first metal layer on the substrate; forming a first insulating layer on the substrate and coating the first metal layer; forming a semiconductor layer on the first insulating layer; depositing a layer of metal material on the first insulating layer and coating the semiconductor layer; depositing a layer of transparent conductive material on the metal material; etching the patterns of the transparent conductive material and the metal material together to obtain a second metal layer and a transparent protective layer; forming a second insulating layer on the substrate and coating the second metal layer and the semiconductor layer; a first groove and a second groove are respectively formed in the surface of the second insulating layer, the first groove extends downwards to the upper surface of the second metal layer, and the second groove extends downwards to the upper surface of the transparent protective layer; binding an LED into the first recess.
Further, in the step of etching the pattern together with the transparent conductive material and the metal material to obtain the second metal layer and the transparent protection layer, the method specifically includes: and etching the transparent conductive material by using an oxalic acid chemical agent to obtain the transparent protective layer, using the transparent protective layer as an etching pattern of the metal material, and etching the metal material by using an H2O2 chemical agent to obtain the second metal layer.
The invention has the beneficial effects that: the invention provides a display panel and a preparation method thereof.A protective transparent protective layer is arranged on a second metal layer, so that thermal oxidation of the second metal layer caused by high temperature in subsequent processing procedures is prevented, a cap peak structure formed by etching of copper acid of the second metal layer can be avoided, and film breaking in subsequent film preparation can not be caused. In the manufacturing process of the display panel, the transparent protective layer of the first groove is etched by oxalic acid series wet method medicament to form the first groove, which ensures that the tin paste transferred to the first groove of the LED is contacted with the second metal layer.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic structural view of a display panel section of the related art.
Fig. 2 is a schematic view of a metal wire "visor" according to the prior art.
Fig. 3 is a schematic structural view of a display panel portion provided by the present invention.
Fig. 4 is a schematic structural diagram of the display panel in steps S1 to S2 according to the present invention.
Fig. 5 is a schematic structural diagram of the display panel in step S3 provided in the present invention.
Fig. 6 is a schematic structural diagram of the display panel in step S4 provided in the present invention.
Fig. 7 is a schematic structural diagram of the display panel in steps S5 to S6 according to the present invention.
Fig. 8 is a schematic structural diagram of the display panel in step S7 provided in the present invention.
Fig. 9 is a schematic structural diagram of the display panel in step S7 provided in the present invention.
Fig. 10 is a schematic structural diagram of the display panel in steps S8 to S9 according to the present invention.
Fig. 11 is a schematic structural diagram of the display panel after step S9 is completed.
A display panel 100;
a substrate 101; a first metal layer 102; a first insulating layer 103;
a semiconductor layer 104; a second metal layer 105; a transparent protective layer 107;
a second insulating layer 106; an LED 108; the first groove 1061;
a second groove 1062; a gate 1021; source-drain electrodes 1052;
peripheral routing 1022; a COF bonding trace 1051; the LED is bound to the trace 1053.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
As shown in fig. 3, the present invention provides a display panel 100, comprising: a substrate 101, a first metal layer 102, a first insulating layer 103, a semiconductor layer 104, a second metal layer 105, a transparent protective layer 107, a second insulating layer 106, and an LED 108.
The substrate 101 is a transparent substrate.
The first metal layer 102 is disposed on the substrate 101 and has a thickness of 8000A and 5000-.
The first insulating layer 103 is disposed on the substrate 101 and the second insulating layer 106. The film structure of the first insulating layer 103 includes a single-layer structure and a stacked structure, and the single-layer structure includes SiOx or SiNx. The thickness of the first insulating layer 103 is 2000-5000 angstroms.
The laminated structure includes: SiOx/SiNx laminated layers, SiNx/SiOx laminated layers, SiOx/SiNx/SiNO laminated layers, SiOx/SiNx/Al2O3 laminated layers or SiOx/SiNx/AlN laminated layers.
The semiconductor layer 104 is provided on the first insulating layer 103. The material includes semiconductor metal oxides such as IGZO, IGZTO, IZO, IGTO and the like.
The second metal layer 105 is disposed on the first insulating layer 103 and the semiconductor layer 104, and has a thickness of 5000-.
In one embodiment, the second metal layer 105 is a three-layer stacked structure. The second metal layer 105 includes: the device comprises an upper barrier layer, a metal wire and a lower barrier layer. The metal wiring is arranged between the upper barrier layer and the lower barrier layer, the material of the metal wiring comprises copper, and the material of the upper barrier layer and the material of the lower barrier layer comprise molybdenum, titanium, nickel and alloy.
In an embodiment, the second metal layer 105 is a double-layer stacked structure, and includes an upper barrier layer and a metal trace, where the material of the upper barrier layer includes molybdenum or a molybdenum-titanium alloy. The material of the metal trace comprises copper.
The transparent passivation layer 107 is disposed on the second metal layer 105 and has a thickness of 400-1000 angstroms. The material of the transparent protection layer 107 includes indium tin oxide. Namely the transparent ITO is obtained.
The transparent protection layer 107 is used to protect the second metal layer 105, prevent thermal oxidation of the second metal layer 105 caused by high temperature in subsequent processes, and prevent a 'brim' structure formed by etching the second metal layer 105 with a copper acid from causing film break in subsequent film preparation.
The second insulating layer 106 is disposed on the substrate 101 and covers the transparent protection layer 107, the second metal layer 105 and the semiconductor layer 104. The thickness of the second insulating layer 106 is 2000-5000 angstroms.
The film structure of the second insulating layer 106 includes a single-layer structure and a stacked-layer structure, and the single-layer structure includes SiOx or SiNx.
The laminated structure includes: SiOx/SiNx laminated layers, SiNx/SiOx laminated layers, SiOx/SiNx/SiNO laminated layers, SiOx/SiNx/Al2O3 laminated layers or SiOx/SiNx/AlN laminated layers.
The second insulating layer 106 includes a first groove 1061 and a second groove 1062.
The first groove 1061 extends downward to the upper surface of the second metal layer 105; the second groove 1062 extends downward to the upper surface of the transparent protective layer 107.
The LED108 is disposed in the first groove 1061 and connected to the second metal layer 105.
A corresponding portion of the transparent protection layer 107 in the second groove 1062 is a COF bonding layer 1072.
The invention arranges a protective transparent protective layer 107 on the second metal layer 105 to prevent the contact with ITO from being influenced by the damage of dry etching gas to the Cu surface when the second insulating layer 106 is opened.
The first metal layer 102 includes a gate 1021, and the gate 1021 is disposed below the semiconductor layer 104.
The second metal layer 105 includes source and drain electrodes 1052, and the transparent protection layer 107 is also disposed on the source and drain electrodes 1052.
The gate 1021, the semiconductor layer 104 and the source/drain electrodes 1052 form a thin film transistor, which is used as a switch.
In other embodiments, the thin film transistor is a bottom gate thin film transistor, and the material of the semiconductor layer 104 includes polysilicon.
The first metal layer 102 further includes a peripheral trace 1022, and the peripheral trace 1022 is patterned and prepared together with the gate 1021.
The second metal layer 105 further includes a COF bonding trace 1051 and an LED108 bonding trace, and the COF bonding trace 1051 is connected to the peripheral trace 1022.
The LED108 is disposed in the first recess 1061, and the LED binding wire 1053 is connected to the LED 108.
The invention provides a display panel 100, which prevents thermal oxidation of a second metal layer 105 caused by high temperature in subsequent processes by arranging a protective transparent protective layer 107 on the second metal layer 105, and can avoid a 'brim' structure formed by etching the copper acid of the second metal layer 105, and can not cause film breaking in subsequent film preparation.
The invention also provides a preparation method of the display panel, which comprises the following steps of S1-S9.
S1, as shown in FIG. 4, a substrate 101 and LEDs 108 are provided, wherein the LEDs 108 include Mini-LEDs or Micro-LEDs.
S2, with continued reference to fig. 4, a first metal layer 102 is formed on the substrate 101, with a thickness of 8000 a and 5000 a.
Specifically, a metal material is deposited on the substrate 101 by physical vapor sputtering, and a first metal layer 102 is formed by patterning through a photolithography process, where the first metal layer 102 includes a gate 1021 and a peripheral trace 1022. The metal material includes a single-layer molybdenum structure or a double-layer molybdenum/copper structure.
S3, as shown in fig. 5, a first insulating layer 103 is formed on the substrate 101 and covers the first metal layer 102, and a connection hole is opened on the first insulating layer 103.
The film structure of the first insulating layer 103 includes a single-layer structure and a stacked structure, and the single-layer structure includes SiOx or SiNx.
The laminated structure includes: SiOx/SiNx laminated layers, SiNx/SiOx laminated layers, SiOx/SiNx/SiNO laminated layers, SiOx/SiNx/Al2O3 laminated layers or SiOx/SiNx/AlN laminated layers.
S4, as shown in fig. 6, a semiconductor layer 104 is formed on the first insulating layer 103.
Specifically, by depositing an IGZO, IGZTO, IZO or IGTO semiconductive metal oxide, and thermally annealing. A semiconductor layer 104 channel of the thin film transistor is formed through a photolithography process. Among them, oxalic acid-based chemical solutions can be used as an etchant.
S5, as shown in FIG. 7, a metal material 112 with a thickness of 5000-.
In one embodiment, the metal material 112 is a three-layer stacked structure. The second metal layer 105 includes: the device comprises an upper barrier layer, a metal wire and a lower barrier layer. The metal wiring is arranged between the upper barrier layer and the lower barrier layer, the material of the metal wiring comprises copper, and the material of the upper barrier layer and the material of the lower barrier layer comprise molybdenum, titanium, nickel and alloy.
In an embodiment, the metal material 112 is a double-layer stacked structure, and includes an upper barrier layer and a metal trace, where the material of the upper barrier layer includes molybdenum or a molybdenum-titanium alloy. The material of the metal trace comprises copper.
S6, with continued reference to fig. 7, a layer of 400-1000 angstroms of transparent conductive material 113 is deposited on the metal material.
The transparent conductive material 113 includes indium tin oxide.
And S7, etching the transparent conductive material and the metal material together to obtain the second metal layer 105 and the transparent protection layer 107.
The step of etching the pattern of the transparent conductive material and the metal material together to obtain the second metal layer 105 and the transparent protection layer 107 specifically includes.
S701, as shown in fig. 8, the transparent protective layer 107 is obtained by etching the transparent conductive material with an oxalic acid chemical.
The transparent protection layer 107 includes a COF binding layer 1072, a source/drain pattern 1071, and an LED binding pattern 1073.
S702, as shown in fig. 9, the second metal layer 105 is obtained by etching the metal material using the transparent protection layer 107 as the etching pattern of the metal material and using H2O 2-based chemical.
The second metal layer 105 includes a source/drain electrode 1052, a COF routing line 1051, and an LED routing line 1053. The COF bonding trace 1051 is connected to the peripheral trace 1022 or the COF pad terminal through a connection hole.
The transparent protection layer 107 is disposed on the source/drain electrode 1052, the COF bonding wire 1051, and the LED bonding wire 1053, and is used to protect the second metal layer 105 and prevent thermal oxidation of the second metal layer 105 caused by high temperature in subsequent processes.
In this step, the transparent protection layer 107 is formed and patterned together with the second metal layer 105, so as to prevent the formation of a "brim" structure by Cu acid etching of the three-layer stacked structure of the second metal layer 105, thereby causing the breakage of the film layer.
S8, as shown in FIG. 10, a second insulating layer 106 of 2000-5000 angstroms is formed on the substrate 101 and covers the second metal layer and the semiconductor layer 104.
The film structure of the second insulating layer 106 includes a single-layer structure and a stacked-layer structure, and the single-layer structure includes SiOx or SiNx.
The laminated structure includes: SiOx/SiNx laminated layers, SiNx/SiOx laminated layers, SiOx/SiNx/SiNO laminated layers, SiOx/SiNx/Al2O3 laminated layers or SiOx/SiNx/AlN laminated layers.
The laminated structure of the invention is an A/B laminated structure, namely, the material A is taken as one layer, the material B is taken as the other layer, and the layer B is arranged above the layer A.
S9, as shown in fig. 10, a first groove 1061 and a second groove are respectively formed on the surface of the second insulating layer 106, the first groove 1061 extends downward to the upper surface of the second metal layer, and the second groove 1062 extends downward to the upper surface of the transparent protection layer 107.
Specifically, the first groove 1061 and the second groove are subjected to opening processing by dry etching of the passivation layer with a strong oxidizing gas such as an F-system gas, and the second groove is formed at this time; the transparent protection layer 107 of the first groove 1061 is then etched by an oxalic acid wet process to form the first groove 1061 (as shown in fig. 11), which ensures that the solder paste transferred from the LED108 into the first groove 1061 contacts the second metal layer. Wherein the solder paste is printed on the bottom of the LED 108.
The transparent protection layer 107 in the first groove 1061 is etched by using a wet chemical, so that the final solder paste of the LED108 can be tightly combined with Cu of the second metal layer, and meanwhile, since the wet etching does not have plasma (plasma) physical bombardment and etching product residues, the contact resistance between the cathode and the anode of the LED chip and Cu can be prevented from being too large.
S10, binding the LED into the first groove.
Specifically, the LED is subjected to solder paste hard brush treatment, LED chips are transferred into the first recess 1061, and reflow soldering, and the Mini-LED or Micro-LED display panel is formed.
The principle and the implementation of the present invention are explained in the present text by applying specific examples, and the above description of the examples is only used to help understanding the technical solution and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A display panel, comprising:
a substrate;
the first metal layer is arranged on the substrate;
the first insulating layer is arranged on the substrate and the second insulating layer;
a semiconductor layer disposed on the first insulating layer;
a second metal layer disposed on the first insulating layer and the semiconductor layer;
the transparent protective layer is arranged on the second metal layer;
and the second insulating layer is arranged on the substrate and coats the transparent protective layer, the second metal layer and the semiconductor layer.
2. The display panel of claim 1,
the second insulating layer comprises a first groove and a second groove;
the first groove extends downwards to the upper surface of the second metal layer;
the second groove extends downwards to the upper surface of the transparent protection layer.
3. The display panel of claim 2, further comprising:
and the LED is arranged in the first groove and connected with the second metal layer.
4. The display panel of claim 2, further comprising:
and the corresponding part of the transparent protection layer in the second groove is a COF binding layer.
5. The display panel of claim 1,
the first metal layer comprises a grid electrode which is arranged below the semiconductor layer
The second metal layer comprises a source drain electrode;
the grid, the semiconductor layer and the source and drain electrodes form a thin film transistor.
6. The display panel of claim 4,
the first metal layer comprises peripheral routing;
the second metal layer comprises COF binding wires which are connected with the peripheral wires.
7. The display panel of claim 3,
the second metal layer comprises an LED binding wire and is connected with the LED.
8. The display panel of claim 1,
the material of the transparent protective layer comprises indium tin oxide.
9. A method for manufacturing a display panel, comprising:
providing a substrate;
forming a first metal layer on the substrate;
forming a first insulating layer on the substrate and coating the first metal layer;
forming a semiconductor layer on the first insulating layer;
depositing a layer of metal material on the first insulating layer and coating the semiconductor layer;
depositing a layer of transparent conductive material on the metal material;
etching the patterns of the transparent conductive material and the metal material together to obtain a second metal layer and a transparent protective layer;
forming a second insulating layer on the substrate and coating the second metal layer and the semiconductor layer;
a first groove and a second groove are respectively formed in the surface of the second insulating layer, the first groove extends downwards to the upper surface of the second metal layer, and the second groove extends downwards to the upper surface of the transparent protective layer;
binding an LED into the first recess.
10. The method for preparing a binding region according to claim 9,
in the step of etching the pattern of the transparent conductive material and the metal material together to obtain the second metal layer and the transparent protection layer, the method specifically includes:
etching the transparent conductive material with oxalic acid chemical agent to obtain the transparent protective layer
And etching the metal material by using the transparent protective layer as an etching pattern of the metal material and using H2O2 series medicaments to obtain the second metal layer.
CN202010455906.8A 2020-05-26 2020-05-26 Display panel Active CN111613634B (en)

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