CN111599906B - Manufacturing method of deep ultraviolet LED chip with vertical structure - Google Patents
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Abstract
The invention discloses a manufacturing method of a deep ultraviolet LED chip with a vertical structure. The method specifically comprises the following steps: the p-GaN ohmic contact layer is processed into a grid structure by utilizing a laser direct writing process, and a p-type low-resistance ohmic contact Ni/Al electrode with high reflectivity is used for ohmic contact with the p-GaN grid to form better ohmic contact. And etching a groove array and an inner reflector groove array between the Ni/Al p electrode conducting layer and the n-AlGaN layer of the epitaxial layer to obtain a honeycomb structure, and depositing the Al layer serving as a reflector on the side wall of the inner reflector groove to obtain the honeycomb inner reflector structure. By replacing the p-GaN layer in the traditional deep ultraviolet LED with the latticed transparent p-GaN layer and designing the honeycomb-shaped inner reflector structure, the emitting of photons transversely transmitted to the LED active layer is realized, the loss of the active region in the deep ultraviolet LED chip is reduced, and the light extraction efficiency of the chip is greatly improved.
Description
Technical Field
The invention belongs to the technical field of semiconductor light-emitting devices, and particularly relates to a manufacturing method of a deep ultraviolet LED chip with a vertical structure.
Background
Light Emitting Diodes (LEDs) are a new type of efficient solid-state Light source, and are widely used in the fields of solid-state lighting, traffic, military, and medical care due to their characteristics of high efficiency, long service life, energy saving, environmental protection, and rich colors. With the gradual maturity of LED technology and the need of industrialization marketing, there are also more strict requirements on the luminous efficiency and other properties of LED devices. The ultraviolet LED is used as a branch of the LED, and has all the advantages of the LED although the LED cannot illuminate, theoretically, the ultraviolet LED can replace all traditional ultraviolet light sources, and the application field of the LED is greatly expanded. The most common ultraviolet rays are mainly from solar radiation, and can be divided into long-wave ultraviolet rays (UVA), medium-wave ultraviolet rays (UVB) and short-wave ultraviolet rays (UVC) according to the wavelength, wherein the wavelengths are 320-400 nm, 280-320 nm and 100-280 nm respectively. Ultraviolet rays that can reach the earth's surface mainly include long-wave ultraviolet rays UVA and medium-wave ultraviolet rays UVB, and short-wave ultraviolet rays UVC are substantially absorbed by the ozone layer in the atmosphere (thus UVC belongs to the solar blind zone).
In 1997, the first GaN-based ultraviolet light emitting LED emitting light with 371nm in emission wavelength in the world was successfully developed by daily sub-chemistry. In 2003, A1 GaN-based deep ultraviolet LEDs were developed by SETi corporation, USA, with a wavelength of 280 nm. 24.10.2014, one of the nobel prize winners in physics introduces their ongoing research in the meeting of the journalist, including deep ultraviolet LEDs with wavelengths of about 250-350 nm. The current deep ultraviolet LED chip is an LED chip with the light-emitting wavelength within the range of 200-350nm, and is a great breakthrough after the blue light era, and the ultraviolet LED is more widely applied due to the gradual maturity of the technology and the reduction of the cost.
The deep ultraviolet light is widely applied to a plurality of fields such as water purification, air purification, ultraviolet communication, food processing and fresh keeping, formaldehyde treatment, biochemical detection, medical treatment and the like, in the past, the light source of the waveband is mainly provided by a mercury lamp, and the LED lamp is far superior to the traditional mercury lamp in the aspects of environmental protection, energy conservation, portability and the like, so that the deep ultraviolet light has great market and brand-new application scenes. With the improvement of the light emitting power and the reduction of the cost of the ultraviolet LED, the application of the ultraviolet LED will be more extensive in the future, more prominent than the current blue light LED, and will become one of the most influential semiconductor products in this century. In recent years, a small amount of deep ultraviolet LED chips are sold abroad, the selling price of the deep ultraviolet LED chips is more than 1000 times of that of the common blue light LED chips, the field is still in the research and development stage at home, and no product is sold yet.
Although deep ultraviolet LEDs are more cost effective and environmentally friendly than ultraviolet lamps, they cannot easily replace ultraviolet lamps due to their low light output power. The AlGaN-based deep ultraviolet LED chip has low Light Extraction Efficiency (LEE) and high epitaxial crystal defects, so that the AlGaN-based deep ultraviolet LED chip has low light output power and External Quantum Efficiency (EQE). With the reduction of emission wavelength, Transverse Magnetic (TM) polarized light propagating parallel to the c-plane of sapphire occupies a major part, and the propagation path from the multiple quantum well is long, so that the light loss is large, which leads to the reduction of light extraction efficiency, and meanwhile, the propagation of TM polarized light is also affected by the current crowding phenomenon caused by the high-resistance AlGaN layer and the chip internal tilt angle.
Disclosure of Invention
The invention aims to provide a manufacturing method of a deep ultraviolet LED chip with a vertical structure, and the light emitting efficiency of the deep ultraviolet LED chip with the vertical structure is further improved.
In order to solve the technical problems, the invention adopts the following technical scheme:
a manufacturing method of a deep ultraviolet LED chip with a vertical structure specifically comprises the following steps:
s1, growing an epitaxial layer on a sapphire substrate (1) to form an LED epitaxial wafer, wherein the epitaxial layer comprises an AlN layer (2), an AlGaN layer (3), a Si-doped n-AlGaN layer (4), an n-AlGaN layer (5), an AlGaN/AlGaN multi-quantum well active layer (MQW) (6), an Electron Blocking Layer (EBL) (7), a Mg-doped p-AlGaN layer (8) and a p-GaN ohmic contact layer (9) from bottom to top;
s2, cleaning the LED epitaxial wafer obtained in the step S1, and processing the p-GaN ohmic contact layer (9) into a grid structure on the upper surface of the p-GaN ohmic contact layer (9) of the LED epitaxial wafer by using a laser direct writing process;
s3, depositing a Ni/Al p electrode conducting layer (10) on the upper surface of the p-GaN ohmic contact layer (9) with the latticed structure obtained in the S2;
s4, etching an n-type through hole array (11) on the Ni/Al p electrode conducting layer (10) obtained in the S3, wherein the depth of the n-type through hole is as far as the n-AlGaN layer (5);
s5, etching a groove array (12) on the Ni/Al p electrode conducting layer (10) obtained in the S3, wherein the grooves are trapezoidal bodies with isosceles trapezoid side surfaces, are wide at the top and narrow at the bottom, are positioned between the two n-type through holes and have the same distance with the two n-type through holes, every six grooves are encircled into a regular hexagon by taking the n-type through holes as the center, are of a honeycomb structure as a whole, and the depth of each groove reaches the n-AlGaN layer (5);
s6, depositing a whole layer of SiO in and above the groove, the upper surface of the Ni/Al p electrode conducting layer (10) and in and above the n-type through hole2An insulating layer (13) on the SiO layer2Etching an n-type contact hole array (14) at a position corresponding to the n-type through hole on the upper surface of the insulating layer (13), wherein the n-type contact hole and the n-type through hole are concentric, the diameter of the n-type contact hole is smaller than that of the n-type through hole, and the etching depth is up to the n-AlGaN layer (5);
S7SiO obtained at S62An array (15) of inner reflector grooves is etched on the upper surface of the insulating layer (13), the inner reflector grooves are embedded in the grooves obtained in the step S5, the side walls and the bottom of the inner reflector grooves are respectively parallel to the side walls and the bottom of the grooves, and the SiO is used for forming the SiO2-an insulating layer (13) separating, said reflector trench depth up to said n-AlGaN layer (5);
s8, depositing metal Al (16) on the surface of the groove wall of the inner reflector obtained in S7 to be used as a reflector, and then remaining the SiO in S72Continuing to deposit a full layer of SiO on the upper surface of the insulating layer (13) and in and over the array of inner reflector trenches (15)2An insulating layer;
s9. SiO obtained in S82An n-electrode metal layer (17) is deposited on the insulating layer and in the n-type contact hole, and the n-electrode metal layer (17) is directly contacted with the n-AlGaN layer (5) to form a deep ultraviolet LED chip substrate;
s10, bonding the deep ultraviolet LED chip substrate obtained in the step S9 to a carrier wafer (18), and then stripping off and removing the sapphire substrate (1), the AlN layer (2) and the AlGaN layer (3) to expose the Si-doped n-AlGaN layer (4);
s11, cleaning the deep ultraviolet LED chip substrate obtained in the step S10 by using an HCl solution, removing metal residues in the stripping process, and roughening the surface of the Si-doped n-AlGaN layer (4);
s12, etching a p-electrode hole (19) on the coarsened Si-doped n-AlGaN layer, wherein the depth of the p-electrode hole (19) reaches the Ni/Al p-electrode conducting layer (10);
s13, depositing a p electrode (20) in the p electrode hole (19) to obtain the deep ultraviolet LED chip.
According to the scheme, the grid structure in the S2 is a rectangular array with the line width of 1.1-1.2 mu m and the side length of 7-8 mu m.
According to the scheme, the laser power in the S2 is 180-220 mu j/mm2The laser direct-writing scanning speed is 180-220 mm/s.
According to the scheme, the diameter of the n-type through holes in the n-type through hole array (11) in the S4 is 2.6-2.8 mu m, the diameter of the n-type contact holes in the n-type contact hole array (14) in the S6 is 2.1-2.3 mu m, and the circle center distance of the n-type through holes is 6-7 mu m.
According to the scheme, in the S5, the included angle between the side surface and the bottom surface of the trapezoid body is 25-35 degrees, and the width of the lower narrow side of the isosceles trapezoid side surface is less than 1 μm.
According to the scheme, SiO between the inner reflector groove in the S7 and the side wall of the groove in the S52The thickness of the insulating layer is 40-360 nm, and SiO is arranged between the bottoms2The thickness of the insulating layer is 40-360 nm.
According to the scheme, the content of the Al component in the Mg-doped p-AlGaN layer (8) is more than 45%.
According to the scheme, the thickness of the metal Al in the S8 ranges from 50nm to 150 nm.
According to the scheme, in the S3, the thickness of Ni in the Ni/Al p electrode conducting layer (10) is 0.4-0.6 nm; the thickness of Al is 190-210 nm.
According to the scheme, the n electrode metal layer is of a Ti/Al/Ni/Au structure, and the thickness of the metal layer is 20-40 nm/50-150 nm/20-40 nm/600-1400 nm respectively.
According to the scheme, in the S1, the epitaxial layer of the sapphire substrate growing from bottom to top is an AlN layer with the thickness of 2.75-3.25 mu m and Al with the thickness of 175-225 nm0.45Ga0.55An N layer of 2.25-2.75 μm Si doped N-Al0.7Ga0.3N layer of 0.4 to 0.6 μm N-Al0.6Ga0.4N layer, 5 pairs of Al with a total thickness of 105-135 nm0.4Ga0.6N/Al0.64Ga0.36N multi-quantum well active layer (MQW), a 45-55 nm Mg-doped p-AlGaN layer and a 5-8 nm p-GaN ohmic contact layer.
According to the scheme, the Ni/Al p electrode conducting layer (10) obtained in the step S3 is formed by firstly sputtering a Ni thin layer by adopting a magnetron sputtering process, then carrying out a rapid thermal annealing process, and finally evaporating an Al metal layer by adopting an electron beam evaporation process to form a Ni/Al structure.
According to the scheme, the wet etching process is adopted in S11 to coarsen the surface of the n-AlGaN layer, and the method specifically comprises the following steps: and (3) carrying out surface roughening on the surface of the n-AlGaN layer for 8-15 min by adopting 1-5 mol/L KOH solution at the temperature of 30-60 ℃.
According to the scheme, the wafer bonding mode In the S10 is Au-In bonding, Au is selected as the outermost layer of the n electrode metal layer (17), then an In layer is deposited on the surface of the Au layer of the n electrode metal layer (17) to realize Au-In bonding, and then the whole LED chip substrate wafer is bonded onto the carrier wafer through thermal compression at the temperature of 200-250 ℃ and the pressure of 1800-2200 kg.
The invention has the beneficial effects that:
1. the grid-shaped transparent p-GaN layer is used for replacing the p-GaN layer in the traditional deep ultraviolet LED, and the p-type low-resistance ohmic contact Ni/Al electrode with high reflectivity is used for ohmic contact with the p-GaN grid, so that better ohmic contact is formed; in addition, the gridded p-GaN layer has extremely small line width and low shading rate, avoids the light absorption characteristic of the whole p-GaN layer structure, greatly enhances the LEE in the deep ultraviolet light-emitting diode, and improves the heat effect of the chip during working.
2. According to the invention, the groove array and the inner reflector groove array are etched between the Ni/Al p electrode conducting layer and the n-AlGaN layer to obtain the honeycomb structure, the Al layer is deposited on the side wall of the inner reflector groove as the reflector, so that the honeycomb inner reflector structure is obtained, the emission of photons transversely transmitted to the LED active layer is realized, the loss of the active region in the deep ultraviolet LED chip is favorably reduced, and the light extraction efficiency of the chip is greatly improved.
3. The N-type through hole array and the N-type contact hole array are etched between the Ni/Al p electrode conducting layer and the N-AlGaN layer, N electrode metal is located below the epitaxial layer and is in contact with a Ga polar surface of the N-AlGaN layer through the N-type contact hole, the p electrode is evaporated after the p electrode hole is exposed through an etching process to form a bonding pad, the N-type metal layer and the p-type metal layer are separated by an insulating layer in space, and the problem that the N polar surface of the N-AlGaN layer in a conventional vertical structure deep ultraviolet LED chip is not easy to form low-resistance ohmic contact with metal due to the fact that the Ga polar surface of the N-AlGaN layer and the electrode metal layer have better ohmic contact performance is solved.
Drawings
Fig. 1 is a three-dimensional structure diagram of a deep ultraviolet LED chip according to an embodiment of the present invention;
fig. 2 is a schematic view of an epitaxial structure grown on a sapphire substrate of a deep ultraviolet LED chip according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a deep ultraviolet LED chip provided by an embodiment of the present invention processing a high light transmittance p-GaN grid structure by using a laser direct writing process;
fig. 4 is a schematic structural diagram of a p-electrode conductive layer of a deep ultraviolet LED chip according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a structure of etching an n-type through hole of a deep ultraviolet LED chip according to an embodiment of the present invention;
FIG. 6 is a top view of an etched n-type via array of a deep ultraviolet LED chip according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a deep ultraviolet LED chip n-type via hole peripheral trench array structure according to an embodiment of the present invention;
fig. 8 is a honeycomb top view of a deep ultraviolet LED chip n-type through hole peripheral groove array provided in an embodiment of the present invention;
FIG. 9 shows a deep ultraviolet LED chip with a first SiO deposition layer2A schematic diagram of an insulating layer structure;
FIG. 10 is a schematic diagram of a structure of an etched n-type contact hole of a deep ultraviolet LED chip according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a deep ultraviolet LED chip etched internal reflector trench array structure according to an embodiment of the present invention;
FIG. 12 is a schematic structural diagram of a deep ultraviolet LED chip deposited metal Al reflector according to an embodiment of the present invention;
FIG. 13 is a schematic diagram illustrating a second deposition of a whole SiO layer on a deep ultraviolet LED chip according to an embodiment of the present invention2A schematic diagram of an insulating layer structure;
FIG. 14 is a top view of an array structure of internal reflectors of a deep ultraviolet LED chip according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of an evaporated or sputtered n-electrode metal layer of a deep ultraviolet LED chip according to an embodiment of the present invention;
fig. 16 is a schematic view of a wafer bonding structure of a deep ultraviolet LED chip sapphire substrate with bonding metal deposited on an upper surface thereof according to an embodiment of the present invention;
fig. 17 is a schematic structural diagram of a deep ultraviolet LED chip after a sapphire substrate is removed by a laser lift-off process according to an embodiment of the present invention;
FIG. 18 is a schematic diagram illustrating a wet etching and roughening process for a deep ultraviolet LED chip according to an embodiment of the present invention;
FIG. 19 is a schematic diagram of a deep ultraviolet LED chip etching p-electrode hole structure provided by an embodiment of the invention;
fig. 20 is a schematic structural diagram of a deep ultraviolet LED chip depositing a p-electrode in a p-electrode hole according to an embodiment of the present invention;
fig. 21 is a top view of a deep ultraviolet LED chip with a p-electrode deposited in a p-electrode hole according to an embodiment of the present invention.
Wherein, in the figure:
the solar cell comprises a 1-sapphire substrate, a 2-AlN layer, a 3-AlGaN layer, a 4-Si doped n-AlGaN layer, a 5-n-AlGaN layer, a 6-AlGaN/AlGaN multi-quantum well active layer (MQW), a 7-Electron Blocking Layer (EBL), an 8-Mg doped p-AlGaN layer, a 9-p-GaN ohmic contact layer, a 10-Ni/Al p electrode conducting layer, an 11-n type through hole array, a 12-groove array, a 13-SiO2The structure comprises an insulating layer, a 14-n type contact hole array, a 15-internal reflector groove array, a 16-metal Al, a 17-n electrode metal layer, a 18-carrier wafer, a 19-p electrode hole and a 20-p electrode.
Detailed Description
The invention is further illustrated by the following examples and figures. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the practice of the invention.
Example 1
The manufacturing method of the deep ultraviolet LED chip with the vertical structure comprises the following specific steps:
(1) the cleaned sapphire substrate 1 was placed in an MOCVD epitaxial growth apparatus 1 at a temperature of 650 ℃, and a 35nm AlN nucleation layer 2 was grown.
(2) Continuing to grow undoped Al at 1100 deg.C0.45Ga0.55The N buffer layer 3 is 175-225 nm thick, the temperature is kept unchanged, and a layer of Si doped N-Al is grown0.7Ga0.3N layer 4 and N-Al0.6Ga0.4N layer 5 with thickness of 2.5 μm and 0.5 μm, doped with a high concentrationDegree of 1.6X 1019cm-3。
(3) Growing Al for 5 cycles at 760 DEG C0.4Ga0.6N/Al0.64Ga0.36The N quantum well serves as the active layer 6, and the thickness of the quantum well layer is about 2.7 nm.
(4) Deposition of SiO at low temperatures2Or Si3N4And (3) forming an electron blocking layer 7(EBL), evaporating and plating a Ti/Au mask layer on the EBL layer by adopting an electron beam evaporation method, wherein the thickness of the Ti/Au mask layer is 50/100nm, and removing the Ti/Au mask layer outside the current blocking area by adopting photoetching and wet etching.
(5) And removing the EBL layer outside the current stop region by adopting electrochemical etching, and removing the Ti/Au mask layer by using aqua regia etching after the electrochemical etching is finished.
(6) Growing a Mg-doped p-AlGaN layer 8 at 1050 deg.C, with a thickness of 50nm and a doping concentration of 1.5 × 1020cm-3And growing a p-GaN ohmic contact thin layer 9 with the thickness of 5nm while keeping the temperature unchanged.
(7) Annealing is carried out for 20 minutes under the nitrogen atmosphere, the epitaxial growth process is finished, and the structure is shown in figure 2.
(8) Cleaning the obtained LED epitaxial wafer, and processing a high-light-transmittance p-GaN grid on the upper surface of a GaN thin layer of the LED epitaxial wafer by using a laser direct writing process, wherein the laser power is 200 muj/mm2The laser direct writing scanning speed is 200mm/s, see fig. 3;
(9) adopting a photoetching process and an electron beam evaporation process to evaporate a high-reflectivity Ni/Al p electrode metal conducting layer 10 on the upper surface of the high-light-transmittance p-GaN grid, wherein the thickness is 0.5nm/200m, and referring to a graph 4;
(10) by BCl3/Cl2The mixed gas etches GaN grids, p-AlGaN and Multiple Quantum Wells (MQW) to form an n-type through hole array 11 (see figures 5 and 6) and a groove array 12 (see figures 7 and 8) which reach an n-AlGaN epitaxial layer, the depth of the groove exceeds about 500nm of the MQW layer, wherein the groove is a trapezoid body with isosceles trapezoid side surfaces, is wide at the top and narrow at the bottom, is positioned between two n-type through holes and has the same distance with the two n-type through holes, every six grooves are encircled into a regular hexagon by taking the n-type through hole as the center, and the whole top view is in a honeycomb structure; the diameter of the n-type through hole is 2.7 mu m,the circle center distance between adjacent n-type through holes is 6.5 mu m, the included angle between the side surface of the trapezoid body of the groove and the bottom surface is about 25-35 degrees, and the width of the lower narrow edge of the side surface of the isosceles trapezoid is 0.9 mu m;
(11) depositing SiO in and above the groove, on the upper surface of the Ni/Al p electrode conducting layer and in and above the n-type through hole by adopting PECVD (plasma enhanced chemical vapor deposition)2An insulating layer 13 formed to be filled with SiO2And filled with SiO2N-type via holes of (1);
(12) with CHF3/Ar/O2Mixed gas pair deposited SiO2Etching to remove SiO in the middle and bottom of the n-type through hole2SiO in the middle of the trench2Form with SiO2An array of n-type contact holes 14 in the sidewalls, with a 2.2 μm diameter n-type contact hole, and an array of internal mirror trenches 15, see FIG. 11;
(13) an Al mirror 16 is evaporated on the wall surface of the inner mirror groove, see FIG. 12, and then on the remaining SiO2Continuing to deposit a full layer of SiO on and above the upper surface of the insulating layer and the array of inner reflector trenches covered with Al mirrors2Insulating layers, see 13, 14, in n-type contact holes with SiO2Depositing an N-electrode metal Ti/Al/Ni/Au (20-40 nm/50-150 nm/20-40 nm/600-1400 nm)17 on the upper surface, as shown in FIG. 15, wherein the N-electrode metal layer (17) and the N-AlGaN layer are deposited on the N2Continuously carrying out thermal annealing for 20 minutes at 600 ℃ in the environment to obtain a deep ultraviolet LED chip substrate;
(14) depositing Ti/Pt/Au/In (80nm/80nm/80 nm/2.3-2.7 um) on the surface of a wafer material with the thermal expansion coefficient similar to that of the LED wafer, bonding the deep ultraviolet LED chip substrate obtained In the previous step on the Si wafer 18, and keeping the temperature at 230 ℃ under 2000 kg for 40 minutes to realize Au-In bonding, which is shown In figure 16;
(15) the power density of the power of use is 0.9J/cm2KrF (KrF) laser irradiation interface with wavelength of 248nm, removing sapphire substrate and other structures by adopting laser stripping process and inductively coupled plasma etching process to expose Si-doped n-Al0.7Ga0.3N layers, transferring the deep ultraviolet LED chip substrate to a Si substrate, see fig. 17;
(16) stripping off the deep ultraviolet LED coreCarrying out wet and dry etching on the wafer substrate to remove Al and Ga metals until the n-AlGaN layer is exposed, carrying out surface roughening on the surface of the n-AlGaN layer for 8-15 min at the temperature of 30-60 ℃ by adopting 1-5 mol/L KOH solution, wherein the cone density of the roughened surface is about 6.5 multiplied by 108/cm2Average cone diameter of about 0.4-0.6 μm, and BCl3/Cl2The mixed gas is deeply etched on the n-AlGaN layer to form a p-electrode hole 19, the etching depth exceeds the grid-shaped p-GaN ohmic contact layer, and the exposed Ni/Al metal electrode conducting layer is prepared for processing a p-electrode, and the p-electrode hole 19 is shown in a figure 19;
(17) and depositing p-electrode metal 20 in the exposed p-electrode hole by adopting an ion beam sputtering process, and finishing the manufacturing of the deep ultraviolet LED chip by referring to figures 20 and 21.
In the embodiment of the invention, the vertical structure deep ultraviolet LED chip has a honeycomb structure, wherein the reflector Al layer is positioned on the inclined side wall of the honeycomb structure, the other vertical structure deep ultraviolet LED chip is processed by the same process, the vertical structure deep ultraviolet LED chip does not have a honeycomb inner reflector groove and an Al reflector, the rest structures are completely the same, and comparative analysis of photoelectric properties is sequentially carried out.
The test results show that the transmittance of the ungrid p-GaN ohmic contact layer measured on sapphire was less than 50%, and the transmittance increased significantly as the p-GaN was gridded. The honeycomb-structure Al reflector is introduced into the deep ultraviolet LED chip structure, so that the local reflectivity can be improved, the effective light reflection of the LED is increased, the local reflectivity is improved, the LOP of the vertical-structure LED chip without the inner reflector and the LOP of the vertical-structure LED chip with the inner reflector are respectively 14.3mW and 18.2mW under the injection current of 200mA through an integrating sphere test, and the LOP of the vertical-structure LED chip with the inner reflector is 1.27 times that of the vertical-structure LED chip without the inner reflector. The EQE for the vertical structure LED chips without and with internal reflectors was 1.60% and 2.05% at 200mA injection current, respectively, with the vertical structure LED with internal reflector having a higher LEE.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting the protection scope of the present invention, and although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims (10)
1. A manufacturing method of a deep ultraviolet LED chip with a vertical structure is characterized by comprising the following steps:
s1, growing an epitaxial layer on a sapphire substrate (1) to form an LED epitaxial wafer, wherein the epitaxial layer comprises an AlN layer (2), an AlGaN layer (3), a Si-doped n-AlGaN layer (4), an n-AlGaN layer (5), an AlGaN/AlGaN multiple quantum well active layer (6), an electron blocking layer (7), an Mg-doped p-AlGaN layer (8) and a p-GaN ohmic contact layer (9) from bottom to top;
s2, cleaning the LED epitaxial wafer obtained in the step S1, and processing the p-GaN ohmic contact layer (9) into a grid structure on the upper surface of the p-GaN ohmic contact layer (9) of the LED epitaxial wafer by using a laser direct writing process;
s3, depositing a Ni/Al p electrode conducting layer (10) on the upper surface of the p-GaN ohmic contact layer (9) with the latticed structure obtained in the S2;
s4, etching an n-type through hole array (11) on the Ni/Al p electrode conducting layer (10) obtained in the S3, wherein the depth of the n-type through hole is as far as the n-AlGaN layer (5);
s5, etching a groove array (12) on the Ni/Al p electrode conducting layer (10) obtained in the S3, wherein the grooves are trapezoidal bodies with isosceles trapezoid side surfaces, are wide at the top and narrow at the bottom, are positioned between the two n-type through holes and have the same distance with the two n-type through holes, every six grooves are encircled into a regular hexagon by taking the n-type through holes as the center, the overall top view is of a honeycomb structure, and the depth of each groove reaches the n-AlGaN layer (5);
s6, depositing a whole layer of SiO in and above the groove, the upper surface of the Ni/Al p electrode conducting layer (10) and in and above the n-type through hole2An insulating layer (13) on the SiO layer2Etching an n-type contact hole array (14) at a position corresponding to the n-type through hole on the upper surface of the insulating layer (13), wherein the n-type contact hole and the n-type through hole are concentric, the diameter of the n-type contact hole is smaller than that of the n-type through hole, and the etching depth is up to the n-AlGaN layer (5);
s7, SiO obtained in S62An array (15) of inner reflector grooves is etched on the upper surface of the insulating layer (13), the inner reflector grooves are embedded in the grooves obtained in the step S5, the side walls and the bottom of the inner reflector grooves are respectively parallel to the side walls and the bottom of the grooves, and the SiO is used for forming the SiO2-an insulating layer (13) separating, said reflector trench depth up to said n-AlGaN layer (5);
s8, depositing metal Al (16) on the surface of the groove wall of the inner reflector obtained in S7 to be used as a reflector, and then remaining the SiO in S72Continuing to deposit a full layer of SiO on the upper surface of the insulating layer (13) and in and over the array of inner reflector trenches (15)2An insulating layer;
s9. SiO obtained in S82An n-electrode metal layer (17) is deposited on the insulating layer and in the n-type contact hole, and the n-electrode metal layer (17) is directly contacted with the n-AlGaN layer (5) to form a deep ultraviolet LED chip substrate;
s10, bonding the deep ultraviolet LED chip substrate obtained in the step S9 to a carrier wafer (18), and then stripping off and removing the sapphire substrate (1), the AlN layer (2) and the AlGaN layer (3) to expose the Si-doped n-AlGaN layer (4);
s11, cleaning the deep ultraviolet LED chip substrate obtained in the step S10 by using an HCl solution, removing metal residues in the stripping process, and roughening the surface of the Si-doped n-AlGaN layer (4);
s12, etching a p-electrode hole (19) on the coarsened Si-doped n-AlGaN layer, wherein the depth of the p-electrode hole (19) reaches the Ni/Al p-electrode conducting layer (10);
s13, depositing a p electrode (20) in the p electrode hole (19) to obtain the deep ultraviolet LED chip.
2. The method according to claim 1, wherein the lattice-shaped structure is a rectangular array having a line width of 1.1 to 1.2 μm and a side length of 7 to 8 μm in S2.
3. The method according to claim 1, wherein the laser power in S2 is 180-220 μ j/mm2The laser direct-writing scanning speed is 180-220 mm/s.
4. The manufacturing method according to claim 1, wherein the diameter of n-type through holes in the n-type through hole array (11) in S4 is 2.6-2.8 μm, the diameter of n-type contact holes in the n-type contact hole array (14) in S6 is 2.1-2.3 μm, and the circle center distance between adjacent n-type through holes is 6-7 μm.
5. The manufacturing method according to claim 1, wherein in S5, the included angle between the side face and the bottom face of the trapezoid is 25-35 °, and the width of the lower narrow side of the isosceles trapezoid side face is less than 1 μm.
6. The method of claim 1, wherein SiO between the inner reflector trench in S7 and the trench sidewall in S52The thickness of the insulating layer is 40-360 nm, and SiO is arranged between the bottoms2The thickness of the insulating layer is 40-360 nm.
7. The method according to claim 1, wherein the thickness of the metallic Al in S8 is 50-150 nm.
8. The manufacturing method according to claim 1, characterized in that the content of Al component in the Mg doped p-AlGaN layer (8) is more than 45%; in the S3, the thickness of Ni in the Ni/Al p electrode conducting layer (10) is 0.4-0.6 nm; the thickness of Al is 190-210 nm; the n-electrode metal layer is of a Ti/Al/Ni/Au structure, and the thickness of the metal layer is 20-40 nm/50-150 nm/20-40 nm/600-1400 nm respectively.
9. The method according to claim 1, wherein in S1, the sapphire substrate has an epitaxial layer of 2.75 to 3.25 μm AlN and 175 to 225nm Al grown from the bottom to the top0.45Ga0.55An N layer of 2.25-2.75 μm Si doped N-Al0.7Ga0.3N layer of 0.4 to 0.6 μm N-Al0.6Ga0.4N layer, 5 pairs of Al with a total thickness of 105-135 nm0.4Ga0.6N/Al0.64Ga0.36The LED comprises an N multi-quantum well active layer, a 45-55 nm Mg-doped p-AlGaN layer and a 5-8 nm p-GaN ohmic contact layer.
10. The manufacturing method according to claim 1,
the Ni/Al p electrode conducting layer (10) obtained in the step S3 specifically comprises the following steps: firstly, sputtering a Ni thin layer by adopting a magnetron sputtering process, then carrying out a rapid thermal annealing process, and finally evaporating an Al metal layer by adopting an electron beam evaporation process to form a Ni/Al structure;
in the step S11, a wet etching process is used to roughen the surface of the n-AlGaN layer, which specifically includes: performing surface roughening on the surface of the n-AlGaN layer for 8-15 min at the temperature of 30-60 ℃ by adopting 1-5 mol/L KOH solution;
and the wafer bonding mode In the S10 is Au-In bonding, Au is selected as the outermost layer In the n electrode metal layer (17), then an In layer is deposited on the surface of the Au layer of the n electrode metal layer (17) to realize Au-In bonding, and then the whole LED chip substrate wafer is bonded on the carrier wafer through thermal compression at the temperature of 200-250 ℃ and the pressure of 1800-2200 kg.
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