CN111599802A - 陶瓷封装外壳及封装外壳安装结构 - Google Patents

陶瓷封装外壳及封装外壳安装结构 Download PDF

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CN111599802A
CN111599802A CN202010402748.XA CN202010402748A CN111599802A CN 111599802 A CN111599802 A CN 111599802A CN 202010402748 A CN202010402748 A CN 202010402748A CN 111599802 A CN111599802 A CN 111599802A
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ceramic
pad
circuit board
ceramic substrate
insulator
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CN202010402748.XA
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CN111599802B (zh
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杨振涛
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CETC 13 Research Institute
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CETC 13 Research Institute
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Priority to CN202010402748.XA priority Critical patent/CN111599802B/zh
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Priority to PCT/CN2020/123683 priority patent/WO2021227374A1/zh
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Publication of CN111599802B publication Critical patent/CN111599802B/zh
Priority to US17/846,911 priority patent/US20220320023A1/en
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Abstract

本发明提供了一种陶瓷封装外壳，属于芯片封装技术领域，包括陶瓷基体、陶瓷绝缘子、盖板和焊盘结构；陶瓷基体为多层结构，设有腔体；陶瓷绝缘子设于陶瓷基体上，上部有贯穿腔体侧壁设置的射频传输结构；盖板密封盖设于腔体；焊盘结构设于陶瓷基体底部。本发明提供的陶瓷封装外壳，使封装外壳具备优异的微波性能、高密度的布线、高集成度的元器件分布以及数量更多的引出端，能进行高密度互连。本发明还提供一种封装外壳安装结构，电路板上设有上表面与陶瓷绝缘子上表面平齐的第一阶梯结构，第一阶梯结构设有用于与射频传输结构连接的键合结构，电路板上设有与焊盘结构焊接的电路板焊盘结构。其便于与陶瓷封装外壳进行安装，同时保证阻抗匹配。

Description

陶瓷封装外壳及封装外壳安装结构
技术领域
本发明属于芯片封装技术领域，更具体地说，是涉及一种陶瓷封装外壳及封装外壳安装结构。
背景技术
随着微波半导体技术的不断发展，器件的工作频率越来越高，这样也就要求封装外壳适应封装更高使用频率的器件以及更小的驻波，金属腔镶嵌陶瓷绝缘子结构外壳是适应封装更高频率器件的理想封装外壳形式，它可以将一个或多个微波毫米波半导体芯片密封在一个单独的盒体中，通过陶瓷绝缘子作为输入输出端子与外电路实现微波信号的互连，由于整个外壳是全密封结构，隔绝了外界环境对芯片的侵蚀，器件具有较高的可靠性。在封装外壳的整体结构中，陶瓷绝缘子是镶嵌在金属封接框和底座之间的，它的一端通过外引线与外部电路连接，另一端伸入到封装外壳内部与半导体芯片相连接，起到连接内部芯片和外部电路的作用。
传统的微波封装外壳为金属墙陶瓷绝缘子外壳，这类外壳采用金属地盘作为芯片承载衬底，虽然散热性能优异，但绝缘子的结构限制了其引出端的数量，无法进行高密度的互连。
发明内容
本发明的目的在于提供一种陶瓷封装外壳，旨在解决现有的微波封装外壳无法进行高密度的互连的技术问题。
为实现上述目的，本发明采用的技术方案是：提供一种陶瓷封装外壳，包括：
陶瓷基体，为多层结构，所述陶瓷基体上设有开口向上的腔体；
陶瓷绝缘子，设于所述陶瓷基体上，所述陶瓷绝缘子上部形成有射频传输结构，所述射频传输结构贯穿所述腔体侧壁设置，所述腔体内设有至少一个与所述射频传输结构导电连接的芯片和/或无源元件；
盖板，密封盖设于所述腔体；以及
焊盘结构，设于所述陶瓷基体底部。
作为本申请另一实施例，所述陶瓷基体上设有嵌装槽，所述陶瓷绝缘子嵌装于所述嵌装槽中。
作为本申请另一实施例，所述陶瓷基体与所述绝缘子一体设置。
作为本申请另一实施例，所述焊盘结构包括：
第一焊盘，为盘状构件，设于所述陶瓷基体的底面上，且对应于所述陶瓷绝缘子，所述第一焊盘用于接地；以及
第二焊盘，设于所述陶瓷基体的底面上，且位于所述第一焊盘外侧，所述第二焊盘用于传输信号。
作为本申请另一实施例，所述第二焊盘呈阵列状的设置多个，且分别连接有焊球。
作为本申请另一实施例，所述陶瓷封装外壳还包括封口环，为金属构件，所述封口环设于所述腔体开口的外周，所述盖板密封盖设于所述封口环。
作为本申请另一实施例，所述封口环和所述陶瓷基体之间还设有过渡环，所述过渡环用于减缓所述陶瓷基体和所述封口环之间的封接应力。
作为本申请另一实施例，所述陶瓷基体为氮化铝陶瓷基体。
本发明提供的陶瓷封装外壳的有益效果在于：与现有技术相比，本发明陶瓷封装外壳的陶瓷基体采用多层结构，可进行多层布线，有效提高布线密度，陶瓷绝缘子能使外壳适用于封装更高频率的芯片，同时，腔体内可安装多个芯片和多种无源元件，满足了用户对高集成度的封装需求，底部的焊盘结构也使得封装外壳具有更多的引出端。实际上，本发明的陶瓷封装外壳将射频传输端口技术和高气密性的多芯片陶瓷封装技术相结合，使封装外壳同时具备优异的微波性能、高密度的布线、高集成度的元器件分布以及数量更多的引出端，有效解决了传统的微波封装外壳无法进行高密度互连的问题。
本发明还提供一种封装外壳安装结构，用于安装上述的陶瓷封装外壳，包括电路板，所述电路板上设有第一阶梯结构，所述第一阶梯结构的上表面与所述陶瓷封装外壳的陶瓷绝缘子的上表面平齐，所述第一阶梯结构的上表面设有用于与所述射频传输结构导电连接的键合结构，所述电路板的上板面上设有与所述焊盘结构焊接的电路板焊盘结构。
作为本申请另一实施例，所述陶瓷封装外壳的焊盘结构包括：
第一焊盘，为盘状构件，设于所述陶瓷基体的底面上，且对应于所述陶瓷绝缘子，所述第一焊盘用于接地；
第二焊盘，呈阵列状的设置多个，且分别连接有焊球，所述第二焊盘设于所述陶瓷基体的底面上，且位于所述第一焊盘外侧，所述第二焊盘用于传输信号；
所述电路板焊盘结构包括与所述第一焊盘焊接的第三焊盘及与所述第二焊盘焊接的第四焊盘；
所述电路板上还设有第二阶梯结构，所述第二阶梯结构高于所述电路板的上板面且低于所述第一阶梯结构的上表面，所述第二阶梯结构的上表面设有所述第三焊盘，所述电路板的上板面上设有所述第四焊盘。
本发明提供的封装外壳安装结构的有益效果在于：与现有技术相比，本发明封装外壳安装结构，适用于上述陶瓷封装外壳的安装，安装时先将陶瓷基体底部的焊盘结构与电路板上的电路板焊盘结构焊接，随后再用键合线将射频传输结构与第一阶梯结构上的键合结构导电连接，由于在电路板上设置了第一阶梯结构，使得键合结构与陶瓷绝缘子之间基本没有高度差，便于键合连接，同时保证阻抗匹配。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的陶瓷封装外壳的主视结构剖视图；
图2为本发明实施例提供的陶瓷封装外壳的俯视结构示意图；
图3为本发明实施例提供的陶瓷封装外壳的仰视结构示意图；
图4为本发明实施例采用的陶瓷绝缘子的立体结构示意图；
图5为本发明实施例所提供的陶瓷封装外壳与封装外壳安装结构的装配示意图；
图中：1、陶瓷基体；2、陶瓷绝缘子；3、盖板；4、芯片；5、腔体；6、射频传输结构；601、带状线；602、共面波导；7、第一焊盘；8、焊球；9、封口环；10、过渡环；11、信号键合指；12、电路板；13、第一阶梯结构；14、键合线；15、第二阶梯结构。
具体实施方式
为了使本发明所要解决的技术问题、技术方案及有益效果更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
请一并参阅图1至图5，现对本发明提供的陶瓷封装外壳进行说明。所述陶瓷封装外壳，包括陶瓷基体1、陶瓷绝缘子2、盖板3和焊盘结构；陶瓷基体1为多层结构，陶瓷基体1上设有开口向上的腔体5；陶瓷绝缘子2设于陶瓷基体1上，陶瓷绝缘子2上部形成有射频传输结构6，射频传输结构6贯穿腔体5侧壁设置，腔体5内设有至少一个与射频传输结构6导电连接的芯片4和/或无源元件；盖板3密封盖设于腔体5；焊盘结构设于陶瓷基体1底部。
其中，陶瓷基体1与盖板3配合使腔体5密封，为内部电路提供物理保护和机械支撑。
与现有技术相比，本发明陶瓷封装外壳的陶瓷基体1采用多层结构，可进行多层布线，有效提高布线密度，陶瓷绝缘子2能使外壳适用于封装更高频率的芯片，同时，腔体5内可安装多个芯片4和多种无源元件，满足了用户对高集成度的封装需求，底部的焊盘结构也使得封装外壳具有更多的引出端。实际上，本发明的陶瓷封装外壳将射频传输端口技术和高气密性的多芯片陶瓷封装技术相结合，使封装外壳同时具备优异的微波性能、高密度的布线、高集成度的元器件分布以及数量更多的引出端，有效解决了传统的微波封装外壳无法进行高密度互连的问题。本发明的陶瓷封装外壳是一种高频高速的多芯片陶瓷外壳，适用于军用雷达、电子战接收机、卫星通信等领域。
作为本发明提供的陶瓷封装外壳的一种具体实施方式，陶瓷基体1上设有嵌装槽，陶瓷绝缘子2嵌装于嵌装槽中，通过焊接方式固定。陶瓷绝缘子2上的射频传输结构6一端暴露于腔体5之外，通过键合线14与外部电路连接，另一端位于腔体5之内，通过键合线14与芯片4等元器件连接，起到了连接内部芯片和外部电路的作用。
作为本发明提供的陶瓷封装外壳的一种具体实施方式，请参阅图1、图2及图5，陶瓷基体1与陶瓷绝缘子2一体设置，两者采用相同的材料，且陶瓷基体1的上表面与陶瓷绝缘子2的上表面基本平齐，一体设置的方式使得制备更加方便。
作为本发明实施例的一种具体实施方式，请参阅图4，射频传输结构6包括带状线601和共面波导602，带状线601贯穿腔体5侧壁，共面波导602分别设于带状线601两端，且分别位于腔体5的内侧和外侧。射频传输结构6采用微带线直接穿墙形式，构成了共面波导-带状线-共面波导的传输结构，同时陶瓷绝缘子2与陶瓷基体1一体设置，使得外壳整体微波性能好、重量轻、集成度高。具体地，陶瓷基体1内部在射频传输结构两边增加连接地平面与封口区的接地孔。
具体地，射频传输结构6的输入出处端口采用平面传输结构，其传输线路短，且微波信号基本在同一平面上传输，有效改善微波信号水平穿墙传输的对外连接问题，可以在保证密封性要求的前提下实现微波信号的匹配传输，传输插损较小、尺寸小、易集成，适用于工作频率较高的芯片封装。
作为本发明实施例的一种具体实施方式，请参阅图3，焊盘结构包括第一焊盘7和第二焊盘；第一焊盘7为盘状构件，设于陶瓷基体1的底面上，且对应于陶瓷绝缘子2，第一焊盘用于接地；第二焊盘设于陶瓷基体1的底面上，且位于第一焊盘7外侧，第二焊盘用于传输信号。通过在不同位置设置不同的焊盘，进而分别实现接地与信号传输的功能，同时盘状的第一焊盘7的面积大，接地性能好。
作为本发明实施例的一种具体实施方式，请参阅图3及图5，第二焊盘呈阵列状的设置多个，且分别连接有焊球8。通过在第二焊盘上植入焊球8，使得外壳更加适于贴装，采用表面贴装方式，有效减小了器件体积，提升了组装密度；并且由于引出端采用焊盘阵列引出的形式，其内部键合指与电路板12上的导电焊盘之间的导电路径较短，封装体内布线电阻以及电感等封装寄生参数低，因此具有优异的电性能。
作为本发明实施例的一种具体实施方式，陶瓷基体1为氮化铝陶瓷基体，采用多层氮化铝陶瓷钨金属化高温共烧工艺制作。
由于AlN陶瓷具有热导率高、介电常数较小、介质损耗低、机械强度高、热膨胀系数与常用芯片材料GaAs、Si接近等特点，因此各类大尺寸和大功率的芯片就可以直接封装在AlN外壳上而不需加过渡片，简化了工艺并能有效避免由于热失配引起的失效，从而提高了器件的可靠性，是理想的微波和高功率用陶瓷封装材料。本实施方式中，采用氮化铝多层共烧工艺加工，可以进行高密度的多层布线，可满足高气密高可靠的使用要求。
具体制备流程：
外壳经流延→冲腔和冲孔→孔金属化→印刷→定位→层压→热切成单个生瓷件→烧结→镀镍→钎焊→镀金，最后形成单个的一体化的焊盘阵列陶瓷外壳。
作为本发明实施例的一种具体实施方式，请参阅图1、图2及图5，陶瓷封装外壳还包括封口环9，为金属构件，封口环9设于腔体5开口的外周，盖板3密封盖设于封口环9。封口环9与第一焊盘7导电连接，通过第一焊盘7实现接地。
具体地，封口环9与陶瓷基体1之间采用AgCu28焊料进行焊接。传统的封口环与陶瓷基体采用低温的AuSn焊料进行焊接，对于氮化铝陶瓷而言，这种工艺并没有给后粗的封装工艺留出温度梯度空间，采用高温焊料AgCu28进行氮化铝基体和封口环的焊接则能预留出足够的温度梯度，方便后续的工艺。
作为本发明实施例的一种具体实施方式，参阅图1、图2及图5，封口环9和陶瓷基体1之间还设有过渡环10，过渡环10用于减缓陶瓷基体1和封口9环之间的封接应力。
对于氮化铝陶瓷基体来说，氮化铝陶瓷的热膨胀系数较低，常用金属材料的热膨胀系数较高，氮化铝和金属封口环的高温焊接属于不匹配封接，封装件内部的残余应力过大，极易造成在氮化铝陶瓷一侧开裂，尤其是对于较大腔体尺寸的氮化铝高密度封装壳体，问题将更加严重。为了减缓氮化铝陶瓷外壳中的残余应力，对氮化铝陶瓷外壳进行热膨胀匹配设计。为了减缓氮化铝和金属的封接应力，在封口环9和陶瓷基体1之间设置过渡环10，过度环10选取常用的金属材料如无氧铜、钨铜、钼铜、CMC/金属(金属氧化物)复合材料、CPC，在实现钎焊后残余应力最小的同时兼容平行缝焊封口，不会导致外壳发生开裂失效。
作为本发明实施例的一种具体实施方式，封口环9为铁钴镍合金构件，陶瓷基体1与封口环9之间采用银铜焊料焊接。
本发明的陶瓷封装外壳采用陶瓷焊盘阵列封装形式，微波性能好、集成度高且不需要使用热沉材料，与目前传统的外壳相比，具有体积小、重量轻、散热性能好、集成度高等特点，这种设计技术可以广泛应用于高频高速信号一体化封装领域，可制备加工高功率高密度AlN陶瓷一体化外壳。
本发明的陶瓷封装外壳第二焊盘数最少为4，外形尺寸最小可达3mm×3mm；封装气密性高，气密性满足≤1×10-3Pa·cm3/s，A4；可靠性高，可满足温度循环：-65℃～175℃，200次，恒定加速度：30000g，Y1方向，1min。
本发明还提供一种封装外壳安装结构。请参阅图5，所述封装外壳安装结构用于安装上述的陶瓷封装外壳，包括电路板12，电路板12上设有第一阶梯结构13，第一阶梯结构13的上表面与陶瓷封装外壳的陶瓷绝缘子2的上表面平齐，第一阶梯结构13的上表面设有用于与射频传输结构6导电连接的键合结构，电路板12的上板面上设有与焊盘结构焊接的电路板焊盘结构。
本发明提供的封装外壳安装结构，适用于上述陶瓷封装外壳的安装，安装时先将陶瓷基体底部的焊盘结构与电路板12上的电路板焊盘结构焊接，随后再用键合线14将射频传输结构6与第一阶梯结构13上的键合结构导电连接，由于在电路板12上设置了第一阶梯结构13，使得键合结构与陶瓷绝缘子2之间基本没有高度差，便于键合连接，同时保证阻抗匹配。
作为本发明提供的封装外壳安装结构的一种具体实施方式，参阅图5，陶瓷封装外壳的焊盘结构包括第一焊盘7和第二焊盘；第一焊盘7为盘状构件，设于陶瓷基体1的底面上，且对应于陶瓷绝缘子2，第一焊盘用于接地；第二焊盘呈阵列状的设置多个，且分别连接有焊球8，第二焊盘设于陶瓷基体1的底面上，且位于第一焊盘7外侧，第二焊盘用于传输信号。
电路板焊盘结构包括与第一焊盘焊接的第三焊盘及与第二焊盘焊接的第四焊盘；电路板12上还设有第二阶梯结构15，第二阶梯结构15高于电路板12的上板面且低于第一阶梯结构13的上表面，第二阶梯结构15的上表面设有第三焊盘，电路板12的上板面上设有第四焊盘。
由于本发明的陶瓷封装外壳不设置引线，为实现陶瓷基体1上键合指11和焊盘电镀镍金，在陶瓷基体1内部将所有的信号线均连接至陶瓷基体1的侧面，然后将陶瓷基体1侧面进行侧面印刷，使所有的电镀线都与陶瓷基体1侧面连通，然后电镀时采用夹具将陶瓷基体1四个侧面进行夹持导通，实现电镀。
另外，为实现高频射频芯片和高速信号数字芯片之间的隔离，提高芯片之间的耐电压能力，在芯片键合完成之后可以用胶对整个管壳腔体内的所有芯片进行整体灌封，用胶将芯片的键合丝包封起来，可以有效实现不同芯片之间的隔离，防止芯片之间相互放电击穿，提高整个器件内部的耐电压能力。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

1.陶瓷封装外壳，其特征在于，包括：
陶瓷基体，为多层结构，所述陶瓷基体上设有开口向上的腔体；
陶瓷绝缘子，设于所述陶瓷基体上，所述陶瓷绝缘子上部形成有射频传输结构，所述射频传输结构贯穿所述腔体侧壁设置，所述腔体内设有至少一个与所述射频传输结构导电连接的芯片和/或无源元件；
盖板，密封盖设于所述腔体；以及
焊盘结构，设于所述陶瓷基体底部。
2.如权利要求1所述的陶瓷封装外壳，其特征在于，所述陶瓷基体上设有嵌装槽，所述陶瓷绝缘子嵌装于所述嵌装槽中。
3.如权利要求1所述的陶瓷封装外壳，其特征在于，所述陶瓷基体与所述绝缘子一体设置。
4.如权利要求1所述的陶瓷封装外壳，其特征在于，所述焊盘结构包括：
第一焊盘，为盘状构件，设于所述陶瓷基体的底面上，且对应于所述陶瓷绝缘子，所述第一焊盘用于接地；以及
第二焊盘，设于所述陶瓷基体的底面上，且位于所述第一焊盘外侧，所述第二焊盘用于传输信号。
5.如权利要求4所述的陶瓷封装外壳，其特征在于，所述第二焊盘呈阵列状的设置多个，且分别连接有焊球。
6.如权利要求1所述的陶瓷封装外壳，其特征在于，所述陶瓷封装外壳还包括封口环，为金属构件，所述封口环设于所述腔体开口的外周，所述盖板密封盖设于所述封口环。
7.如权利要求6所述的陶瓷封装外壳，其特征在于，所述封口环和所述陶瓷基体之间还设有过渡环，所述过渡环用于减缓所述陶瓷基体和所述封口环之间的封接应力。
8.如权利要求1所述的陶瓷封装外壳，其特征在于，所述陶瓷基体为氮化铝陶瓷基体。
9.封装外壳安装结构，其特征在于，用于安装如权利要求1-8中任意一项所述的陶瓷封装外壳，包括电路板，所述电路板上设有第一阶梯结构，所述第一阶梯结构的上表面与所述陶瓷封装外壳的陶瓷绝缘子的上表面平齐，所述第一阶梯结构的上表面设有用于与所述射频传输结构导电连接的键合结构，所述电路板的上板面上设有与所述焊盘结构焊接的电路板焊盘结构。
10.如权利要求9所述的封装外壳安装结构，其特征在于，所述陶瓷封装外壳的焊盘结构包括：
第一焊盘，为盘状构件，设于所述陶瓷基体的底面上，且对应于所述陶瓷绝缘子，所述第一焊盘用于接地；
第二焊盘，呈阵列状的设置多个，且分别连接有焊球，所述第二焊盘设于所述陶瓷基体的底面上，且位于所述第一焊盘外侧，所述第二焊盘用于传输信号；
所述电路板焊盘结构包括与所述第一焊盘焊接的第三焊盘及与所述第二焊盘焊接的第四焊盘；
所述电路板上还设有第二阶梯结构，所述第二阶梯结构高于所述电路板的上板面且低于所述第一阶梯结构的上表面，所述第二阶梯结构的上表面设有所述第三焊盘，所述电路板的上板面上设有所述第四焊盘。
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