CN111599703B - Preparation method of beam lead of GaN device or circuit on SiC substrate - Google Patents

Preparation method of beam lead of GaN device or circuit on SiC substrate Download PDF

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CN111599703B
CN111599703B CN202010387498.7A CN202010387498A CN111599703B CN 111599703 B CN111599703 B CN 111599703B CN 202010387498 A CN202010387498 A CN 202010387498A CN 111599703 B CN111599703 B CN 111599703B
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sic substrate
dielectric layer
epitaxial layer
beam lead
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CN111599703A (en
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宋旭波
梁士雄
吕元杰
冯志红
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CETC 13 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/43Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4822Beam leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • H01L2224/431Pre-treatment of the preform connector

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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

The invention is suitable for the technical field of semiconductor device preparation, and provides a method for preparing a beam lead of a GaN device or a circuit on a SiC substrate, which comprises the following steps: growing a GaN epitaxial layer on the SiC substrate, and removing the corresponding GaN epitaxial layer on the scribing path; depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample; etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip; the etching groove is filled and leveled by wax and is adhered to the preset support plate, the beam lead is prepared on the first medium layer, the preparation process is simple, the consistency of the device is high, and the situation that photoresist with higher price is adopted for backfilling is avoided, so that the preparation cost of the chip is reduced, the environmental pollution is reduced, and the contact danger of workers is reduced.

Description

Preparation method of beam lead of GaN device or circuit on SiC substrate
Technical Field
The invention belongs to the technical field of semiconductor device preparation, and particularly relates to a preparation method of a beam lead of a GaN device or circuit on a SiC substrate.
Background
In circuits with operating frequencies above 100GHz, semiconductor devices or circuits with beam lead structures are widely used, which can make the system design more compact, flexible and reliable. At present, the beam lead preparation method of the traditional GaAs device or circuit is mature. However, compared with GaAs, GaN has a higher forbidden band width, a higher carrier drift velocity and a higher breakdown electric field, and thus is more suitable for the development of high-frequency and high-power amplifier circuits and frequency multiplier circuits. However, when the GaN device prepared on the SiC substrate is sliced at present, the adopted SiC substrate processing method can damage the metal, resulting in errors of the prepared GaN device; when the hanging beam lead is prepared on the GaN Schottky diode by adopting a thick photoresist backfilling and leveling process, the cost for preparing the hanging beam lead is higher due to the higher price of the photoresist, the photoresist has certain toxicity, the contact danger of workers is increased in the manufacturing process, and the photoresist removing process causes the pollution to underground water.
Disclosure of Invention
In view of this, the embodiment of the present invention provides a method for manufacturing a beam lead of a GaN device or circuit on a SiC substrate, which aims to solve the problems in the prior art that a metal is damaged by a wafer, the cost is increased, the contact risk is increased, and the environment is polluted.
In order to achieve the above object, a first aspect of the embodiments of the present invention provides a method for preparing a beam lead of a GaN device or circuit on a SiC substrate, including:
growing a GaN epitaxial layer on the SiC substrate, and removing the corresponding GaN epitaxial layer on the scribing path;
depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample;
etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip, wherein the laser etches SiC corresponding to the SiC substrate without etching the material corresponding to the first dielectric layer;
and filling the etching groove with wax, adhering the etching groove to a preset support sheet, and preparing a beam lead on the first dielectric layer.
As another embodiment of the present application, after the beam lead is fabricated on the first dielectric layer, the method further includes:
and removing the first dielectric layer on the scribing path of the GaN device with the prepared beam lead, and removing the wax to realize the separation of the GaN device.
As another embodiment of the present application, the first dielectric layer on the scribe line position is removed by wet etching on the device after the beam lead is prepared;
and removing the wax by using an alkaline solution or an organic solvent.
As another embodiment of the present application, the removing the GaN epitaxial layer at the scribe line position includes:
removing the GaN epitaxial layer corresponding to the scribing channel position by adopting dry etching;
the GaN epitaxial layer comprises a GaN epitaxial layer prepared from any one or more of high-doped GaN, low-doped GaN and high-resistance GaN.
As another embodiment of the present application, the first dielectric layer is SiO2And the thickness of the first dielectric layer is the same as that of the GaN epitaxial layer.
As another embodiment of the present application, after depositing the first dielectric layer on the scribe line position where the GaN epitaxial layer is removed and completing the front surface process on the GaN epitaxial layer in the region except the scribe line position, the method further includes:
thinning the back of the SiC substrate by adopting a mechanical method to obtain the SiC substrate with preset thickness;
and electroplating the first metal on the back surface of the rest SiC substrate.
As another embodiment of the present application, the laser has a wavelength of 355 nm.
As another embodiment of the present application, a width of the etching groove is smaller than a width of the first dielectric layer.
As another embodiment of the present application, the thickness of the wax is greater than the depth of the etching grooves, and the wax covers the back surface of the SiC substrate.
As another embodiment of the present application, the preparing a beam lead on the first dielectric layer includes:
two beam leads with symmetrical positions and the same size are respectively prepared on the first dielectric layer and at one end of the long edge of the chip through a sputtering process, one end of each beam lead covers the edge of the chip, and the other end of each beam lead is in the range of the first dielectric layer;
plating a first metal on an outer surface of the beam lead.
Compared with the prior art, the embodiment of the invention has the following beneficial effects: compared with the prior art, the method has the advantages that the GaN epitaxial layer grows on the SiC substrate, and the corresponding GaN epitaxial layer on the scribing path is removed; depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample; etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip, wherein the laser etches SiC corresponding to the SiC substrate without etching the material corresponding to the first dielectric layer; the etching groove is filled and leveled by wax and is adhered to a preset support plate, the beam lead is prepared on the first medium layer, the preparation process is simple, the consistency of the device is high, and the situation that photoresist with higher price is adopted for backfilling is avoided, so that the preparation cost of the chip is reduced, the environmental pollution is reduced, and the contact danger of workers is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic flow chart of an implementation of a beam lead preparation method of a GaN device or circuit on a SiC substrate according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a top view of a scribe lane provided by an embodiment of the present invention;
FIG. 3 is a schematic diagram of a beam-type lead fabrication process for a GaN device or circuit on a SiC substrate provided by an embodiment of the invention;
fig. 4 is an exemplary diagram of a beam lead provided by an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Fig. 1 is a schematic flow chart of an implementation of a beam lead preparation method of a GaN device or circuit on a SiC substrate according to an embodiment of the present invention, which is detailed as follows.
And 101, growing a GaN epitaxial layer on the SiC substrate, and removing the GaN epitaxial layer corresponding to the scribing street.
Optionally, the GaN epitaxial layer includes a GaN epitaxial layer made of any one or more of highly doped GaN, lowly doped GaN, and high resistance GaN. For example, the GaN epitaxial layer may be a multilayer structure, and the top-down structure thereof may be: a highly doped GaN layer, a low doped GaN layer and a high resistance GaN layer, wherein the highly doped GaN layer can be 200nm 5E17 cm-3The GaN epitaxial layer and the low-doped GaN layer made of the GaN material can be 2 microns 8E18 cm-3The high-resistance GaN layer can be a GaN epitaxial layer prepared from 2-micron high-resistance GaN materials.
In step 101, a dry etching method may be used to remove the GaN epitaxial layer at the scribe line position, so as to form an isolation trench to isolate each chip. As shown in fig. 2, the scribe lane is illustrated in a top view, and the hatched area around the chip is the scribe lane. Optionally, the upper surface of the GaN epitaxial layer may be first subjected to photolithography development, the development region is a scribe line region, and then dry etching is performed on the development region to etch away the GaN epitaxial layer corresponding to the scribe line position.
And 102, depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample.
Optionally, the first dielectric layer may be SiO2The thickness of the first dielectric layer is the same as that of the GaN epitaxial layer, and SiO is deposited on the isolation groove as shown in FIG. 32,SiO2Can be flush with the upper surface of the GaN epitaxial layer outside the isolation groove, so that the front surface process of the chip can be completed in the chip area, such as mesa isolation, EuropeThe method comprises the processes of ohmic contact, anode preparation, passivation, electroplating, air bridge and the like.
After the front process is completed, as shown in fig. 3, thinning the back of the SiC substrate by a mechanical method to obtain a SiC substrate with a preset thickness; and electroplating the first metal on the back surface of the rest SiC substrate. Optionally, the first metal may be gold, copper, or other metal. For example, the first metal may be gold.
And 103, etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip, wherein the laser etches SiC corresponding to the SiC substrate and does not etch the material corresponding to the first dielectric layer.
Optionally, the laser has a wavelength of 355 nm. As shown in fig. 3, laser with a wavelength of 355nm is used to etch away the SiC substrate corresponding to the scribe line, and the width of the etching groove is smaller than that of the first dielectric layer, so that the edge of the remaining SiC substrate can support SiO deposited on the isolation groove2The obtained structure is firmer and not easy to damage.
SiO adopted by first dielectric layer2Laser with the wavelength of 355nm is not absorbed, so that the laser with the wavelength of 355nm emitted by the laser does not etch and damage the first dielectric layer and stops etching until the first dielectric layer.
And 104, filling the etching groove with wax, adhering the etching groove to a preset support sheet, and preparing a beam lead on the first dielectric layer.
Alternatively, as shown in fig. 3, wax is added into the etching groove, and the wax is coated on the lower surface, i.e., the back surface, of the remaining SiC substrate so as to be bonded to the predetermined blade, and then the beam lead is processed through a sputtering process and an electroplating process. As shown in fig. 4, in a top view of the beam lead, two beam leads with symmetrical positions and the same size are respectively prepared on the first dielectric layer and at one end of the long side of the chip by a sputtering process, one end of the beam lead covers the edge of the chip, and the other end of the beam lead is within the range of the first dielectric layer;
plating a first metal on an outer surface of the beam lead.
Optionally, the material used in the sputtering process is a conductive metal material, and the first metal may be gold.
Optionally, after the beam lead is prepared, the method for preparing the beam lead of the GaN device or the circuit on the SiC substrate may further include: and removing the first dielectric layer on the scribing path of the device with the prepared beam lead, and removing the wax to realize the separation of the GaN device.
Optionally, removing the first dielectric layer on the scribing path position of the device after the beam lead is prepared by adopting a wet etching method; the beam lead is a suspended structure as shown in fig. 3.
And removing the wax by using an alkaline solution or an organic solvent. Optionally, a high-temperature alkaline solution or a high-temperature organic solvent may be used to remove the wax, thereby realizing separation of the GaN devices and obtaining the GaN device or circuit with the beam lead.
According to the preparation method of the beam lead of the GaN device or the circuit on the SiC substrate, the GaN epitaxial layer corresponding to the scribing channel is removed by growing the GaN epitaxial layer on the SiC substrate; depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample; etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip, wherein the laser etches SiC corresponding to the SiC substrate without etching the material corresponding to the first dielectric layer; the etching groove is filled and leveled by wax and is adhered to a preset support plate, the beam lead is prepared on the first medium layer, the preparation process is simple, the consistency of the device is high, and the situation that photoresist with higher price is adopted for backfilling is avoided, so that the preparation cost of the chip is reduced, the environmental pollution is reduced, and the contact danger of workers is reduced.
The embodiment also comprises a GaN device or a circuit with the beam lead, which comprises a SiC substrate and a GaN epitaxial layer on the SiC substrate, wherein the width of the GaN epitaxial layer is smaller than that of the SiC substrate, a chip on the GaN epitaxial layer is prepared, and two beam leads with symmetrical positions and the same size are respectively prepared at one end of the long edge of the chip on the GaN epitaxial layer, wherein one end of the beam lead covers the edge of the chip, and the other end of the beam lead is arranged in a suspended manner. The GaN device or circuit with the beam lead has high consistency, simple preparation process and lower preparation cost.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (10)

1. A preparation method of a beam lead of a GaN device or a circuit on a SiC substrate is characterized by comprising the following steps:
growing a GaN epitaxial layer on the SiC substrate, and removing the corresponding GaN epitaxial layer on the scribing path;
depositing a first dielectric layer on the scribing channel position where the GaN epitaxial layer is removed, and finishing the front process of the chip on the GaN epitaxial layer in the region except the scribing channel position to obtain a first sample;
etching the SiC substrate corresponding to the scribing channel position on the first sample by adopting laser to obtain an etching groove around the chip, wherein the laser etches SiC corresponding to the SiC substrate without etching the material corresponding to the first dielectric layer;
and filling the etching groove with wax, adhering the etching groove to a preset support sheet, and preparing a beam lead on the first dielectric layer.
2. The method of claim 1, further comprising, after the beam-type wire is formed on the first dielectric layer, the steps of:
and removing the first dielectric layer on the scribing path of the GaN device with the prepared beam lead, and removing the wax to realize the separation of the GaN device.
3. The method for preparing a beam lead of a GaN device or circuit on a SiC substrate of claim 2,
removing the first dielectric layer on the scribing channel position of the device with the prepared beam lead by adopting a wet etching mode;
and removing the wax by using an alkaline solution or an organic solvent.
4. The method for preparing a beam lead of a GaN device or circuit on a SiC substrate of claim 1, wherein the removing of the GaN epilayer at the scribe line location comprises:
removing the GaN epitaxial layer corresponding to the scribing channel position by adopting dry etching;
the GaN epitaxial layer comprises a GaN epitaxial layer prepared from any one or more of high-doped GaN, low-doped GaN and high-resistance GaN.
5. The method of claim 1, wherein the first dielectric layer is SiO2And the thickness of the first dielectric layer is the same as that of the GaN epitaxial layer.
6. The method for preparing a beam lead of a GaN device or circuit on a SiC substrate as claimed in claim 1 or 5, further comprising, after depositing a first dielectric layer on the scribe lane positions where the GaN epitaxial layer is removed and performing front side processing on the GaN epitaxial layer in regions other than the scribe lane positions:
thinning the back of the SiC substrate by adopting a mechanical method to obtain the SiC substrate with preset thickness;
and electroplating the first metal on the back surface of the rest SiC substrate.
7. The method of claim 1, wherein the laser has a wavelength of 355 nm.
8. The method of claim 1, wherein the width of the etched trench is less than the width of the first dielectric layer.
9. The method of making a beam-type lead for a GaN device or circuit on a SiC substrate of claim 1 wherein the thickness of the wax is greater than the depth of the etched trench, the wax covering the back side of the SiC substrate.
10. The method of claim 1, wherein said forming a beam lead on said first dielectric layer comprises:
two beam leads with symmetrical positions and the same size are respectively prepared on the first dielectric layer and at one end of the long edge of the chip through a sputtering process, one end of each beam lead covers the edge of the chip, and the other end of each beam lead is in the range of the first dielectric layer;
plating a first metal on an outer surface of the beam lead.
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CN112758885A (en) * 2020-12-25 2021-05-07 中国电子科技集团公司第十三研究所 Cutting method of MEMS (micro-electromechanical systems) special-shaped chip
CN113451418A (en) * 2021-07-23 2021-09-28 深圳市电科智能科技有限公司 Centrosymmetric SiC-based GaN Schottky diode
CN113451419A (en) * 2021-07-23 2021-09-28 深圳市电科智能科技有限公司 Centrosymmetric double-row SiC-based GaN Schottky diode
CN113451421A (en) * 2021-07-23 2021-09-28 深圳市电科智能科技有限公司 Centrosymmetric double-row GaN Schottky diode

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GB1259883A (en) * 1968-07-26 1972-01-12 Signetics Corp Encapsulated beam lead construction for semiconductor device and assembly and method
JPS4826670B1 (en) * 1969-10-08 1973-08-14
US3680205A (en) * 1970-03-03 1972-08-01 Dionics Inc Method of producing air-isolated integrated circuits
US3997963A (en) * 1973-06-29 1976-12-21 Ibm Corporation Novel beam-lead integrated circuit structure and method for making the same including automatic registration of beam-leads with corresponding dielectric substrate leads
US4011144A (en) * 1975-12-22 1977-03-08 Western Electric Company Methods of forming metallization patterns on beam lead semiconductor devices
JPS6037752A (en) * 1983-08-10 1985-02-27 Nec Corp Beam lead type semiconductor device
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CN109037874A (en) * 2018-07-26 2018-12-18 胡南 The method of beam lead is made on quartzy circuit

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