CN108899277A - The preparation method and Schottky diode of epitaxial wafer - Google Patents
The preparation method and Schottky diode of epitaxial wafer Download PDFInfo
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- CN108899277A CN108899277A CN201810682428.7A CN201810682428A CN108899277A CN 108899277 A CN108899277 A CN 108899277A CN 201810682428 A CN201810682428 A CN 201810682428A CN 108899277 A CN108899277 A CN 108899277A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 34
- 238000000407 epitaxy Methods 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
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- 238000001312 dry etching Methods 0.000 claims description 4
- 238000001039 wet etching Methods 0.000 claims description 4
- 108090000723 Insulin-Like Growth Factor I Proteins 0.000 claims description 3
- 102000013275 Somatomedins Human genes 0.000 claims description 3
- 230000015556 catabolic process Effects 0.000 abstract description 8
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 239000000463 material Substances 0.000 description 9
- 230000005684 electric field Effects 0.000 description 6
- 238000001451 molecular beam epitaxy Methods 0.000 description 6
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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Abstract
The present invention is suitable for technical field of semiconductors, provides the preparation method and Schottky diode of a kind of epitaxial wafer, the preparation method of epitaxial wafer includes：Surface grows heavy doping epitaxial layer on substrate；Lightly doped epitaxial layer is grown in heavy doping epitaxial layer upper surface；Groove is prepared in the lightly doped epitaxial layer, the depth of the groove is less than the thickness of the lightly doped epitaxial layer；Lightly doped epitaxial layer upper surface after preparing groove grows secondary epitaxy layer, and the secondary epitaxy layer fills the groove, and the thickness of the secondary epitaxy layer is greater than the depth of the groove.When preparing Schottky diode using epitaxial wafer provided by the invention, the breakdown reverse voltage of Schottky diode can be improved, and the high frequency performance of device will not be reduced.
Description
Technical field
The invention belongs to technical field of semiconductors more particularly to the preparation methods and Schottky diode of a kind of epitaxial wafer.
Background technique
Semiconductor Schottky diode is widely used in modern electronics industry, with good reliability, circuit design
The advantages that being easy, is widely used in the fields such as power electronics, microwave radio.One important technology of semiconductor Schottky diode refers to
Mark is diode reverse breakdown voltage, and diode reverse breakdown voltage limits the performance and reliability of device.To improve Xiao Te
The breakdown reverse voltage of based diode generallys use plate field structure and p-type ring structure, still, plate field structure and p-type ring structure meeting
Reduce the high frequency performance of device.
Summary of the invention
In view of this, the embodiment of the invention provides a kind of preparation method of epitaxial wafer and Schottky diode, to solve
The problem of high frequency performance of device can be reduced while improving the breakdown reverse voltage of Schottky diode in the prior art.
The first aspect of the embodiment of the present invention provides a kind of preparation method of epitaxial wafer：
Surface grows heavy doping epitaxial layer on substrate；
Lightly doped epitaxial layer is grown in heavy doping epitaxial layer upper surface；
Groove is prepared in the lightly doped epitaxial layer, the depth of the groove is less than the thickness of the lightly doped epitaxial layer
Degree；
Lightly doped epitaxial layer upper surface after preparing groove grows secondary epitaxy layer, described in the secondary epitaxy layer filling
Groove, and the thickness of the secondary epitaxy layer is greater than the depth of the groove.
Optionally, further include：The secondary epitaxy layer is subjected to planarization process.
Optionally, described to prepare groove in the lightly doped epitaxial layer, including：
Photoresist is coated in the lightly doped epitaxial layer upper surface, after handling through exposure and development, exposes groove region
Lightly doped epitaxial layer；
Wet etching, dry etching or etching processing are carried out to the lightly doped epitaxial layer, removal groove region
Secondary epitaxy layer；
Remove the photoresist.
Optionally, the depth of the groove is greater than the 1/5 of the lightly doped epitaxial layer thickness, and is less than outside described be lightly doped
Prolong the 4/5 of layer.
Optionally, the shape of the groove is any one or more in rectangle, circle, ellipse and triangular pyramidal.
Optionally, the doping concentration range of the heavy doping epitaxial layer is 1018/cm3To 5 × 1018/cm3, described to be lightly doped
The doping concentration range of epitaxial layer is 1015/cm3To 1018/cm3, the secondary doping concentration range for prolonging layer is 1016/cm3Extremely
1018/cm3, and the doping concentration of the secondary epitaxy layer is different from the doping concentration of the lightly doped epitaxial layer.
Optionally, the thickness of the heavy doping epitaxial layer is greater than 0.5 micron, and the thickness of the lightly doped epitaxial layer is greater than
0.1 micron, the thickness of the secondary epitaxy layer is less than the thickness of the lightly doped epitaxial layer.
The second aspect of the embodiment of the present invention provides a kind of epitaxial wafer, and the epitaxial wafer passes through such as the embodiment of the present invention the
The preparation method of epitaxial wafer described in one side is prepared.
The third aspect of the embodiment of the present invention provides a kind of Schottky diode, and the Schottky diode is such as weighing this
It is prepared on epitaxial wafer described in inventive embodiments second aspect.
The fourth aspect of the embodiment of the present invention provides a kind of preparation method of Schottky diode, including：The present invention is real
Apply the preparation method of epitaxial wafer described in a first aspect；
Further include：
The secondary epitaxy layer and lightly doped epitaxial layer of the epitaxial wafer are removed, the heavy doping of cathode electrode region is exposed
The heavy doping epitaxial layer of epitaxial layer and anode bond pad region, and the upper surface of the heavy doping epitaxial layer in exposing prepares respectively
Cathode electrode and anode bond pad；
The isolated groove of the cathode electrode and the anode bond pad is isolated in preparation；
In secondary epitaxy layer upper surface somatomedin layer, expose the secondary epitaxy layer in the region where anode electrode,
And the upper surface of the secondary epitaxy layer in exposing prepares anode electrode；
The anode air bridges of preparation the connection anode electrode and the anode bond pad.
Existing beneficial effect is the embodiment of the present invention compared with prior art：The embodiment of the present invention passes through table on substrate
Long heavy doping epitaxial layer of looking unfamiliar is prepared in lightly doped epitaxial layer in heavy doping epitaxial layer upper surface growth lightly doped epitaxial layer
Groove, and the depth of groove is less than the thickness of lightly doped epitaxial layer, the lightly doped epitaxial layer upper surface growth after preparing groove
Secondary epitaxy layer, secondary epitaxy layer fills the groove, and the thickness of secondary epitaxy layer is greater than the depth of groove, outer using this
When prolonging piece and preparing Schottky diode, since the surface of lightly doped epitaxial layer is concaveconvex shape, in anode electrode plus reverse biased
When, depletion region edge also will form concaveconvex shape below anode electrode, make local electric field Relatively centralized, to reduce anode electricity
Close to the peak electric field of cathode electrode side in extremely, and then the breakdown voltage of device is improved, and the frequency that will not influence device is special
Property.
Detailed description of the invention
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only of the invention some
Embodiment for those of ordinary skill in the art without any creative labor, can also be according to these
Attached drawing obtains other attached drawings.
Fig. 1 is the implementation process schematic diagram of the preparation method for the epitaxial wafer that one embodiment of the invention provides；
Fig. 2 is the cross-sectional view for the epitaxial wafer that further embodiment of this invention provides；
Fig. 3 is the implementation process schematic diagram of the preparation method for the Schottky diode that yet another embodiment of the invention provides；
Fig. 4 is the cross-sectional view for the Schottky diode that further embodiment of this invention provides.
Specific embodiment
In being described below, for illustration and not for limitation, the tool of such as particular system structure, technology etc is proposed
Body details, to understand thoroughly the embodiment of the present invention.However, it will be clear to one skilled in the art that there is no these specific
The present invention also may be implemented in the other embodiments of details.In other situations, it omits to well-known system, device, electricity
The detailed description of road and method, in case unnecessary details interferes description of the invention.
In order to illustrate technical solutions according to the invention, the following is a description of specific embodiments.
Epitaxial wafer described in the embodiment of the present invention is used to prepare Schottky diode.
Embodiment one
Referring to FIG. 1, the preparation method of epitaxial wafer includes：
Step S101, surface grows heavy doping epitaxial layer on substrate.
In embodiments of the present invention, as shown in Figure 1, substrate 201 is common semiconductor substrate, the material packet of substrate 201
It includes but is not limited to GaN, GaAs and SiC.Heavy doping epitaxial layer 202 is the semiconductor layer of high-dopant concentration, and doping concentration range is
1018/cm3To 5 × 1018/cm3.Pass through molecular beam epitaxy (Molecular Beam Epitaxy, MBE) or Organometallic
Vapour deposition process (Metal-organic Chemical Vapor Deposition, MOCVD) is learned outside 201 upper surface of substrate
Prolong growth heavy doping epitaxial layer 202, MBE or MOCVD have from phenomenon is filled and led up, and can obtain flat surface.Heavy doping extension
The thickness of layer 202 is greater than 0.5 micron.The material of heavy doping epitaxial layer 202 is the common semiconductor material for preparing Schottky diode
Material, including but not limited to GaN, GaAs and SiC.
Step S102 grows lightly doped epitaxial layer in heavy doping epitaxial layer upper surface.
In embodiments of the present invention, as shown in Fig. 2, lightly doped epitaxial layer 203 is the semiconductor layer of low doping concentration, doping
Concentration range is 1015/cm3To 1018/cm3, gently mixed by MBE or MOCVD in the 202 upper surface epitaxial growth of heavy doping epitaxial layer
Miscellaneous epitaxial layer 203.The thickness of lightly doped epitaxial layer 203 is greater than 0.1 micron.Outside the material and heavy doping of lightly doped epitaxial layer 203
The material for prolonging layer 202 is identical.
Step S103, prepares groove in the lightly doped epitaxial layer, and the depth of the groove is less than outside described be lightly doped
Prolong the thickness of layer.
In embodiments of the present invention, groove 204 is prepared in lightly doped epitaxial layer 203.The shape of groove 204 be rectangle,
Any one or more in round, ellipse and triangular pyramidal.The quantity of groove 204 be it is multiple, gently mixed by groove 204
The surface with concaveconvex shape is formed in miscellaneous epitaxial layer.
Optionally, the depth of the groove is greater than the 1/5 of the lightly doped epitaxial layer thickness, and is less than outside described be lightly doped
Prolong the 4/5 of layer.
Optionally, the implementation of step S103 is：Photoresist is coated in the lightly doped epitaxial layer upper surface, through exposing
After light, development treatment, expose the lightly doped epitaxial layer of groove region；
Wet etching, dry etching or etching processing are carried out to the lightly doped epitaxial layer, remove the groove location
The secondary epitaxy layer in domain；
Remove the photoresist.
In embodiments of the present invention, groove region is removed in lightly doped epitaxial layer by photoetching process with exterior domain
Upper surface coats photoresist, exposes the region for needing to prepare groove, then expose by wet etching, dry etching or photoetching removal
Secondary epitaxy layer, prepare groove 204, finally remove photoresist.
Step S104, the lightly doped epitaxial layer upper surface after preparing groove grow secondary epitaxy layer, the secondary epitaxy
Layer fills the groove；And the thickness of the secondary epitaxy layer is greater than the depth of the groove.
In embodiments of the present invention, secondary outer in 203 upper surface epitaxial growth of lightly doped epitaxial layer by MBE or MOCVD
Prolong layer 205.The doping concentration of secondary epitaxy layer 205 is more than or less than the doping concentration of lightly doped epitaxial layer 203, doping concentration model
Enclose is 1016/cm3To 1018/cm3.The thickness range of secondary epitaxy layer 205 is the thickness less than lightly doped epitaxial layer 203.Make
When preparing Schottky diode with the epitaxial wafer, anode electrode is prepared in 205 upper surface of secondary epitaxy layer.
Optionally, further include：The secondary epitaxy layer is subjected to planarization process.
In embodiments of the present invention, planarization process is carried out by mechanical lapping or chemically mechanical polishing, obtains having flat
The secondary epitaxy layer 205 on smooth surface.
The embodiment of the present invention grows heavy doping epitaxial layer by surface on substrate, grows in heavy doping epitaxial layer upper surface
Lightly doped epitaxial layer prepares groove in lightly doped epitaxial layer, and the depth of groove is less than the thickness of lightly doped epitaxial layer, is making
Lightly doped epitaxial layer upper surface after standby groove grows secondary epitaxy layer, and secondary epitaxy layer fills the groove, and secondary epitaxy
The thickness of layer is greater than the depth of groove, when preparing Schottky diode using the epitaxial wafer, due to the table of lightly doped epitaxial layer
Face is concaveconvex shape, and in anode electrode plus reverse biased, depletion region edge also will form concaveconvex shape below anode electrode, is made
The electric field Relatively centralized of part to reduce the peak electric field in anode electrode close to cathode electrode side, and then improves device
Breakdown voltage, and will not influence the frequency characteristic of device.
Embodiment two
A kind of epitaxial wafer, the epitaxial wafer are prepared by the preparation method of the epitaxial wafer as described in the embodiment of the present invention one
It arrives, and there is beneficial effect possessed by the embodiment of the present invention one.
Embodiment three
A kind of Schottky diode, the Schottky diode are prepared on the epitaxial wafer as described in the embodiment of the present invention two
It obtains, and there is beneficial effect possessed by the embodiment of the present invention two.
Example IV
A kind of preparation method of Schottky diode, including：The preparation side of epitaxial wafer as described in the embodiment of the present invention one
Method；
Referring to FIG. 3, further including：
Step S301 removes the secondary epitaxy layer and lightly doped epitaxial layer of the epitaxial wafer, exposes cathode electrode location
The heavy doping epitaxial layer in domain and the heavy doping epitaxial layer of anode bond pad region, and the upper table of the heavy doping epitaxial layer in exposing
Face prepares cathode electrode and anode bond pad respectively.
In embodiments of the present invention, as shown in figure 4, preparing cathode electrode 206 and sun in 202 upper surface of heavy doping epitaxial layer
Pole pad 207, specific preparation process are：Firstly, coating photoresist in the upper surface of secondary epitaxy layer, handle through exposure and development
Afterwards, the photoresist for removing cathode electrode region and anode bond pad region, passes through etching technics etching cathode electrode institute
Secondary epitaxy layer and lightly doped epitaxial layer in region and anode bond pad region expose the heavily doped of cathode electrode region
Then the heavy doping epitaxial layer of miscellaneous epitaxial layer and anode bond pad region is made respectively in the heavy doping epitaxial layer upper surface of exposing
Standby cathode electrode 206 and anode bond pad 207, finally remove photoresist.Cathode electrode 206 and heavy doping epitaxial layer 202 form Europe
Nurse contact.
The isolated groove of the cathode electrode and the anode bond pad is isolated in step S302, preparation.
In embodiments of the present invention, as shown in figure 4, outside corroding the secondary epitaxy layer of isolated groove region, being lightly doped
Prolong layer and heavy doping epitaxial layer, prepares isolated groove 208.Cathode electrode 206 and anode bond pad is isolated by isolated groove 208
207。
Step S303 exposes two of the region where anode electrode in secondary epitaxy layer upper surface somatomedin layer
Secondary epitaxial layer, and the upper surface of the secondary epitaxy layer in exposing prepares anode electrode.
In embodiments of the present invention, as shown in figure 4, the material of dielectric layer 209 is preferably silica.Anode electrode is (attached
Figure is not shown) material include but not TiPtAu, Al or Pt and wherein any two or more combination.
Step S304, the anode air bridges of preparation the connection anode electrode and the anode bond pad.
In embodiments of the present invention, as shown in figure 4, the material of air bridges 210 includes but is not limited to Au, Al and Cu, pass through
Air bridges 210 link together anode electrode and anode bond pad 206.
The Schottky diode of preparation of the embodiment of the present invention, due to the surface of the lightly doped epitaxial layer of anode electrode lower surface
For concaveconvex shape, in anode electrode plus reverse biased, depletion region edge also will form concaveconvex shape below anode electrode, make office
The electric field Relatively centralized in portion to reduce the peak electric field in anode electrode close to cathode electrode side, and then improves device
Breakdown voltage, and will not influence the frequency characteristic of device.
It should be understood that the size of the serial number of each step is not meant that the order of the execution order in above-described embodiment, each process
Execution sequence should be determined by its function and internal logic, the implementation process without coping with the embodiment of the present invention constitutes any limit
It is fixed.
Embodiment described above is merely illustrative of the technical solution of the present invention, rather than its limitations；Although referring to aforementioned reality
Applying example, invention is explained in detail, those skilled in the art should understand that：It still can be to aforementioned each
Technical solution documented by embodiment is modified or equivalent replacement of some of the technical features；And these are modified
Or replacement, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution should all
It is included within protection scope of the present invention.
Claims (10)
1. a kind of preparation method of epitaxial wafer, which is characterized in that including：
Surface grows heavy doping epitaxial layer on substrate；
Lightly doped epitaxial layer is grown in heavy doping epitaxial layer upper surface；
Groove is prepared in the lightly doped epitaxial layer, the depth of the groove is less than the thickness of the lightly doped epitaxial layer；
Lightly doped epitaxial layer upper surface after preparing groove grows secondary epitaxy layer, and the secondary epitaxy layer filling is described recessed
Slot, and the thickness of the secondary epitaxy layer is greater than the depth of the groove.
2. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that further include：By the secondary epitaxy layer into
Row planarization process.
3. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that described to be made in the lightly doped epitaxial layer
Standby groove, including：
Photoresist is coated in the lightly doped epitaxial layer upper surface, after handling through exposure and development, exposes the light of groove region
Doped epitaxial layer；
Wet etching, dry etching or etching processing are carried out to the lightly doped epitaxial layer, remove the secondary of groove region
Epitaxial layer；
Remove the photoresist.
4. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that the depth of the groove is gently mixed greater than described
The 1/5 of miscellaneous epitaxy layer thickness, and it is less than the 4/5 of the lightly doped epitaxial layer.
5. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that the shape of the groove be rectangle, circle,
Ellipse and any one or more in triangular pyramidal.
6. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that the doping concentration of the heavy doping epitaxial layer
Range is 1018/cm3To 5 × 1018/cm3, the doping concentration range of the lightly doped epitaxial layer is 1015/cm3To 1018/cm3, institute
Stating the secondary doping concentration range for prolonging layer is 1016/cm3To 1018/cm3, and the doping concentration of the secondary epitaxy layer and described light
The doping concentration of doped epitaxial layer is different.
7. the preparation method of epitaxial wafer as described in claim 1, which is characterized in that the thickness of the heavy doping epitaxial layer is greater than
0.5 micron, the thickness of the lightly doped epitaxial layer is greater than 0.1 micron, and the thickness of the secondary epitaxy layer is less than described be lightly doped
The thickness of epitaxial layer.
8. a kind of epitaxial wafer, which is characterized in that the epitaxial wafer passes through epitaxial wafer as described in any one of claim 1 to 7
Preparation method is prepared.
9. a kind of Schottky diode, which is characterized in that the Schottky diode is on epitaxial wafer as claimed in claim 8
It is prepared.
10. a kind of preparation method of Schottky diode, which is characterized in that including：It is as described in any one of claim 1 to 7
The preparation method of epitaxial wafer；
Further include：
The secondary epitaxy layer and lightly doped epitaxial layer of the epitaxial wafer are removed, the heavy doping extension of cathode electrode region is exposed
The heavy doping epitaxial layer of layer and anode bond pad region, and the upper surface of the heavy doping epitaxial layer in exposing prepares cathode respectively
Electrode and anode bond pad；
The isolated groove of the cathode electrode and the anode bond pad is isolated in preparation；
Secondary epitaxy layer in the region where secondary epitaxy layer upper surface somatomedin layer, exposing anode electrode, and
The upper surface of the secondary epitaxy layer of exposing prepares anode electrode；
The anode air bridges of preparation the connection anode electrode and the anode bond pad.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110676308A (en) * | 2019-10-12 | 2020-01-10 | 中国电子科技集团公司第十三研究所 | Preparation method of Schottky diode |
| CN110783413A (en) * | 2019-11-08 | 2020-02-11 | 中国电子科技集团公司第十三研究所 | Preparation method of gallium oxide with transverse structure and gallium oxide with transverse structure |
| CN113113496A (en) * | 2020-01-10 | 2021-07-13 | 苏州晶湛半导体有限公司 | Method for manufacturing vertical device |
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| WO2021139366A1 (en) * | 2020-01-10 | 2021-07-15 | 苏州晶湛半导体有限公司 | Method for manufacturing vertical device |
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