CN111583793B - 柔性显示屏 - Google Patents

柔性显示屏 Download PDF

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CN111583793B
CN111583793B CN202010395333.4A CN202010395333A CN111583793B CN 111583793 B CN111583793 B CN 111583793B CN 202010395333 A CN202010395333 A CN 202010395333A CN 111583793 B CN111583793 B CN 111583793B
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electrode
gate
reset
flexible display
display screen
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CN111583793A (zh
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胡凯
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN202010395333.4A priority Critical patent/CN111583793B/zh
Priority to US17/254,358 priority patent/US20220140035A1/en
Priority to PCT/CN2020/096238 priority patent/WO2021227186A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
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    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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Abstract

本申请提供一种柔性显示屏，所述柔性显示屏包括基板和设置于所述基板上的多个子像素，每一所述子像素中设置有一单元驱动电路，每一所述单元驱动电路包括一驱动晶体管和一复位电容，每一所述驱动晶体管包括栅极、沟道层、源极、漏极，所述复位电容包括相对设置的第一复位电极和第二复位电极，所述第一复位电极设置于所述栅极朝向所述源极和所述漏极一侧，所述第二复位电极为所述栅极或者与所述栅极电连接，所述柔性显示屏包括一透光部和形成于所述透光部周围的互连区的一金属互连层，所述金属互连层与位于所述互连区的所述子像素中的单元驱动电路的第一复位电极电连接。

Description

柔性显示屏
技术领域
本申请涉及柔性显示领域，尤其涉及一种柔性显示屏。
背景技术
目前，作为市场主流的挖孔屏虽然提高了屏占比，但是挖孔设计使得屏幕在低灰阶下的显示效果变差。比如由于孔处的Array结构差异导致出现的水平分屏，出现在摄像孔位置附近的mura，也称为O-cut mura以及低灰阶下由于驱动补偿能力差而导致的颜色、亮度不均等。这些情况的产生均与驱动晶体管(driver thinfilmtransistor，DTFT)的电压补偿相关。比如由于挖孔导致的初始电压水平不连续导致的分屏现象。
发明内容
有鉴于此，本申请目的在于提供一种能够有效改善挖孔屏低灰阶下的颜色不均和亮度不均以及O-cut mura现象的柔性显示屏。
本申请提供一种柔性显示屏，所述柔性显示屏包括基板和设置于所述基板上的多个子像素，每一所述子像素中设置有一单元驱动电路，每一所述单元驱动电路包括一驱动晶体管和一复位电容，每一所述驱动晶体管包括栅极、沟道层、源极、漏极，所述复位电容包括相对设置的第一复位电极和第二复位电极，所述第一复位电极设置于所述栅极朝向所述源极和所述漏极一侧，所述第二复位电极为所述栅极或者与所述栅极电连接，所述柔性显示屏包括一透光部和形成于所述透光部周围的互连区的一金属互连层，所述金属互连层与位于所述互连区的所述子像素中的单元驱动电路的第一复位电极电连接。
在一种实施方式中，所述金属互连层设置于所述驱动晶体管远离所述基板一侧，并通过过孔与位于所述互连区的所述子像素中的单元驱动电路的第一复位电极电连接。
在一种实施方式中，所述驱动晶体管为双栅极薄膜晶体管，所述第一复位电极为所述双栅极薄膜晶体管的顶栅，所述第二复位电极为所述栅极，所述栅极为所述双栅极薄膜晶体管的底栅。
在一种实施方式中，所述底栅位于所述顶栅与所述沟道层之间。
在一种实施方式中，所述源极和漏极位于所述金属互连层与所述顶栅之间。
在一种实施方式中，所述沟道层位于所述顶栅与所述底栅之间。
在一种实施方式中，所述复位电容为与所述驱动晶体管电连接的存储电容，所述第一复位电极为所述存储电容的上极板。
在一种实施方式中，所述第二复位电极为所述栅极，所述栅极为所述存储电容的下极板。
在一种实施方式中，所述第二复位电极为所述存储电容的下极板，所述存储电容的下极板与所述栅极电连接。
在一种实施方式中，所述金属互连层包括金属网格图案，所述金属网格图案在电源电压线的平面上的正投影与电源电压线形成的图案重叠。
相较于现有技术，本申请所提供的柔性显示屏通过设置一金属互连层将多个单元驱动电路的复位电容的一个极板链接起来成网状结构，如此可以实现对不同的子像素的驱动晶体管施加一个相同的复位电压，降低屏幕由于挖孔等带来的驱动晶体管复位栅压差异，可以有效降低显示屏亮度、色度差异。由于被连接的驱动晶体管的复位电压处处相等，对复位电压进行调节时不会造成新的不良，使复位电压有一个较大的调节范围，可以有效提升显示屏的品味。
附图说明
为了更清楚地说明本申请中的技术方案，下面将对实施方式描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施方式，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请的一个实施方式的柔性显示屏的平面示意图和部分放大示意图。
图2为图1的柔性显示屏的单元驱动电路的等效电路图。
图3为图1的柔性显示屏的局部剖面示意图。
图4是图1的柔性显示屏的电源电压线与金属互连层的俯视示意图。
图5为本申请的另一个实施方式的柔性显示屏的局部剖面示意图。
图6为本申请的又一个实施方式的柔性显示屏的局部剖面示意图。
图7为图6柔性显示屏的等效电路图。
图8为本申请的另一个实施方式的柔性显示屏的局部剖面示意图。
具体实施方式
下面将结合本申请实施方式中的附图，对本申请中的技术方案进行清楚、完整地描述。显然，所描述的实施方式仅仅是本申请一部分实施方式，而不是全部的实施方式。基于本申请中的实施方式，本领域技术人员在没有做出创造性劳动前提下所获得的所有其他实施方式，都属于本申请保护的范围。
在本发明的描述中，需要说明的是，术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”、“第三”仅用于描述目的，而不能理解为指示或暗示相对重要性。
本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件，由于这里采用的晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本申请实施例中，为区分晶体管除栅极之外的两极，将其中一极称为源极，另一极称为漏极。按附图中的形态规定开关晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。此外本申请实施例所采用的晶体管可以包括P型晶体管和/或N型晶体管两种，其中，P型晶体管在栅极为低电平时导通，在栅极为高电平时截止，N型晶体管为在栅极为高电平时导通，在栅极为低电平时截止。
本申请提供一种柔性显示屏100，柔性显示屏100可以用于穿戴设备如智能手环、智能手表、虚拟现实(Virtual Reality，VR)设备；移动电话；电子书和电子纸；电视机；个人电脑；可折叠以及可卷曲柔性显示设备及照明设备等。柔性显示屏100可以是有机发光二极管(Organic Light-Emitting Diode，OLED)显示屏，量子点有机发光二极管(Quantum DotLight Emitting Diodes，QLED)显示面板等。
请一并参考图1至图3，图1为本申请的一个实施方式的柔性显示屏的平面示意图和部分放大示意图。在图1中，仅示意性地示出柔性显示屏的几个子像素和单元驱动电路。
柔性显示屏100包括基板10，设置于基板10上的驱动电路层20和电连接于驱动电路层20上的发光层30。基板10可以为双层聚酰亚胺柔性基板。发光层30包括依次层叠的阳极、空穴注入层、空穴传输层、发光层、电子传输层和阴极等。虽然未示出，柔性显示屏100还可以包括薄膜封装层等部件。
柔性显示屏100可划分为显示区AA和非显示区NAA。柔性显示屏100包括基板10和设置于显示区AA的基板10上的多个子像素100P。每一子像素100P中设置有一单元驱动电路1。驱动电路层20由单元驱动电路1构成。单元驱动电路1也可以称为像素补偿电路。每一单元驱动电路1包括一驱动晶体管DTFT和一复位电容20C。驱动晶体管DTFT是指驱动发光单元的晶体管，例如有机发光二极管的晶体管，其与子像素100P中的发光器件串联，流经发光器件的电流同时也全部流经相应的驱动晶体管DTFT。复位电容20C用于使驱动晶体管DTFT复位。复位电容20C包括相对设置的第一复位电极21和第二复位电极22。第一复位电极21设置于栅极朝向源极和漏极一侧，也可以说第一复位电极21设置于栅极远离基板10一侧。第一复位电极21设置于栅极朝向源极和漏极一侧。第一复位电极21与复位电压线电连接。复位电压线用于提供复位信号。在一种实施方式中，第二复位电极22为栅极。在另一种实施方式中，第二复位电极22与栅极电连接。
该单元驱动电路1可以为4T1C、5T1C、7T1C等现有技术中的像素补偿电路。以下，以单元驱动电路1为7T1C补偿电路为例说明本申请的技术方案。
请参考图2，单元驱动电路1包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、第七晶体管T7、存储电容Cst以及发光器件D。
第一晶体管T1的顶栅电性连接于第一节点a1，底栅浮空，第一晶体管T1的源极电性连接于第二节点a2，第一晶体管T1的漏极电性连接于第三节点a3。
第二晶体管T2的栅极电性连接于第一扫描信号，第二晶体管T2的源极电性连接于第一节点a1，第二晶体管T2的漏极电性连接于第三节点a3。
第三晶体管T3的栅极电性连接于第一扫描信号，第三晶体管T3的源极电性连接于数据信号DATA，第三晶体管T3的漏极电性连接于第二节点a2。第一扫描信号由本级栅极线Gn提供。数据信号由数据线提供。
第四晶体管T4的栅极电性连接于第二扫描信号，第四晶体管T4的源极电性连接于低电平Vi，第四晶体管T4的漏极电性连接于第一节点a1。低电平由复位电压线提供。第二扫描信号由上一级栅极线Gn-1提供。
第五晶体管T5的栅极电性连接于发光信号EM，第五晶体管T5的源极电性连接于第三节点a3，第五晶体管T5的漏极电性连接于第四节点a4。
第六晶体管T6的栅极电性连接于发光信号EM，第六晶体管T6的源极电性连接于第一电源信号VDD，第六晶体管T6的漏极电性连接于第二节点a2。第一电源信号VDD由电源电压线提供。
第七晶体管T7的栅极电性连接于第二扫描信号，第七晶体管T7的源极电性连接于低电平Vi，第七晶体管T7的漏极电性连接于第四节点a4。低电平由复位电压线提供，第二扫描信号由上一级栅极线Gn-1提供。
存储电容Cst的第一端电性连接于第一节点a1，第一电容的第二端电性连接于第一电源信号。
发光器件D的阳极端电性连接于第四节点a4，发光器件D的阴极端电性连接于第二电源信号。第二电源信号为接地信号。
第一晶体管T1即为单元驱动电路1的驱动晶体管DTFT。
请再次参考图3，在本实施方式中，每一驱动晶体管DTFT为双栅极薄膜晶体管。驱动晶体管DTFT包括依次层叠设置的沟道层CL，第一栅极GE1、即驱动晶体管DTFT的底栅，第二栅极GE2、即驱动晶体管DTFT的顶栅，源极SE和漏极DE。各层之间通过绝缘层绝缘隔开。第一复位电极21为双栅极薄膜晶体管的顶栅，即第二栅极GE2。第二复位电极22为双栅极薄膜晶体管的底栅，即第一栅极GE1。
柔性显示屏100包括一透光部100a和形成于透光部100a周围的互连区100b的一金属互连层23。透光部100a下方设置有感光元件，例如前置摄像头等。也就是说，柔性显示屏100为挖孔全面屏。互连区100b的面积和形状可以根据实际情况设定。只要能够解决透光部100a附近的灰阶下的颜色不均和亮度不均以及O-cut mura的问题即可。在本申请其他实施方式中，该互连区100b可以为柔性显示屏100的整面。金属互连层23与位于互连区100b的子像素100P中的单元驱动电路1的第一复位电极21，即第二栅极GE2电连接。
本申请不限定金属互连层23的位置。在一个实施方式中，为了避免干扰，金属互连层23设置于驱动晶体管DTFT远离基板10一侧，并通过过孔Via与位于互连区100b的子像素100P中的单元驱动电路1的第一复位电极21，即第二栅极GE2电连接。也就是说，在驱动晶体管DTFT的源极SE和漏极DE与发光层30的阳极31之间增加一层金属互连层23。金属互连层23与源极SE和漏极DE和阳极31之间通过绝缘层隔开，绝缘层例如是平坦化层。从图上竖直方向看，第一栅极GE1位于第二栅极GE2与沟道层CL之间。源极SE和漏极DE位于金属互连层23与第二栅极GE2之间。在其他实施方式中，金属互连层23也可以设置于与驱动晶体管DTFT的源极SE和漏极DE同层。
本申请不限定金属互连层23的形状。为了保证柔性显示屏100的开口率，金属互连层23包括金属网格图案23a。请参考图4，金属网格图案23a包括多个顶点231以及多个连接于相邻两个顶点231之间的连接线231，多个顶点231呈阵列分布，多个顶点231在第一方向D1上按照Z字形排列，在第二方向D2上按照直线排列。金属网格图案23a的每一顶点231可以电连接一个第一复位电极21。
在一种实施方式中，金属网格图案23a在电源电压线VDDL的平面上的正投影与电源电压线VDDL形成的图案重叠。例如，相邻两个顶点231之间的间距为20微米至50微米。在一个实施方式中，连接线231与复位电压线使用相同工艺制造，且线宽相等。例如，连接线231的线宽为1微米至3微米。
此外，金属网格图案23a通过位于过孔中的金属连接部电连接至第一复位电极21。金属网格图案23a与金属连接部是一体的，可以在同一制程中形成。
本申请也不限定金属互连层23的材料，其材料可以使用与驱动晶体管DTFT的栅极、源漏极相同的金属材料，例如，钼、铝、铬等，也可以使用透明导体材料，例如氧化铟锡。
当Gn-1打开，输入复位电压时，由GOA控制的同一行子像素100P的单元驱动电路1的驱动晶体管DTFT被同时复位，且通过金属互连层23电连接在一起的多个单元驱动电路1的驱动晶体管DTFT被施加相同的复位电压。
相较于现有技术，本申请所提供的柔性显示屏通过设置一金属互连层将多个单元驱动电路的复位电容的一个极板链接起来成网状结构，如此可以实现对不同的子像素的驱动晶体管施加一个相同的复位电压，降低屏幕由于挖孔等带来的驱动晶体管复位栅压差异，可以有效降低显示屏亮度、色度差异。由于被连接的驱动晶体管的复位电压处处相等，对复位电压进行调节时不会造成新的不良，使复位电压有一个较大的调节范围，可以有效提升显示屏的品味。
请参考图5，本申请第二实施方式还提供一种柔性显示屏200。柔性显示屏200的结构与柔性显示屏100结构大致相同，区别点仅在于：双栅极薄膜晶体管的结构不同。沟道层CL位于顶栅GE2与底栅GE1之间。本实施方式的等效电路图与第一实施方式的等效电路图相同。
请参考图6和7，本申请第三实施方式还提供一种柔性显示屏300。柔性显示屏300的结构与柔性显示屏100结构大致相同，区别点仅在于：驱动晶体管DTFT为仅具有一个栅极GE1的单栅极薄膜晶体管。从等效电路图7上来看，复位电容为20C为与驱动晶体管DTFT电连接的存储电容Cst。第一复位电极21为存储电容Cst的上极板Cst-1。第二复位电极22为栅极GE1，即栅极GE1为存储电容Cst的下极板Cst-2。本申请中不限定存储电容Cst的上极板Cst-1的位置。在一种实施方式中，存储电容Cst的上极板Cst-1位于栅极GE1与源极SE、漏极DE之间。在另一种实施方式中，存储电容Cst的上极板Cst-1位于与源极SE、漏极DE同层。存储电容Cst的上极板Cst-1与存储电容Cst的下极板Cst-2相对设置。
在本实施方式中，驱动晶体管DTFT为仅具有一个栅极GE1的单栅极薄膜晶体管，通过将存储电容Cst的上极板Cst-1用作第一复位电极21，也能得到与第一实施方式相同的技术效果。
请参考图8，本申请第四实施方式还提供一种柔性显示屏400。本实施方式的等效电路图同图7。从等效电路图7上来看，复位电容为20C为与驱动晶体管DTFT电连接的存储电容Cst。第一复位电极21为存储电容Cst的上极板Cst-1。柔性显示屏400的结构与柔性显示屏300结构大致相同，区别点仅在于：存储电容Cst的上极板Cst-1和下极板Cst-2均独立于栅极GE1设置。栅极GE1不是存储电容Cst的下极板Cst-2，第二复位电极22为存储电容Cst的下极板Cst-2。但，存储电容Cst的下极板Cst-2与栅极GE1电连接。本申请中不限定存储电容Cst的上极板Cst-1和存储电容Cst的下极板Cst-2的位置。在一个实施方式中，存储电容Cst的上极板Cst-1与源极SE和漏极DE位于同层。存储电容Cst的下极板Cst-2与栅极GE1位于同层。
以上对本申请实施方式提供了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施方式的说明只是用于帮助理解本申请。同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上，本说明书内容不应理解为对本申请的限制。

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1.一种柔性显示屏，所述柔性显示屏包括基板和设置于所述基板上的多个子像素，每一所述子像素中设置有一单元驱动电路，其特征在于，每一所述单元驱动电路包括一驱动晶体管和一复位电容，每一所述驱动晶体管包括栅极、沟道层、源极、漏极，所述复位电容包括相对设置的第一复位电极和第二复位电极，所述第一复位电极设置于所述栅极朝向所述源极和所述漏极一侧，所述第二复位电极为所述栅极或者与所述栅极电连接，所述柔性显示屏包括一透光部和形成于所述透光部周围的互连区的一金属互连层，所述金属互连层与位于所述互连区的所述子像素中的单元驱动电路的第一复位电极电连接。
2.如权利要求1所述的柔性显示屏，其特征在于，所述金属互连层设置于所述驱动晶体管远离所述基板一侧，并通过过孔与位于所述互连区的所述子像素中的单元驱动电路的第一复位电极电连接。
3.如权利要求1所述的柔性显示屏，其特征在于，所述驱动晶体管为双栅极薄膜晶体管，所述第一复位电极为所述双栅极薄膜晶体管的顶栅，所述第二复位电极为所述栅极，所述栅极为所述双栅极薄膜晶体管的底栅。
4.如权利要求3所述的柔性显示屏，其特征在于，所述底栅位于所述顶栅与所述沟道层之间。
5.如权利要求4所述的柔性显示屏，其特征在于，所述源极和漏极位于所述金属互连层与所述顶栅之间。
6.如权利要求3所述的柔性显示屏，其特征在于，所述沟道层位于所述顶栅与所述底栅之间。
7.如权利要求1所述的柔性显示屏，其特征在于，所述复位电容为与所述驱动晶体管电连接的存储电容，所述第一复位电极为所述存储电容的上极板。
8.如权利要求7所述的柔性显示屏，其特征在于，所述第二复位电极为所述栅极，所述栅极为所述存储电容的下极板。
9.如权利要求7所述的柔性显示屏，其特征在于，所述第二复位电极为所述存储电容的下极板，所述存储电容的下极板与所述栅极电连接。
10.如权利要求1所述的柔性显示屏，其特征在于，所述金属互连层包括金属网格图案，所述金属网格图案在电源电压线的平面上的正投影与电源电压线形成的图案重叠。
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