CN111538227A - High-precision time testing method, system and storage medium - Google Patents

High-precision time testing method, system and storage medium Download PDF

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Publication number
CN111538227A
CN111538227A CN202010530628.8A CN202010530628A CN111538227A CN 111538227 A CN111538227 A CN 111538227A CN 202010530628 A CN202010530628 A CN 202010530628A CN 111538227 A CN111538227 A CN 111538227A
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China
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time
common
phase
frequency signal
precision
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汪洋
滕玲
丁慧霞
王智慧
张庚
孟萨出拉
吴赛
杨德龙
李健
王亚男
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State Grid Corp of China SGCC
China Electric Power Research Institute Co Ltd CEPRI
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State Grid Corp of China SGCC
China Electric Power Research Institute Co Ltd CEPRI
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    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F10/00Apparatus for measuring unknown time intervals by electric means
    • G04F10/06Apparatus for measuring unknown time intervals by electric means by measuring phase
    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F10/00Apparatus for measuring unknown time intervals by electric means
    • G04F10/005Time-to-digital converters [TDC]

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Abstract

The invention discloses a high-precision time testing method, a high-precision time testing system and a storage medium, wherein the method comprises the following steps of: 1) acquiring time information and time deviation values introduced by space transmission at two common-view ends from a satellite by using a common-mode common-view measurement technology; 2) recovering high-precision time signals and frequency signals by using an NCO frequency synthesis technology according to the time information and the time deviation value obtained in the step 1); 3) and (2) acquiring a time-frequency signal of the tested equipment, comparing the time-frequency signal of the tested equipment with the time-frequency signal acquired in the step (2) by utilizing a TDC (time-digital converter) phase demodulation technology to acquire a phase deviation value, and adjusting the phase deviation value to acquire the resolution of a local time-frequency signal to finish high-precision time testing.

Description

High-precision time testing method, system and storage medium
Technical Field
The invention belongs to the field of time testers, and relates to a high-precision time testing method, a high-precision time testing system and a storage medium.
Background
The test accuracy of the current time tester is generally in the level of 100ns, the resolution is in 10ns, and the requirement of high-accuracy time measurement cannot be met.
With the development of science and technology, the use of various high-precision equipment and the construction of 5G, the requirements and standards for the equipment are higher and higher, and the test requirements of time precision are from 1 microsecond to 100ns and even to 10 ns; the time precision of 5G end-to-end is required to be controlled within +/-130 ns, and the time delay between the input and the output of the equipment cannot exceed 5 ns. How to measure with such high precision places higher demands on the equipment. To address these high accuracy measurement requirements, the resolution and accuracy of the time measurement needs to be improved.
Disclosure of Invention
The present invention is directed to overcoming the above-mentioned shortcomings in the prior art, and providing a method, a system and a storage medium for high-precision time measurement, which can effectively improve the resolution and precision of time measurement.
In order to achieve the purpose, the high-precision time testing method comprises the following steps:
1) acquiring time information and time deviation values introduced by space transmission at two common-view ends from a satellite by using a common-mode common-view measurement technology;
2) recovering high-precision time signals and frequency signals by using an NCO frequency synthesis technology according to the time information and the time deviation value obtained in the step 1);
3) and (3) acquiring a time-frequency signal of the tested equipment, comparing the time-frequency signal of the tested equipment with the time-frequency signal obtained in the step 2) by utilizing a TDC (time-frequency discrimination) phase discrimination technology to obtain a phase deviation value, and adjusting according to the phase deviation value to obtain the resolution of a local time-frequency signal so as to finish high-precision time testing.
The specific operation of the step 1) is as follows:
the same satellite is observed simultaneously with the main station or the reference source, and the intercommunicated data between the data channel and the main station or the reference source is analyzed to obtain the time deviation introduced by space transmission at the two common-view ends;
preliminary time information is obtained from the satellite.
The specific operation of the step 2) is as follows:
and recovering by using a digital control oscillator and a digital phase-locked loop inside the local FPGA according to the time information and the time deviation value obtained in the step 1) to obtain high-precision time and frequency signals.
A high accuracy time testing system comprising:
the common-mode common-view receiving module is used for acquiring time information and a time deviation value introduced by space transmission at two common-mode common-view ends by utilizing a common-mode common-view measuring technology;
the digital control oscillator is connected with the common-mode common-view receiving module and used for recovering a high-precision local time-frequency signal by using an NCO frequency synthesis technology according to the obtained time information and the time deviation value;
and the measuring module is connected with the tested equipment and the digital control oscillator and used for acquiring a time-frequency signal of the tested equipment, comparing the time-frequency signal of the tested equipment with a local time-frequency signal acquired by the digital control oscillator by utilizing a TDC (time-frequency digital converter) phase discrimination technology to obtain a phase deviation value, and adjusting according to the phase deviation value to obtain the resolution of the local time-frequency signal.
The receiving precision of the common-mode common-view receiving module is better than 5ns,
the measuring module comprises a signal output end, a measured signal input end, a clock signal input end, a tap delay chain, a decoding unit, a coarse counter, an accumulator and a plurality of latches, wherein the tap delay chain is formed by sequentially connecting the delay modules in series, the clock signal input end is connected with the Clk end of each latch, the measured signal input end is connected with the input end of the coarse counter and the input end of the tap delay chain, one latch corresponds to one delay module, the output end of the delay module is connected with the D end of the corresponding latch, the Q end of each latch is connected with the input end of the decoding unit, the output end of the decoding unit and the output end of the coarse counter are connected with the input end of the accumulator, and the output end of the accumulator is connected with the signal output end.
The digital control oscillator comprises a phase counter, a first phase discriminator and a second phase discriminator, wherein the output end of the common-mode common-view receiving module is used as a reference clock Fs end and connected with the input end of the first phase discriminator, the output end of the first phase discriminator and the output end of the phase counter are connected with the input end of the second phase discriminator, and the output end of the second phase discriminator is connected with the input end of the phase counter.
When the delay of the tap delay chain is 0.1ns, the measurement accuracy is about 0.1 ns.
A computer-readable storage medium storing a program which, when executed by a processor, implements the steps of the high-precision time testing method.
The invention has the following beneficial effects:
when the high-precision time testing method, the high-precision time testing system and the storage medium are specifically operated, the common-mode common-view measurement technology is utilized to obtain time information and a time deviation value introduced by space transmission at two common-view ends, then the NCO frequency synthesis technology is utilized to recover a high-precision local time-frequency signal so as to eliminate the time deviation introduced by space transmission and improve the precision of time acquisition, and then the TDC phase discrimination technology is utilized to obtain the phase deviation value of the time-frequency signal and the local time-frequency signal of the tested equipment, namely the TDC technology is utilized to improve the resolution of local testing.
Furthermore, a high-precision local time-frequency signal is recovered by using a digital control oscillator and a digital phase-locked loop in the local FPGA according to the time information obtained in the step and the time deviation value introduced by the common-view two ends due to space transmission, so that the accuracy of the recovered local video signal is higher, the remote operation is avoided, and the cost can be reduced.
Drawings
The accompanying drawings, which form a part of the specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a circuit diagram of the structure of the numerically controlled oscillator according to the present invention;
FIG. 3 is a circuit diagram of the structure of the measuring module of the present invention.
The receiver comprises a common-mode common-view receiving module 1, a digital control oscillator 2, a measuring module 3, a device to be tested 4, a first phase discriminator 5, a second phase discriminator 6, a phase counter 7, a decoding unit 8, a coarse counter 9 and an accumulator 10.
Detailed Description
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The following detailed description is exemplary in nature and is intended to provide further details of the invention. Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention.
The high-precision time testing method comprises the following steps of:
1) acquiring time information and time deviation values introduced by space transmission at two common-view ends from a satellite by using a common-mode common-view measurement technology;
the specific operation of the step 1) is as follows: the same satellite is observed simultaneously with the main station or the reference source, and the intercommunicated data between the data channel and the main station or the reference source is analyzed to obtain the time deviation introduced by space transmission at the two common-view ends; preliminary time information is obtained from the satellite.
2) Recovering a high-precision local time-frequency signal by using an NCO frequency synthesis technology according to the time information and the time deviation value obtained in the step 1);
the specific operation of the step 2) is as follows:
and recovering by using a digital control oscillator 2 and a digital phase-locked loop in the local FPGA according to the time information obtained in the step 1) and the time deviation value introduced by the common view two ends due to space transmission to obtain a high-precision local time-frequency signal.
3) And acquiring a time-frequency signal of the tested equipment 4, acquiring the time-frequency signal of the tested equipment 4 and the local time-frequency signal obtained in the step 2) by using a TDC (time-frequency discrimination) phase discrimination technology to obtain the phase deviation amount of the time-frequency signal of the tested equipment 4 and the local time-frequency signal obtained in the step 2), and adjusting according to the phase deviation amount to obtain the resolution of the local time-frequency signal to finish high-precision time testing.
It should be noted that after having local high-precision time and frequency, the external input signal and the internal related signal are collected and compared to complete the test measurement, and the granularity of the signal comparison process determines the test resolution.
The main principle of the TDC phase discrimination technology is as follows: the target signal is delayed by a tap delay chain (the delay of the delay chain is generally ps-level, such as 100ps or 200ps, etc.), the signal delayed by the delay chain is sampled by using a sampling clock, the delayed value is latched, and then the signal is converted into a fine count value after passing through a decoding unit 8.
Referring to fig. 1, the high-precision time testing system according to the present invention includes:
the common-mode common-view receiving module 1 is used for acquiring time information and a time deviation value introduced by space transmission at two common-mode common-view ends from a satellite by using a common-mode common-view measuring technology;
the numerically controlled oscillator 2 is connected with the common-mode common-view receiving module 1 and used for recovering a high-precision local time-frequency signal by using an NCO frequency synthesis technology according to the obtained time information and the time deviation value;
and the measuring module 3 is connected with the tested device 4 and the digitally controlled oscillator 2 and is used for acquiring a time-frequency signal of the tested device 4, comparing the time-frequency signal of the tested device 4 with a local time-frequency signal acquired by the digitally controlled oscillator 2 by using a TDC (time-frequency digital) phase discrimination technology to acquire a phase deviation value, and adjusting according to the phase deviation value to acquire the resolution of the local time-frequency signal.
Referring to fig. 2, the digitally controlled oscillator 2 includes a phase counter 7, a first phase detector 5 and a second phase detector 6, wherein an output end of the common mode common view receiving module 1 is connected to an input end of the first phase detector 5 as a reference clock Fs end, an output end of the first phase detector 5 and an output end of the phase counter 7 are connected to an input end of the second phase detector 6, and an output end of the second phase detector 6 is connected to an input end of the phase counter 7.
When the digital control oscillator 2 works, the time information output by the common-mode common-view receiving module 1 and a reference clock Fs end carry out phase difference detection of two signals at the first phase discriminator 5, in each clock period, the value stored in a phase word register in a phase counter 7 is accumulated by a phase accumulator, wherein the phase accumulator consists of the phase counter 7 and a second phase discriminator 6, the traditional digital control oscillator 2 can produce sine waves through a D/A and a filtering module, and the digital control oscillator 2 outputs square waves, so that the D/A and the filtering module are removed, and the structure of the digital control oscillator 2 is simplified.
Referring to fig. 3, the measurement module 3 includes a signal output terminal, a measured signal input terminal, a clock signal input terminal, a tap delay chain, a decoding unit 8, a coarse counter 9, an accumulator 10, and a plurality of latches, wherein the tap delay chain is formed by sequentially connecting a plurality of delay modules in series, the clock signal input terminal is connected to the Clk terminal of each latch, the measured signal input terminal is connected to the input terminal of the coarse counter 9 and the input terminal of the tap delay chain, one latch corresponds to one delay module, the output terminal of the delay module is connected to the D terminal of the corresponding latch, the Q terminal of each latch is connected to the input terminal of the decoding unit 8, the output terminals of the decoding unit 8 and the coarse counter 9 are connected to the input terminal of the accumulator 10, and the output terminal of the accumulator 10 is connected to the signal output terminal.
The main principle of the measuring module 3 is: the target signal Hit is delayed by a tap delay chain (the delay of the delay chain is generally ps-level, such as 100ps or 200ps, etc.), the signal delayed by the delay chain is sampled by using a sampling clock Clk, the delayed value is latched and converted into a fine count value after being decoded by a decoding unit 8, a coarse counter 9 uses the sampling clock Clk to count the Hit signal, and the measurement result of the measurement module 3 consists of the count value of the coarse counter 9 and a plurality of fine count values. The measurement accuracy is mainly influenced by the delay value of the tap delay chain, and when the delay of the tap delay chain is 0.1ns, the measurement accuracy is about 0.1 ns.
In practical application, the receiving precision of a common satellite receiver is at the level of 50-100ns, and the precision of an input source can be improved to the level better than 5ns by introducing a common mode co-viewing technology.
On the basis of obtaining a high-precision time source, a phase-locking link adopts a digital phase-locking loop, under the action of a reference clock (Fs, NCO running reference frequency, target signals are generated by frequency division of Fs, the frequency of the frequency division control K: N bit output signal frequency control words) of a digital control oscillator 2, the value stored in a phase word register in each clock period phase counter 7 is accumulated by a phase accumulator, and the resolution of the digital control oscillator 2, the clock period and the number of bits of the digital control oscillator 2 are in a proportional relation: Δ f ═ Fs x 2-NFs is the frequency of the local clock, and a 33-bit numerically controlled oscillator 2 is adopted, so that the resolution of the numerically controlled oscillator 2 can reach 1x10-10Can satisfy ns level (1x 10)-9) Time accuracy requirements.
The input signal is sampled and then compared with local high-precision time for measurement, the input signal is obtained through TDC measurement, the measurement result of the measurement module 3 is composed of a coarse counter 9 and a fine counter, the measurement precision is mainly influenced by a delay value of a tap delay chain, and if the delay of the tap delay chain is 100ps, the measurement precision is about 100 ps-0.1 ns.
On the basis of the method and the system of the invention, the invention also provides a computer readable storage medium, which stores a program, and the program realizes the steps of the high-precision time testing method when being executed by a processor.
Finally, the invention combines the common-mode common-view measurement technology, the NCO frequency synthesis technology and the TDC phase discrimination technology to obtain high-precision time and high test resolution, thereby meeting the requirements of laboratories and field portable tests.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, flash memory, SD card, optical storage, etc.) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (9)

1. A high-precision time testing method is characterized by comprising the following steps:
1) acquiring time information and time deviation values introduced by space transmission at two common-view ends from a satellite by using a common-mode common-view measurement technology;
2) recovering a high-precision local time-frequency signal by using an NCO frequency synthesis technology according to the time information and the time deviation value obtained in the step 1);
3) and (3) acquiring a time-frequency signal of the tested equipment (4), comparing the time-frequency signal of the tested equipment (4) with the local time-frequency signal acquired in the step (2) by utilizing a TDC (time-digital converter) phase demodulation technology to acquire a phase deviation value, and adjusting according to the phase deviation value to acquire the resolution of the local time-frequency signal to finish high-precision time testing.
2. The high-precision time testing method according to claim 1, characterized in that the specific operations of step 1) are as follows:
the same satellite is observed simultaneously with the main station or the reference source, and the intercommunicated data between the data channel and the main station or the reference source is analyzed to obtain a time deviation value introduced by space transmission at both ends of the common view;
preliminary time information is obtained from the satellite.
3. The high-precision time testing method according to claim 1, wherein the specific operations of step 2) are as follows:
and (2) recovering by using a digital control oscillator (2) and a digital phase-locked loop inside the local FPGA according to the time information obtained in the step 1) and the time deviation value introduced by the two common-view ends due to space transmission to obtain a high-precision local time-frequency signal.
4. A high-precision time testing system is characterized by comprising the following steps:
the common-mode common-view receiving module (1) is used for acquiring time information and a time deviation value introduced by space transmission at two common-mode common-view ends from a satellite by utilizing a common-mode common-view measuring technology;
the digital control oscillator (2) is connected with the common-mode common-view receiving module (1) and is used for recovering a high-precision local time-frequency signal by using an NCO frequency synthesis technology according to the obtained time information and the time deviation value;
and the measuring module (3) is connected with the tested equipment (4) and the digital control oscillator (2) and is used for acquiring a time-frequency signal of the tested equipment (4), comparing the time-frequency signal of the tested equipment (4) with a local time-frequency signal acquired by the digital control oscillator (2) by utilizing a TDC phase discrimination technology to acquire a phase deviation value, and adjusting according to the phase deviation value to acquire the resolution of the local time-frequency signal.
5. A high accuracy time test system according to claim 4, characterized in that the common mode common view receiving module (1) has a receiving accuracy better than 5 ns.
6. A high accuracy time testing system according to claim 4, characterized in that the numerically controlled oscillator (2) comprises a phase counter (7), a first phase detector (5) and a second phase detector (6), wherein the output of the common mode common view receiving module (1) is connected to the input of the first phase detector (5) as the reference clock Fs terminal, the output of the first phase detector (5) and the output of the phase counter (7) are connected to the input of the second phase detector (6), and the output of the second phase detector (6) is connected to the input of the phase counter (7).
7. A high accuracy time test system as claimed in claim 4, wherein the measuring module (3) comprises a signal output terminal, a signal input terminal to be tested, a clock signal input terminal, a tapped delay chain, a decoding unit (8), a coarse counter (9), an accumulator (10) and a plurality of latches, wherein the tapped delay chain is formed by connecting a plurality of delay modules in series in sequence, the clock signal input terminal is connected with the Clk terminal of each latch, the signal input terminal to be tested is connected with the input terminal of the coarse counter (9) and the input terminal of the tapped delay chain, wherein one latch corresponds to one delay module, the output terminal of the delay module is connected with the D terminal of the corresponding latch, the Q terminal of each latch is connected with the input terminal of the decoding unit (8), the output terminal of the decoding unit (8) and the output terminal of the coarse counter (9) are connected with the input terminal of the accumulator (10), the output of the accumulator (10) is connected to the signal output.
8. A high accuracy time test system according to claim 7, wherein when the delay of the tapped delay chain is 0.1ns, the measurement accuracy is about 0.1 ns.
9. A computer-readable storage medium storing a program, wherein the program when executed by a processor implements the steps of the high-precision time testing method according to any one of claims 1 to 3.
CN202010530628.8A 2020-06-11 2020-06-11 High-precision time testing method, system and storage medium Pending CN111538227A (en)

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Application publication date: 20200814