CN111524705A - Planar capacitor with stacked structure and manufacturing method thereof - Google Patents
Planar capacitor with stacked structure and manufacturing method thereof Download PDFInfo
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- CN111524705A CN111524705A CN202010355691.2A CN202010355691A CN111524705A CN 111524705 A CN111524705 A CN 111524705A CN 202010355691 A CN202010355691 A CN 202010355691A CN 111524705 A CN111524705 A CN 111524705A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 117
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000004020 conductor Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 5
- 239000007769 metal material Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000009975 flexible effect Effects 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 12
- 238000005452 bending Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 239000002861 polymer material Substances 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 2
- 229910002113 barium titanate Inorganic materials 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- BRLQWZUYTZBJKN-UHFFFAOYSA-N Epichlorohydrin Chemical compound ClCC1CO1 BRLQWZUYTZBJKN-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000006068 polycondensation reaction Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 150000005846 sugar alcohols Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
- H01G4/385—Single unit multiple capacitors, e.g. dual capacitor in one coil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
- H01G4/008—Selection of materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/14—Organic dielectrics
- H01G4/18—Organic dielectrics of synthetic material, e.g. derivatives of cellulose
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
The planar capacitor with the stacked structure comprises a plurality of layers of planar electrodes and a plurality of layers of dielectric layers, wherein the plurality of layers of planar electrodes are arranged at intervals, the dielectric layers are connected between every two adjacent planar electrodes to form a sub-capacitor, and the plurality of layers of planar electrodes and the plurality of layers of dielectric layers are stacked to form a plurality of sub-capacitors connected in parallel. The planar capacitor with the stacked structure has high capacitance density and large area, can ensure the flexible characteristic of the planar capacitor with the stacked structure, can reduce the difficulty of the production process, and is beneficial to reducing the production cost. The invention also relates to a manufacturing method of the planar capacitor.
Description
Technical Field
The invention relates to the technical field of capacitors, in particular to a planar capacitor with a stacked structure and a manufacturing method thereof.
Background
The current planar capacitor is a planar capacitor prepared by a polymer material system based on barium titanate particles and epoxy resin mixed and dispersed, and a copper foil (serving as two-end electrodes of the planar capacitor) and other auxiliary materials (such as a dispersing agent and a curing agent), wherein the polymer material is required to ensure high dielectric constant and ensure viscosity between the polymer material and between the polymer material and the copper foil so as to prevent the planar capacitor from falling off and poor layering during application; wherein barium titanate is a strong dielectric compound material, and the epoxy resin is a generic name of a polymer containing more than two epoxy groups in a molecule, and is a polycondensation product of epichlorohydrin and bisphenol A or polyhydric alcohol. Therefore, the dielectric constant of the dielectric material between the two electrodes of the planar capacitor is generally not high, and is about 5 to 40.
Fig. 1 is a schematic partial sectional structure view of a conventional planar capacitor, and as shown in fig. 1, the planar capacitor includes a first electrode 21, a second electrode 22, and a dielectric layer 23 disposed between the first electrode 21 and the second electrode 22. The capacitance density (capacitance value per unit area) of the existing planar capacitor is generally not high, about 130pF/cm2～10nF/cm2And the production process is complex and difficult, and the thickness of the dielectric layer 23 is generally between 3 and 25um, so the requirements on factory equipment and technical personnel are very strict, and the production cost of an enterprise is high.
Disclosure of Invention
In view of this, the present invention provides a planar capacitor with a stacked structure, which has high capacitance density and large area, and not only can ensure the flexible property of the planar capacitor with the stacked structure, but also can reduce the difficulty of the production process, and is beneficial to reducing the production cost.
The planar capacitor with the stacked structure comprises a plurality of layers of planar electrodes and a plurality of layers of dielectric layers, wherein the plurality of layers of planar electrodes are arranged at intervals, the dielectric layers are connected between two adjacent planar electrodes to form a sub-capacitor, and the plurality of layers of planar electrodes and the plurality of layers of dielectric layers are stacked to form a plurality of parallel sub-capacitors.
In an embodiment of the present invention, the two outermost planar electrodes of the planar capacitor defining the stacked structure are a first planar electrode and a second planar electrode, respectively, the first planar electrode and the second planar electrode are made of a non-transparent metal material, and the planar electrode between the first planar electrode and the second planar electrode is made of a conductive material.
In an embodiment of the invention, the dielectric constant of the dielectric layer is 5 to 100.
In an embodiment of the present invention, the planar capacitor of the stacked structure has a capacitance density of 10nF/cm2～10uF/cm2。
In the embodiment of the present invention, the thickness of each of the planar electrodes is 8um, 12um, 18um, 25um, 35 um.
In an embodiment of the present invention, the plurality of dielectric layers includes a plurality of first dielectric layers and at least one second dielectric layer, and each of the first dielectric layers and the second dielectric layers has a different dielectric constant.
In an embodiment of the present invention, the area of the planar capacitor of the stacked structure is greater than or equal to 500mm × 400 mm.
The invention also provides a manufacturing method of the planar capacitor, which comprises the following steps:
stacking a plurality of layers of planar electrodes and a plurality of layers of dielectric layers;
the planar electrodes are arranged at intervals, the dielectric layers are connected between two adjacent planar electrodes to form sub-capacitors, and the planar electrodes and the dielectric layers are stacked to form a plurality of sub-capacitors connected in parallel.
In an embodiment of the present invention, the step of stacking a plurality of the planar electrodes and a plurality of the dielectric layers on top of each other includes:
the planar electrode comprises a first surface and a second surface which are opposite, and the dielectric layer is coated on the first surface of the planar electrode;
combining the second surface of the other planar electrode with the dielectric layer coated in the first step to form the sub-capacitor;
coating the dielectric layer on the first surface of the planar electrode of the sub-capacitor;
combining the second surface of the other planar electrode with the dielectric layer coated in the step three to form another sub-capacitor;
and step five, repeating the step three and the step four to form a plurality of sub-capacitors connected in parallel.
In an embodiment of the present invention, the step of stacking a plurality of the planar electrodes and a plurality of the dielectric layers on top of each other includes:
the planar electrodes comprise a first surface and a second surface which are opposite, and the dielectric layer is coated on the first surface of each planar electrode;
and combining the second surfaces of the planar electrodes with the dielectric layer on the other planar electrode in sequence to form a plurality of parallel sub-capacitors.
The planar capacitor of the stacked structure is formed by stacking a plurality of sub-capacitors which are connected in parallel, the capacitor density is high, the area is large, the flexible characteristic of the planar capacitor of the stacked structure can be guaranteed, the production process difficulty can be reduced, and the production cost can be reduced. In addition, the planar capacitor of the stacked structure still maintains the characteristics of the planar capacitor of the common stacked structure, such as bending resistance, high temperature resistance and the like.
Drawings
Fig. 1 is a partial sectional structural view of a planar capacitor of a conventional stacked structure.
Fig. 2 is a partial sectional structural view of a planar capacitor of a stacked structure of the present invention.
Detailed Description
First embodiment
Fig. 2 is a schematic partial sectional structure diagram of a planar capacitor with a stacked structure according to the present invention, as shown in fig. 2, the planar capacitor with a stacked structure includes a plurality of planar electrodes 11 and a plurality of dielectric layers 12, the planar electrodes 11 are disposed at intervals, the dielectric layers 12 are connected between two adjacent planar electrodes 11 to form sub-capacitors 13, and the planar electrodes 11 and the dielectric layers 12 are stacked to form a plurality of sub-capacitors 13 connected in parallel. The planar capacitor with the stacked structure is formed by stacking a plurality of sub-capacitors 13 which are connected in parallel, the capacitor density is high, the area is large, the flexible characteristic of the planar capacitor with the stacked structure can be guaranteed, the difficulty of the production process can be reduced, and the production cost can be reduced. In addition, the planar capacitor of the stacked structure still maintains the characteristics of the planar capacitor of the common stacked structure, such as bending resistance, high temperature resistance and the like.
Further, the capacitance theoretical characteristic formula of the planar capacitor of the stacked structure is as follows:
wherein C is the capacitance value of the planar capacitor with the stacked structure, A is the facing area of two adjacent planar electrodes 11 of the planar capacitor with the stacked structure, and DkIs the dielectric constant of the dielectric layer 12, K is a constant, and t is the distance between two adjacent planar electrodes 11 of the planar capacitor of the stacked structure. From the calculation formula, it can be known that the capacitance value C of the planar capacitor of the stacked structure is directly proportional to the facing area a of the planar capacitor of the stacked structure, inversely proportional to the distance t between two adjacent planar electrodes 11, and directly proportional to the dielectric constant of the dielectric layer 12. The capacitance per unit area (i.e. the capacitance density C of the planar capacitor with stacked structure) is also obtainedd) The dielectric constant of the dielectric layer 12 is proportional to the distance t between two adjacent planar electrodes 11, which is as follows:
further, the planar capacitor of the stacked structure of the present invention is formed by connecting a plurality of sub-capacitors 13 in parallel, and the capacitance value C after being connected in parallel is equal to the sum of the capacitance values (C1, C2, C3, C4 … …) of the plurality of sub-capacitors 13, that is, the capacitance value C after being connected in parallel is C1+ C2+ C3+ C4+ … … Cn, where n is the nth sub-capacitor 13.
It should be noted that the plurality of sub-capacitors 13 of the planar capacitor of the stacked structure of the present invention are connected in parallel, wherein even number of the planar electrodes 11 are electrically connected, and odd number of the planar electrodes 11 are electrically connected, so as to ensure that the planar capacitor of the stacked structure has a larger capacitance density.
Further, the two plane electrodes 11 at the outermost sides of the plane capacitor defining the stacked structure are a first plane electrode and a second plane electrode, respectively, the first plane electrode and the second plane electrode are made of a non-transparent metal material, and the plane electrode 11 between the first plane electrode and the second plane electrode is made of a conductive material, such as a transparent conductive material.
Furthermore, the first planar electrode and the second planar electrode are made of copper materials, the planar electrode 11 between the first planar electrode and the second planar electrode is made of Indium Tin Oxide (ITO) materials, and the planar electrode 11 is made of different materials, so that the planar capacitor with a stacked structure is light and thin.
Further, the dielectric constant of the dielectric layer 12 is 5 to 100, and preferably, the dielectric constant of the dielectric layer 12 is 5 to 40. In the embodiment, the dielectric layer 12 is made of a polymer dielectric material, and has characteristics similar to PI (polyimide insulating resin material), such as high temperature resistance and good bending performance.
Further, the capacitance density of the planar capacitance of the stacked structure was 10nF/cm2～10uF/cm2。
Further, the thickness of each planar electrode 11 is 8um, 12um, 18um, 25um, 35 um.
Further, the multi-layer dielectric layer 12 includes a plurality of first dielectric layers and at least one second dielectric layer, and each of the first dielectric layers and the second dielectric layers has a different dielectric constant. It is worth mentioning that the multi-layer dielectric layer 12 can be made of various materials, and can be freely selected according to actual needs.
Further, the area of the planar capacitor of the stacked structure is greater than or equal to 500mm × 400 mm.
Second embodiment
The invention also relates to a manufacturing method of the planar capacitor, which comprises the following steps:
the multilayer planar electrode 11 and the multilayer dielectric layer 12 are stacked;
the multilayer planar electrodes 11 are arranged at intervals, the dielectric layers 12 are connected between two adjacent planar electrodes 11 to form sub-capacitors 13, and the multilayer planar electrodes 11 and the multilayer dielectric layers 12 are stacked to form a plurality of sub-capacitors 13 connected in parallel. The planar capacitor with the stacked structure manufactured by the method is formed by stacking a plurality of sub-capacitors 13 which are connected in parallel, the capacitor density is high, the area is large, the flexible characteristic of the planar capacitor with the stacked structure can be guaranteed, the difficulty of the production process can be reduced, and the production cost can be reduced. In addition, the planar capacitor with the stacked structure manufactured by the method still keeps the characteristics of the planar capacitor with the common stacked structure, such as bending resistance, high temperature resistance and the like.
Further, the capacitance theoretical characteristic formula of the planar capacitor of the stacked structure is as follows:
wherein C is the capacitance value of the planar capacitor with the stacked structure, A is the facing area of two adjacent planar electrodes 11 of the planar capacitor with the stacked structure, and DkIs the dielectric constant of the dielectric layer 12, K is a constant, and t is the distance between two adjacent planar electrodes 11 of the planar capacitor of the stacked structure. From the calculation formula, it can be known that the capacitance value C of the planar capacitor of the stacked structure is directly proportional to the facing area a of the planar capacitor of the stacked structure, inversely proportional to the distance t between two adjacent planar electrodes 11, and directly proportional to the dielectric constant of the dielectric layer 12. The capacitance per unit area (i.e. the capacitance density C of the planar capacitor with stacked structure) is also obtainedd) The dielectric constant of the dielectric layer 12 is proportional to the distance t between two adjacent planar electrodes 11, which is as follows:
further, the planar capacitor of the stacked structure of the present invention is formed by connecting a plurality of sub-capacitors 13 in parallel, and the capacitance value C after being connected in parallel is equal to the sum of the capacitance values (C1, C2, C3, C4 … …) of the plurality of sub-capacitors 13, that is, the capacitance value C after being connected in parallel is C1+ C2+ C3+ C4+ … … Cn, where n is the nth sub-capacitor 13.
Further, the step of stacking the multilayer planar electrode 11 and the multilayer dielectric layer 12 on each other includes:
firstly, a planar electrode 11 comprises a first surface and a second surface which are opposite, and a dielectric layer 12 is coated on the first surface of the planar electrode 11;
combining the second surface of the other planar electrode 11 with the dielectric layer 12 coated in the first step to form a sub-capacitor 13;
step three, coating a dielectric layer 12 on the first surface of the planar electrode 11 of the sub-capacitor 13;
step four, combining the second surface of the other planar electrode 11 with the dielectric layer 12 coated in the step three to form another sub-capacitor 13;
and step five, repeating the step three and the step four to form a plurality of sub-capacitors 13 connected in parallel.
Further, the step of stacking the multilayer planar electrode 11 and the multilayer dielectric layer 12 on each other includes:
the planar electrodes 11 comprise a first surface and a second surface which are opposite, and a dielectric layer 12 is coated on the first surface of each planar electrode 11;
the second surfaces of the plurality of planar electrodes 11 are sequentially combined with the dielectric layer 12 on another planar electrode 11 to form a plurality of parallel sub-capacitors 13.
Further, the two outermost planar electrodes 11 of the planar capacitor defining the stacked structure are a first planar electrode 11 and a second planar electrode 11, respectively, the first planar electrode 11 and the second planar electrode 11 are made of a non-transparent metal material, and the planar electrode 11 between the first planar electrode 11 and the second planar electrode 11 is made of a conductive material, such as a transparent conductive material.
Further, the first planar electrode 11 and the second planar electrode 11 are made of copper material, the planar electrode 11 between the first planar electrode 11 and the second planar electrode 11 is made of Indium Tin Oxide (ITO) material, and the planar electrode 11 is made of different materials, which is beneficial to realizing lightness and thinness of the planar capacitor with a stacked structure.
Further, the dielectric constant of the dielectric layer 12 is 5 to 100, and preferably, the dielectric constant of the dielectric layer 12 is 5 to 40. In the embodiment, the dielectric layer 12 is made of a polymer dielectric material, and has characteristics similar to PI (polyimide insulating resin material), such as high temperature resistance and good bending performance.
Further, the capacitance density of the planar capacitance of the stacked structure was 10nF/cm2～10uF/cm2。
Further, the thickness of each planar electrode 11 is 8um, 12um, 18um, 25um, 35 um.
Further, the multiple dielectric layers 12 include multiple first dielectric layers 12 and at least one second dielectric layer 12, and each of the first dielectric layers 12 has a dielectric constant different from that of the second dielectric layer 12. It is worth mentioning that the multi-layer dielectric layer 12 can be made of various materials, and can be freely selected according to actual needs.
Further, the area of the planar capacitor of the stacked structure is greater than or equal to 500mm × 400 mm.
The present invention is not limited to the specific details of the above-described embodiments, and various simple modifications may be made to the technical solution of the present invention within the technical idea of the present invention, and these simple modifications are within the protective scope of the present invention. The various features described in the foregoing detailed description may be combined in any suitable manner without departing from the scope of the invention. The invention is not described in detail in order to avoid unnecessary repetition.
Claims (10)
1. The planar capacitor with the stacked structure is characterized by comprising a plurality of layers of planar electrodes and a plurality of layers of dielectric layers, wherein the plurality of layers of planar electrodes are arranged at intervals, the dielectric layers are connected between every two adjacent planar electrodes to form a sub-capacitor, and the plurality of layers of planar electrodes and the plurality of layers of dielectric layers are stacked to form a plurality of parallel sub-capacitors.
2. The stacked planar capacitor of claim 1, wherein the two outermost planar electrodes of the stacked planar capacitor are a first planar electrode and a second planar electrode, the first planar electrode and the second planar electrode are made of a non-transparent metal material, and the planar electrode between the first planar electrode and the second planar electrode is made of a conductive material.
3. The stacked planar capacitor of claim 1, wherein the dielectric layer has a dielectric constant of 5 to 100.
4. The stacked-structure planar capacitor of claim 1, wherein the stacked-structure planar capacitor has a capacitance density of 10nF/cm2～10uF/cm2。
5. The stacked planar capacitor of claim 1 wherein the planar electrodes have a thickness of 8um, 12um, 18um, 25um, 35 um.
6. The stacked planar capacitor as claimed in claim 1, wherein the plurality of dielectric layers comprises a plurality of first dielectric layers and at least one second dielectric layer, each of the first dielectric layers and the second dielectric layers having a different dielectric constant.
7. The stacked planar capacitor of claim 1, wherein the area of the stacked planar capacitor is greater than or equal to 500mm x 400 mm.
8. A method for manufacturing a planar capacitor is characterized by comprising the following steps:
stacking a plurality of layers of planar electrodes and a plurality of layers of dielectric layers;
the planar electrodes are arranged at intervals, the dielectric layers are connected between two adjacent planar electrodes to form sub-capacitors, and the planar electrodes and the dielectric layers are stacked to form a plurality of sub-capacitors connected in parallel.
9. The method of claim 8, wherein the step of stacking a plurality of the planar electrodes and a plurality of the dielectric layers on top of each other comprises:
the planar electrode comprises a first surface and a second surface which are opposite, and the dielectric layer is coated on the first surface of the planar electrode;
combining the second surface of the other planar electrode with the dielectric layer coated in the first step to form the sub-capacitor;
coating the dielectric layer on the first surface of the planar electrode of the sub-capacitor;
combining the second surface of the other planar electrode with the dielectric layer coated in the step three to form another sub-capacitor;
and step five, repeating the step three and the step four to form a plurality of sub-capacitors connected in parallel.
10. The method of claim 8, wherein the step of stacking a plurality of the planar electrodes and a plurality of the dielectric layers on top of each other comprises:
the planar electrodes comprise a first surface and a second surface which are opposite, and the dielectric layer is coated on the first surface of each planar electrode;
and combining the second surfaces of the planar electrodes with the dielectric layer on the other planar electrode in sequence to form a plurality of parallel sub-capacitors.
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| CN202010355691.2A CN111524705A (en) | 2020-04-29 | 2020-04-29 | Planar capacitor with stacked structure and manufacturing method thereof |
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| CN115560884A (en) * | 2022-10-13 | 2023-01-03 | 南京高华科技股份有限公司 | Touch pressure sensor and preparation method thereof |
| CN117473933A (en) * | 2023-12-25 | 2024-01-30 | 杭州行芯科技有限公司 | Capacitor bank creation method, capacitor acquisition method, electronic device and storage medium |
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| CN117473933A (en) * | 2023-12-25 | 2024-01-30 | 杭州行芯科技有限公司 | Capacitor bank creation method, capacitor acquisition method, electronic device and storage medium |
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Application publication date: 20200811 |