CN111523284A - Method and device for converting EDA (electronic design automation) simulation configuration of chip and application - Google Patents
Method and device for converting EDA (electronic design automation) simulation configuration of chip and application Download PDFInfo
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Abstract
The invention discloses a method, a device and application for converting EDA (electronic design automation) simulation configuration of a chip, and relates to the technical field of chip simulation verification. A method for converting an EDA simulation configuration of a chip comprises the following steps: when a UVM test case is operated, acquiring operation parameters of an APB configuration port through a monitoring device and generating a first intermediate file according to a preset data format: converting the first intermediate file into a C code test script; running the C code test script in a C code simulation environment, acquiring running parameters during C code simulation through a monitoring device, and generating a second intermediate file according to the preset data format; and comparing whether the first intermediate file and the second intermediate file are consistent or not to judge the correctness of the configuration conversion. According to the invention, the monitoring devices are arranged in different simulation environments to generate the intermediate files with uniform data formats for comparison, so that the accuracy and reliability of configuration conversion are improved, and the error probability of the test script is reduced.
Description
Technical Field
The invention relates to the technical field of chip simulation verification, in particular to a method, a device and application for converting EDA (electronic design automation) simulation configuration of a chip.
Background
The integration level, design complexity and design scale of the portable chip are continuously increased, the difficulty of chip function verification is also continuously promoted, and at present, the chip function verification accounts for 60% -70% of the whole chip research and development cycle, and becomes one of the main bottlenecks restricting the design development of the integrated circuit. The Universal Verification Methodology (UVM) is an efficient Verification method formed based on a system verilog language, the Verification environment of the UVM includes comparison of excitation input data and output data, and the UVM implements excitation, comparison, and reference models as different classes, respectively. The method is mainly characterized in that the reusability of codes is improved, so that a verifier can quickly build a verification platform through code transplantation, reuse and modification, and thus, the main energy is put on the compiling of a specific test case; on the other hand, UVM packages many good methods, which makes it unnecessary for the verifier to pay much attention to the underlying implementation and reduces the debugging time of the verification platform.
In the EDA (Electronic Design Automation) simulation of chips, the current mainstream simulation method is to generate excitation by using a UVM sequence (UVM sequence). In the UVM simulation environment, a monitor is provided to monitor APB (Advanced peripheral Bus 1Bus, belonging to the AMBA 3 protocol family) configuration parameters. In the process of running a case (or called a test case) in the UVM, the monitor extracts configuration parameters of the register to form an intermediate file, and stores the configuration parameter information of the register through the intermediate file.
However, due to the limited simulation speed, UVM simulation cannot traverse too many scenes, and C code (C code) simulation is also involved in EDA simulation. In the C code simulation environment of EDA simulation, if the same case (test case) as the UVM simulation is to be run, it is common to convert the configuration of the UVM sequence into C code, and during the conversion process, the writing method of a large number of configuration registers needs to be changed. In specific implementation, the mainstream method is to convert the excitation of the UVM simulation into the test script of the C language by using the script, and although the probability of error can be reduced without human intervention in the conversion process, errors may occur in the conversion process due to the difference between the system verilog language and the 2 languages, i.e., the C language, so that the test script is subjected to errors.
Disclosure of Invention
The invention aims to: the defects of the prior art are overcome, and the method, the device and the application for converting the EDA simulation configuration of the chip are provided. According to the method, when the UVM test case runs, the monitoring device is used for obtaining the running parameters of the APB configuration port and generating the first intermediate file according to the preset data format, the monitoring device is used for obtaining the running parameters when the C code is simulated and generating the second intermediate file according to the preset data format, and the generated intermediate files with unified data formats are compared to judge the correctness of configuration conversion, so that the accuracy and the reliability of configuration conversion are improved, and the error probability of the test script is reduced.
In order to achieve the above object, the present invention provides the following technical solutions:
a method for converting an EDA simulation configuration of a chip comprises the following steps:
when a UVM test case is operated, acquiring operation parameters of an APB configuration port through a monitoring device and generating a first intermediate file according to a preset data format, wherein the monitoring device is connected with an address line, a data line and a read-write line of the APB configuration port;
converting the first intermediate file into a C code test script;
running the C code test script in a C code simulation environment, acquiring running parameters during C code simulation through a monitoring device, and generating a second intermediate file according to the preset data format;
and comparing whether the first intermediate file and the second intermediate file are consistent or not to judge the correctness of configuration conversion.
Further, the preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register, and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file.
Further, the 4 items of content are stored in a list form in a first intermediate file and a second intermediate file, the intermediate file at least comprises 4 columns to store information of a register address, a register value, an operation bit of the register and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to the information of one register;
each time a simulation is performed, an intermediate file is generated which comprises the aforementioned 4 items of content.
Further, the intermediate file includes 5 columns, where the 1 st column indicates a task item number, the 2 nd column indicates a register address, the 3 rd column indicates a register value, the 4 th column indicates an operation bit of a register, and the 5 th column indicates a read/write attribute of the register; line 1 of the intermediate file is the title line to show the subject or name of each column, and the different lines below the title line correspond to the information of different registers.
Further, the array form is represented as typedef { regaddr, regvalue, regbitnum, regaction }, and elements regaddr, regvalue, regbitnum, and regaction in the array typedef correspond to a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively.
Further, a result file is generated according to the comparison result of the first intermediate file and the second intermediate file, and when the first intermediate file and the second intermediate file are inconsistent in comparison, the line information of the inconsistent content is acquired and is displayed in the result file as error line information; and when the first intermediate file and the second intermediate file are compared and consistent, displaying the result file as null.
Further, the monitoring device generating the first intermediate file and the monitoring device generating the second intermediate file are the same monitoring device;
or respectively setting a first monitoring device and a second monitoring device corresponding to the UVM simulation and the C code simulation, generating a first intermediate file through the first monitoring device, and generating a second intermediate file through the second monitoring device.
The invention also provides a device for converting the EDA simulation configuration of the chip, which comprises the following structures:
the UVM intermediate file generating circuit comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case runs, the monitoring device is used for acquiring running parameters of the APB configuration port and generating a first intermediate file according to a preset data format;
the script conversion circuit is used for converting the first intermediate file into a C code test script;
the C code intermediate file generating circuit comprises a monitoring device, and when the C code test script runs in a C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format;
and the comparison circuit is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
Further, the preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file;
when stored in a list form, the intermediate file includes at least 4 columns to store information of a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to information of one register;
the monitoring means are configured to generate an intermediate file comprising the aforementioned 4 items of content each time a simulation is performed.
The invention also provides a chip EDA simulation system based on the UVM, which comprises a UVM simulation environment platform for realizing the UVM simulation, a C code simulation environment platform for realizing the C code simulation, a conversion device and a comparison device, wherein the UVM simulation environment platform and the C code simulation environment platform are connected through the conversion device, and are both connected with the comparison device;
the UVM simulation environment platform comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case is operated, the monitoring device is used for acquiring operation parameters of the APB configuration port and generating a first intermediate file according to a preset data format;
the conversion device is used for converting the first intermediate file into a C code test script;
the C code simulation environment platform comprises a monitoring device, and when the C code test script runs in a C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format;
the comparison device is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects as examples: when a UVM test case is operated, the monitoring device is used for obtaining the operation parameters of an APB configuration port and generating a first intermediate file according to a preset data format, the first intermediate file is converted into a C code test script and then operated in a C code simulation environment, the monitoring device is used for obtaining the operation parameters during C code simulation and generating a second intermediate file according to the preset data format, and the first intermediate file and the second intermediate file are compared to judge the correctness of configuration conversion. Further, information which is inconsistent in the first intermediate file and the second file is marked to form a result file, and preferably, the result file displays an error line to inform a verifier of specific error position information.
Drawings
Fig. 1 is a flowchart of a method for converting an EDA simulation configuration of a chip according to an embodiment of the present invention.
Fig. 2 is an exemplary diagram of a preset data format of an intermediate file according to an embodiment of the present invention.
Fig. 3 is a diagram illustrating a data format of a result file according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a device for converting an EDA simulation configuration of a chip according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a chip EDA simulation system according to an embodiment of the present invention.
Detailed Description
The method, apparatus and application for converting the EDA simulation configuration of a chip disclosed in the present invention are further described in detail with reference to the accompanying drawings and specific embodiments. It should be noted that technical features or combinations of technical features described in the following embodiments should not be considered as being isolated, and they may be combined with each other to achieve better technical effects. In the drawings of the embodiments described below, the same reference numerals appearing in the respective drawings denote the same features or components, and may be applied to different embodiments. Thus, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.
It should be noted that the structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are only for the purpose of understanding and reading the present disclosure, and are not intended to limit the scope of the invention, which is defined by the claims, and any modifications of the structures, changes in the proportions and adjustments of the sizes and other dimensions, should be construed as falling within the scope of the invention unless the function and objectives of the invention are affected. The scope of the preferred embodiments of the present invention includes additional implementations in which functions may be executed out of order from that described or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present invention.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate. In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
Examples
Referring to fig. 1, a method for converting an EDA simulation configuration of a chip is disclosed, which comprises the following steps:
s100, when a UVM test case is operated, acquiring operation parameters of an APB configuration port through a monitoring device and generating a first intermediate file according to a preset data format, wherein the monitoring device is connected with an address line, a data line and a read-write line of the APB configuration port.
And running the UVM test case in a UVM simulation environment platform. In the UVM simulation environment platform, a CPU processor is connected with a series of registers inside a chip through an APB bus. The universal verification component of the UVM may generally include the following components: register model (Register model), Sequence (Sequence), Adapter (Adapter), Sequencer (Sequence), Driver (Driver), and Monitor (Monitor), all derived from classes in the UVM. The sequence is used for generating transaction data (transaction) according to the test case; the adapter is used for converting variables generated by the register model through the sequence into a form matched with the sequence generator; the sequencer is used for detecting whether a request for sending transaction data is sent in an arbitration queue or not and detecting whether a driver applies for the transaction data or not; the driver is used for driving the transaction data to a register configuration bus interface of a DUT module (module to be verified) according to a set time sequence; the monitor is used for monitoring the register configuration bus of the DUT module, acquiring the read-write value of the register, sending the read-write value of the register to a preset model for comparison, and verifying whether the DUT module outputs the calculation data correctly.
In this embodiment, a monitoring device is added in the UVM simulation environment to monitor APB configuration port (or configuration interface) transmission. Specifically, the monitoring device is connected to an address line (APB _ addr), a data line (APB _ data), and a read-write line (APB _ write _ en) of the APB configuration port. When a UVM (ultraviolet memory) case (test case) is run, acquiring the behavior of an APB (advanced configuration bus) configuration port when the case (test case) is run through the monitor, and acquiring four contents of a register according to the sequence of a preset data format, wherein the four contents comprise: register address, register value, register operation bit (bit), register read/write/attribute.
Each time a simulation is performed, the monitoring device generates a first intermediate file corresponding to the data format. For example, when the UVM simulation is performed for the 1 st time, the monitoring device generates a first intermediate file 1, and when the UVM simulation is performed for the 2 nd time, the monitoring device generates a first intermediate file 2, and so on, and for the UVM simulation for the nth time, the monitoring device generates a first intermediate file n.
S200, converting the first intermediate file into a C code test script.
And S300, running the C code test script in a C code simulation environment, acquiring running parameters during C code simulation through a monitoring device, and generating a second intermediate file according to the preset data format.
The configuration parameters of the register during C code simulation are obtained through the monitoring device, a second intermediate file is generated, the data format of the second intermediate file is the same as that of the first intermediate file, and the error probability can be obviously reduced due to the unification of the data in the form.
The monitoring device generates a second intermediate file corresponding to the preset data format each time the C-code simulation is performed. For example, when performing C code simulation for the 1 st time, the monitoring apparatus generates a second intermediate file 1, and when performing C code simulation for the 2 nd time, the monitoring apparatus generates a second intermediate file 2, and so on, and for the n-th time C code simulation, the monitoring apparatus generates a second intermediate file n.
S400, comparing whether the first intermediate file and the second intermediate file are consistent or not to judge the correctness of configuration conversion.
Preferably, the step S500 may be further included after the step S400: and when the first intermediate file and the second intermediate file are inconsistent in comparison, outputting prompt information of error conversion configuration to prompt a user.
The manner of outputting the prompt information may be to output a popup window in the window for prompting, or to output the inconsistent position in the first intermediate file and the second intermediate file after marking the inconsistent position through a differential display to a user, where the differential display includes but is not limited to highlight display, font differential display, font color differential display, font size differential display, and the like.
In this embodiment, the file types of the first intermediate file and the second intermediate file may be TXT files and Excel files.
The preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file.
In one embodiment, the 4 items of content are stored in a list in the first intermediate file and the second intermediate file. Specifically, the intermediate file (including the first intermediate file and the second intermediate file) includes at least 4 columns to store information of a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to the information of one register. Each time a simulation is performed, an intermediate file is generated which comprises the aforementioned 4 items of content.
As a typical mode, referring to fig. 2, the intermediate file may be set to 5 columns, where the 1 st column indicates a task item number (Action item num), the 2 nd column indicates a register address (reg _ addr), the 3 rd column indicates a register value (reg-value), the 4 th column indicates an operation bit (reg _ bitnum) of the register, and the 5 th column indicates a read/write attribute (reg-Action) of the register. Line 1 of the intermediate file is the title line to show the subject or name of each column, and the different lines below the title line correspond to the information of different registers. In the case of the 1 st row under the header row, the task number is 1, the register address is 0x40000000, the register value is 0x12345678, and the operation bits of the register are [ 31: 0], the read/write attribute of the register is read.
In another embodiment, the 4 items of content are stored in an array in the first intermediate file and the second intermediate file. Specifically, the array form may be expressed as typedef { regaddr, regvalue, regbitnum, regaction }, where elements regaddr, regvalue, regbitnum, and regaction in the array typedef correspond to a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively.
In this embodiment, in order to facilitate a tester to visually acquire comparison information for configuration conversion, a result file may be generated according to a comparison result of the first intermediate file and the second intermediate file, and when the first intermediate file and the second intermediate file are not in accordance with each other, row information where the content that is not in accordance is acquired is displayed in the result file as error row information; and when the first intermediate file and the second intermediate file are compared and consistent, displaying the result file as null. The file type of the result file may be a TXT file or an Excel file, and of course, other file formats may also be adopted as needed, which should not be taken as a limitation to the present invention.
As a typical mode, the data format of the result file can be seen from fig. 3: the name of the result file may be named "result file", and error row information is displayed in the file in a list form, specifically, the list is provided with 3 columns, the 1 st column represents a row number of an error row, the 2 nd column represents specific error contents of the UVM intermediate file (i.e., the first intermediate file), and the 3 rd column represents specific error contents of the C code intermediate file (i.e., the second intermediate file). By way of example and not limitation, for example, if the register address of the 1024 th row of the first intermediate file is found to be inconsistent with the register address of the 1024 th row of the second intermediate file by comparison, then "1024" may be written under the column "row number" of the same row in the result file, "Reg _ addr ═ 0x 123" may be written under the column "UVM intermediate file", and "Reg _ addr ═ 0x 456" may be written under the column "C code intermediate file".
In this embodiment, the monitoring apparatus for generating the first intermediate file and the monitoring apparatus for generating the second intermediate file use the same monitoring apparatus, and the monitoring apparatus is configured to generate one intermediate file including the foregoing 4 items of content every time a simulation is performed. By way of example, the monitoring device generates a first intermediate file n for the nth UVM simulation, and generates a second intermediate file n for the nth C code simulation.
Or respectively setting a first monitoring device and a second monitoring device corresponding to the UVM simulation and the C code simulation, generating a first intermediate file through the first monitoring device, and generating a second intermediate file through the second monitoring device. The first monitoring device and the second monitoring device are configured to generate an intermediate file including the aforementioned 4 items of content each time a simulation is performed. For example, for the nth UVM simulation, the first monitoring device generates a first intermediate file n, and for the nth C code simulation, the second monitoring device generates a second intermediate file n.
According to the technical scheme provided by the invention, a monitor for monitoring APB port transmission is arranged in a UVM simulation environment, and the monitor is connected with an address line (APB _ addr), a data line (APB _ data) and a read-write line (APB _ write _ en) of an APB configuration port. When a test case of the UVM is running, the monitor monitors the behavior of an APB configuration port when a case (test case) is running, and acquires four contents of a register according to a sequence of a preset data format, including: register address, register value, register operation bit (bit), register read/write/attribute. Each time a simulation is performed, the monitor generates a first intermediate file corresponding to the data format. Typically, the format of the intermediate file is divided into 4 columns, where the 1 st column indicates regaddr (register address), the 2 nd column indicates regvalue (register value), the 3 rd column indicates regbitnum (register bit), the 4 th column indicates regaction (register read/write attribute), and each line in the intermediate file represents a register related operation. When the chip EDA simulation needs to be carried out by using C language, the first intermediate file is converted by a conversion device to obtain a C code test script. Specifically, the conversion device may obtain the operation information in the first intermediate file in rows, the operation of each register may be divided into 4 steps, the C language source code only needs to use one function action (int regaddr, int regvalue, int regbitnum, or bone regction) in the whole process, and the unification of the forms of the data may significantly reduce the error probability. When the C code test script runs in a C code simulation environment, a second intermediate file is generated by the monitoring device according to the data format, then the first intermediate file corresponding to the UVM and the second intermediate file corresponding to the C code are automatically compared by the comparison device to judge whether the operation of each line of registers is completely consistent, if not, an error line is marked out and a Result file (Result file) is formed. The result file displays the positions with inconsistent comparison in a line number mode to tell the simulation personnel the specific positions of the inconsistent contents, and if all the comparisons are passed, the result file can be set to be null.
Referring to fig. 4, there is further provided an apparatus for converting an EDA simulation configuration of a chip according to another embodiment of the present invention.
The device comprises a UVM intermediate file generating circuit, a script converting circuit, a C code intermediate file generating circuit and a comparison circuit.
The UVM intermediate file generating circuit comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case runs, the monitoring device is used for acquiring running parameters of the APB configuration port and generating a first intermediate file according to a preset data format.
And the script conversion circuit is used for converting the first intermediate file into a C code test script.
The C code intermediate file generating circuit comprises a monitoring device, and when the C code test script runs in a C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format.
The comparison circuit is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
In this embodiment, the preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register, and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file.
When stored in a list form, the intermediate file includes at least 4 columns to store information of a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to information of one register.
In this embodiment, the monitoring apparatus for generating the first intermediate file and the monitoring apparatus for generating the second intermediate file may adopt the same monitoring apparatus, and the monitoring apparatus is configured to generate one intermediate file including the foregoing 4 items of content every time a simulation is performed. By way of example, the monitoring device generates a first intermediate file n for the nth UVM simulation, and generates a second intermediate file n for the nth C code simulation.
Or respectively setting a first monitoring device and a second monitoring device corresponding to the UVM simulation and the C code simulation, generating a first intermediate file through the first monitoring device, and generating a second intermediate file through the second monitoring device. The first monitoring device and the second monitoring device are configured to generate an intermediate file including the aforementioned 4 items of content each time a corresponding simulation is performed. For example, for the nth UVM simulation, the first monitoring device generates a first intermediate file n, and for the nth C code simulation, the second monitoring device generates a second intermediate file n.
Preferably, the device may further include a display circuit, connected to the comparison circuit, and configured to output a prompt message indicating that the conversion configuration is incorrect to prompt the user when the first intermediate file and the second intermediate file are inconsistent in comparison. Further, the display circuit can be connected with the UVM intermediate file generating circuit and the C code intermediate file generating circuit so as to output the process file.
Further, the display circuitry includes a result file output module configured to:
generating a result file according to the comparison result of the first intermediate file and the second intermediate file, and when the first intermediate file and the second intermediate file are inconsistent in comparison, acquiring the line information of the inconsistent content as error line information and displaying the error line information in the result file; and when the first intermediate file and the second intermediate file are compared and consistent, displaying the result file as null. And the specific position of the inconsistent content is told to the user through the result file, so that the test personnel can conveniently search.
Other technical features are described in the previous embodiment and are not described in detail herein.
Referring to fig. 5, another embodiment of the invention further provides an EDA simulation system for a chip based on UVM.
The system comprises a UVM simulation environment platform for realizing UVM simulation, a C code simulation environment platform for realizing C code simulation, a conversion device and a comparison device, wherein the UVM simulation environment platform and the C code simulation environment platform are connected through the conversion device, and the UVM simulation environment platform and the C code simulation environment platform are both connected with the comparison device.
The UVM simulation environment platform comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case runs, the monitoring device is used for acquiring running parameters of the APB configuration port and generating a first intermediate file according to a preset data format.
The conversion device is used for converting the first intermediate file into a C code test script;
the C code simulation environment platform comprises a monitoring device, and when the C code test script runs in the C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format.
The comparison device is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
Preferably, the system further comprises a display device connected to the comparison device, and configured to output a prompt message indicating that the conversion configuration is incorrect to prompt the user when the first intermediate file and the second intermediate file are inconsistent in comparison. Further, the display device includes a result file output module configured to: generating a result file according to the comparison result of the first intermediate file and the second intermediate file, and when the first intermediate file and the second intermediate file are inconsistent in comparison, acquiring the line information of the inconsistent content as error line information and displaying the error line information in the result file; and when the first intermediate file and the second intermediate file are compared and consistent, displaying the result file as null.
In this embodiment, a data format is preset by the monitoring device, where the preset data format has 4 items of contents, including a register address, a register value, an operation bit of a register, and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file.
When stored in a list form, the intermediate file includes at least 4 columns to store information of a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to information of one register.
In this embodiment, the monitoring apparatus for generating the first intermediate file and the monitoring apparatus for generating the second intermediate file may adopt the same monitoring apparatus, and the monitoring apparatus is configured to generate one intermediate file including the foregoing 4 items of content every time a simulation is performed. By way of example, the monitoring device generates a first intermediate file n for the nth UVM simulation, and generates a second intermediate file n for the nth C code simulation.
Or respectively setting a first monitoring device and a second monitoring device corresponding to the UVM simulation and the C code simulation, generating a first intermediate file through the first monitoring device, and generating a second intermediate file through the second monitoring device. The first monitoring device and the second monitoring device are configured to generate an intermediate file including the aforementioned 4 items of content each time a corresponding simulation is performed. For example, for the nth UVM simulation, the first monitoring device generates a first intermediate file n, and for the nth C code simulation, the second monitoring device generates a second intermediate file n.
Other technical features are described in the previous embodiment and are not described in detail herein.
In the foregoing description, the disclosure of the present invention is not intended to limit itself to these aspects. Rather, the various components may be selectively and operatively combined in any number within the intended scope of the present disclosure. In addition, terms like "comprising," "including," and "having" should be interpreted as inclusive or open-ended, rather than exclusive or closed-ended, by default, unless explicitly defined to the contrary. All technical, scientific, or other terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs unless defined otherwise. Common terms found in dictionaries should not be interpreted too ideally or too realistically in the context of related art documents unless the present disclosure expressly limits them to that. Any changes and modifications of the present invention based on the above disclosure will be within the scope of the appended claims.
Claims (10)
1. A method for converting the EDA simulation configuration of a chip is characterized by comprising the following steps:
when a UVM test case is operated, acquiring operation parameters of an APB configuration port through a monitoring device and generating a first intermediate file according to a preset data format, wherein the monitoring device is connected with an address line, a data line and a read-write line of the APB configuration port;
converting the first intermediate file into a C code test script;
running the C code test script in a C code simulation environment, acquiring running parameters during C code simulation through a monitoring device, and generating a second intermediate file according to the preset data format;
and comparing whether the first intermediate file and the second intermediate file are consistent or not to judge the correctness of configuration conversion.
2. The method of claim 1, further comprising the steps of: the preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file.
3. The method of claim 2, wherein: the 4 items of content are stored in a first intermediate file and a second intermediate file in a list form, the intermediate file at least comprises 4 columns for respectively storing information of register addresses, register values, operation bits of the registers and read/write attributes of the registers, and one row of the intermediate file corresponds to the information of one register;
each time a simulation is performed, an intermediate file is generated which comprises the aforementioned 4 items of content.
4. The method of claim 3, wherein: the intermediate file comprises 5 columns, wherein the 1 st column represents a task item number, the 2 nd column represents a register address, the 3 rd column represents a register value, the 4 th column represents an operation bit of a register, and the 5 th column represents a read/write attribute of the register; line 1 of the intermediate file is the title line to show the subject or name of each column, and the different lines below the title line correspond to the information of different registers.
5. The method of claim 2, wherein: the array form is represented as typedef { regaddr, regvalue, regbitnum, regaction }, and elements regaddr, regvalue, regbitnum, and regaction in array typedef correspond to register addresses of registers, register values, operation bits of registers, and read/write attributes of registers, respectively.
6. The method of claim 3, wherein: and generating a result file according to the comparison result of the first intermediate file and the second intermediate file, acquiring the line information of the inconsistent content as error line information and displaying the error line information in the result file when the first intermediate file and the second intermediate file are inconsistent in comparison, and displaying the result file as null when the first intermediate file and the second intermediate file are consistent in comparison.
7. The method of claim 1, wherein: the monitoring device generating the first intermediate file and the monitoring device generating the second intermediate file are the same monitoring device; or respectively setting a first monitoring device and a second monitoring device corresponding to the UVM simulation and the C code simulation, generating a first intermediate file through the first monitoring device, and generating a second intermediate file through the second monitoring device.
8. An apparatus for converting a chip EI) a emulation configuration, comprising:
the UVM intermediate file generating circuit comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case runs, the monitoring device is used for acquiring running parameters of the APB configuration port and generating a first intermediate file according to a preset data format;
the script conversion circuit is used for converting the first intermediate file into a C code test script; the C code intermediate file generating circuit comprises a monitoring device, and when the C code test script runs in a C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format;
and the comparison circuit is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
9. The apparatus of claim 8, wherein: the preset data format has 4 items of contents, including a register address, a register value, an operation bit of the register and a read/write attribute of the register, and the 4 items of contents are stored in a list form or an array form in the first intermediate file and the second intermediate file;
when stored in a list form, the intermediate file includes at least 4 columns to store information of a register address of a register, a register value, an operation bit of the register, and a read/write attribute of the register, respectively, and one row of the intermediate file corresponds to information of one register;
the monitoring means are configured to generate an intermediate file comprising the aforementioned 4 items of content each time a simulation is performed.
10. A chip EDA simulation system based on UVM is characterized in that: the system comprises a UVM simulation environment platform for realizing UVM simulation, a C code simulation environment platform for realizing C code simulation, a conversion device and a comparison device, wherein the UVM simulation environment platform and the C code simulation environment platform are connected through the conversion device, and both the UVM simulation environment platform and the C code simulation environment platform are connected with the comparison device;
the UVM simulation environment platform comprises a monitoring device, wherein the monitoring device is connected with an address line, a data line and a read-write line of an APB configuration port, and when a UVM test case is operated, the monitoring device is used for acquiring operation parameters of the APB configuration port and generating a first intermediate file according to a preset data format;
the conversion device is used for converting the first intermediate file into a C code test script;
the C code simulation environment platform comprises a monitoring device, and when the C code test script runs in a C code simulation environment, the monitoring device is used for obtaining running parameters during C code simulation and generating a second intermediate file according to the preset data format;
the comparison device is used for comparing whether the first intermediate file and the second intermediate file are consistent or not so as to judge the correctness of configuration conversion.
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