CN111521924A - Automatic testing method for small portable detachable chip product - Google Patents
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Abstract
The invention discloses an automatic testing method for a small portable detachable chip product, which comprises the following steps: s101: configuring basic information of an IC chip to be tested through software deployed by an upper computer; s102: connecting a test instrument, a chip clamp and an IC chip to be tested according to indexes to be tested; s103: after the test instrument and the IC to be tested are connected, parameter configuration is carried out on the tested indexes through software of the upper computer and configuration is confirmed; s104: returning to a starting interface of the software to start to execute the index test, and analyzing, confirming and storing a test result; s105: the IC chips are replaced, and the step S103 is returned to and repeatedly executed until all the IC chips are tested. The invention can solve the long-standing problems of long development cycle and high input cost of products of small enterprises in IC design classes, and can further promote the transformation of design into production.
Description
Technical Field
The invention relates to the field of communication control, in particular to an automatic testing method for a small portable detachable chip product.
Background
In the existing chip batch test, a special Automatic Test Equipment (ATE) is generally adopted to realize batch test, and the automatic test equipment needs to integrate hardware such as a CPU, a test instrument, a test fixture and the like, and also needs a special software team to develop a customized test program to realize automatic test. In consideration of national conditions, the operation process is difficult to realize especially for medium and small enterprises, the investment cost is high, the autonomous controllability is low, and the privacy of test data of chip products cannot be effectively guaranteed. Finally, the batch test problem of only one type of chip is solved.
In order to solve the problems, at present, a foreign factory ensures batch test tasks of different types of chips based on automatic test equipment and a mode of manufacturing a special board card and developing matched customized software. The method reduces the repeated investment cost to a certain extent and accelerates the popularization speed. However, since the core hardware is always dependent on automated test equipment, the cost remains enormous and the continuous service charges are not insignificant. Therefore, the method for designing is not practical enough for small and medium-sized IC design enterprises, and is undoubtedly the method for pouring oil on fire for the high-investment IC design industry. Meanwhile, the core equipment, the matched board card and the customization program all depend on an automatic test equipment company, so that the scientific and technical confidentiality of the core chip is not ensured, and the independently controllable attribute is lost.
Therefore, it is urgently needed to design a portable detachable IC product automatic testing method based on only a small laboratory.
Disclosure of Invention
The invention provides an automatic testing method for a small portable detachable chip product, which solves the long development period and high input cost of products of small enterprises in IC design and can further promote the design transformation.
To achieve these objects and other advantages in accordance with the purpose of the invention, there is provided a small portable detachable chip product automatic test method, comprising the steps of:
s101: configuring basic information of an IC chip to be tested through software deployed by an upper computer;
s102: connecting a test instrument, a chip clamp and an IC chip to be tested according to indexes to be tested;
s103: after the test instrument and the IC to be tested are connected, parameter configuration is carried out on the tested indexes through software of the upper computer and configuration is confirmed;
s104: returning to a starting interface of the software to start to execute the index test, and analyzing, confirming and storing a test result;
s105: replacing the IC chip, returning to the step S103 and repeatedly executing until all the IC chips are tested;
the basic information comprises a product name, a product serial number, a test type and a test temperature.
Preferably, in step S105, the replacement of the IC chip is completed by a small robot.
Preferably, the test instrument comprises: the device comprises a noise measuring instrument, a frequency spectrograph, a vector network analyzer and a digital multimeter.
Preferably, the method of the present invention does not need to rely on highly integrated ATE equipment, and can complete various index automatic tests only based on a laboratory universal test instrument, wherein the index tests include: the method comprises the following steps of noise coefficient index testing, input three-order intermodulation point index testing, output three-order intermodulation point index testing, 1dB compression point index testing, S parameter index testing and static working point index testing.
Preferably, the method for testing the noise coefficient index is as follows: firstly configuring noise source parameters on a noise tester, then calibrating link environmental noise, then performing scanning test frequency point configuration, then performing noise coefficient scanning configuration, comparing the result with an expected index, and performing secondary inspection if the result is not qualified.
Preferably, the method for inputting the third-order intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
Preferably, the method for outputting the third-order intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
Preferably, the method for testing the index of the 1dB compression point comprises the following steps of firstly configuring the frequency point to be tested, then scanning the link line loss, then configuring the parameters of the vector network analyzer, scanning the 1dB compression point according to the frequency point setting, comparing the obtained result with the expected index, and carrying out secondary inspection if the result is not qualified.
Preferably, the method for testing the S parameter index is as follows: firstly, configuring a frequency band to be detected on a vector network analyzer, then acquiring S parameters according to the frequency point configuration, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified.
Preferably, the method for testing the static operating point index comprises the following steps: firstly, carrying out frequency point configuration, then configuring digital multimeters connected in series and in parallel in a link, then carrying out static working point scanning according to the configured frequency points, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified;
wherein the tested static operating point indicators include: a quiescent operating voltage and a quiescent operating current.
The invention is in a small-sized laboratory, combines a small-sized robot, configures and controls a control instrument and an IC to be tested through an index test flow, further completes the task of automatically testing a chip, and gets rid of the traditional and expensive method of batch testing through ATE. Compared with the traditional mode, the invention has the advantages of autonomy, portability and higher cost performance, can fully utilize test resources, combines general research and development tests with batch tests, realizes the uninterrupted state of the human shutdown device in a laboratory by mutually scheduling the two tests through the application invention, greatly reduces the time cost and the capital investment cost of chip productization, and promotes the development of small and medium-sized chip industry companies.
The invention changes the traditional integrated automatic IC test mode of ATE equipment with extremely high integration level and high price into the networked automatic IC test based on the universal instrument, namely, the test method that the software and the hardware are highly dependent on the outside is changed into the automatic test mode that the software and the hardware are highly independently controllable.
The invention effectively utilizes the existing resources of small and medium-sized companies, localizes and autonomizes the IC testing method, realizes an autonomically controllable IC automatic testing platform in the true sense, and thus supports a series of IC batch testing tasks.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic view of a detection processing flow according to an embodiment of the present invention.
FIG. 2 is a flowchart illustrating a noise figure index test according to an embodiment of the present invention.
Fig. 3 is a flowchart of the test of inputting three-level intermodulation point indexes according to the embodiment of the present invention.
Fig. 4 is a flowchart illustrating a test of outputting three-level intermodulation point indexes according to an embodiment of the present invention.
FIG. 5 is a flowchart of a 1dB compression point index test according to an embodiment of the present invention.
Fig. 6 is a flowchart of S parameter index testing according to an embodiment of the present invention.
FIG. 7 is a flowchart illustrating a static operating point indicator testing process according to an embodiment of the invention.
Detailed Description
The present invention is further described in detail below with reference to the attached drawings so that those skilled in the art can implement the invention by referring to the description text.
It will be understood that terms such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.
The invention provides a small portable detachable chip product automatic test method, which comprises the steps of deploying software in an upper computer, connecting a test instrument, a test instrument and an IC chip to be tested, then carrying out parameter configuration of various indexes through the software in the upper computer, and finally carrying out test.
The automatic testing method for the small portable detachable chip product provided by the embodiment of the invention is mainly applied to chip detection of small and medium companies.
The following describes embodiments of the present invention in detail with reference to the accompanying drawings.
As shown in FIG. 1, the invention provides an automated testing method for a small portable detachable chip product, comprising the following steps:
s101: configuring basic information of an IC chip to be tested through software deployed by an upper computer;
s102: connecting a test instrument, a chip clamp and an IC chip to be tested according to indexes to be tested;
s103: after the test instrument and the IC to be tested are connected, parameter configuration is carried out on the tested indexes through software of the upper computer and configuration is confirmed;
s104: returning to a starting interface of the software to start to execute the index test, and analyzing, confirming and storing a test result;
s105: replacing the IC chip, returning to the step S103 and repeatedly executing until all the IC chips are tested;
the basic information comprises a product name, a product serial number, a test type and a test temperature.
It is understood that, in order to avoid the problem of inefficiency of manual replacement, the replacement of the IC chip is completed by a small robot in step S105.
In the technical scheme provided by the invention, the test instrument comprises: the device comprises a noise measuring instrument, a frequency spectrograph, a vector network analyzer and a digital multimeter.
In the technical scheme of the invention, the test instruments and the test instruments are connected through a universal communication interface, the interconnection among various instruments is realized by adopting a TCP/IP universal network protocol, and the corresponding test index modules are called for automatically configuring and controlling the instruments, the small robots and the ICs to be tested, so that various laboratory universal test instruments are supported. In the invention, personnel do not need to participate in the test process, and full-automatic test and test data generation can be realized on the basis of the original laboratory.
In the same type of index test, after receiving a corresponding index test instruction, a central processing unit of an upper computer respectively configures an instrument and an IC to be tested through a TCP/IP protocol and a customized SPI interface, then controls the instrument to collect data, simultaneously analyzes, confirms and stores the data, controls a small robot to replace the IC to be tested, and after the index test is completed, changes the connection relation and then performs the next type of index test.
In the technical scheme provided by the invention, the index test comprises the following steps: the method comprises the following steps of noise coefficient index testing, input three-order intermodulation point index testing, output three-order intermodulation point index testing, 1dB compression point index testing, S parameter index testing and static working point index testing.
Each index test is explained in detail below with reference to a specific flowchart.
As shown in fig. 2, the method of the noise figure index test is as follows: firstly configuring noise source parameters on a noise tester, then calibrating link environmental noise, then performing scanning test frequency point configuration, then performing noise coefficient scanning configuration, comparing the result with an expected index, and performing secondary inspection if the result is not qualified.
Specifically, noise source parameters are firstly configured on a noise tester, then link environment noise calibration is carried out, then test frequency points and scanning time are configured, the noise tester carries out noise coefficient scanning according to configured related parameters, an obtained result is compared with a preset expected value, if the comparison result is consistent with a preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the first time, detection is carried out again, if the second detection result is consistent with the preset value or has a small error, the result is marked as qualified, the data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the second time, detection is carried out again until the unqualified times are larger than 2, the result is marked as unqualified, and.
As shown in fig. 3, the method for inputting the third-order intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
Specifically, related parameters of a frequency point to be detected are configured on a frequency spectrograph, then link line loss scanning is carried out and recorded, signal source parameters are configured (double-tone signals are started), then a line loss file is compared and input into a three-order intermodulation point test, an obtained result is compared with a preset expected value, if the comparison result is consistent with a preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the first time, detection is carried out again, if the second detection result is consistent with the preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the second time, detection is carried out again until the unqualified times are larger than 2, the result is.
As shown in fig. 4, the method for outputting the third-order intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
Specifically, related parameters of a frequency point to be detected are configured on a frequency spectrograph, then link line loss scanning is carried out and recorded, signal source parameters are configured (double-tone signals are started), then line loss files are compared to carry out output three-order intermodulation point testing, an obtained result is compared with a preset expected value, if the comparison result is consistent with a preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the first time, detection is carried out again, if the second detection result is consistent with the preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is larger than the preset value, the result is marked as unqualified for the second time, detection is carried out again until the unqualified times are larger than 2, the result is marked.
As shown in fig. 5, the method for testing the index of the 1dB compression point includes the steps of configuring the frequency point to be tested, scanning the link line loss, configuring the parameters of the vector network analyzer, scanning the 1dB compression point according to the frequency point setting, comparing the obtained result with the expected index, and performing secondary inspection if the result is not qualified.
Specifically, the frequency point to be detected is configured firstly, then link line loss scanning is carried out and recorded, parameters of a vector network analyzer are configured, 1dB compression point scanning is carried out according to the set related parameters, the obtained result is compared with a preset expected value, if the comparison result is consistent with the preset value or the error is small, the result is marked to be qualified, data is stored, if the comparison result is large in difference with the preset value, the result is marked to be unqualified for the first time, detection is carried out again, if the second detection result is consistent with the preset value or the error is small, the result can be marked to be qualified, the data is stored, if the comparison result is large in difference with the preset value, the result is marked to be unqualified for the second time, detection is carried out again until the unqualified times.
As shown in fig. 6, the method of S parameter index test is as follows: firstly, configuring a frequency band to be detected on a vector network analyzer, then acquiring S parameters according to the frequency point configuration, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified.
Specifically, parameters of the vector network analyzer are configured firstly, S parameter acquisition is carried out according to related parameters set by the frequency points, an acquired result is compared with a preset expected value, if the comparison result is consistent with the preset value or has a small error, the acquired result is marked as qualified, data is stored, if the comparison result is greatly different from the preset value, the acquired result is marked as unqualified for the first time, detection is carried out again, if the detection result for the second time is consistent with the preset value or has a small error, the acquired result can be marked as qualified, the data is stored, if the comparison result is greatly different from the preset value, the acquired result is marked as unqualified for the second time, the data is detected again until the unqualified times are larger.
As shown in fig. 7, the method for testing the static operating point index is as follows: firstly, carrying out frequency point configuration, then configuring digital multimeters connected in series and in parallel in a link, then carrying out static working point scanning according to the configured frequency points, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified; wherein the tested static operating point indicators include: a quiescent operating voltage and a quiescent operating current.
Specifically, firstly, frequency point configuration is carried out, then digital multimeters connected in series and in parallel in a link are configured, then static working point scanning is carried out according to configured frequency points, the obtained result is compared with an expected index, if the comparison result is consistent with a preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is greatly different from the preset value, the result is marked as unqualified for the first time, detection is carried out again, if the second detection result is consistent with the preset value or has a small error, the result is marked as qualified, data is stored, if the comparison result is greatly different from the preset value, the result is marked as unqualified for the second time, detection is carried out again until the unqualified times are larger than 2.
While embodiments of the invention have been disclosed above, it is not limited to the applications listed in the description and the embodiments. It can be applied to all kinds of fields suitable for the present invention. Additional modifications will readily occur to those skilled in the art. It is therefore intended that the invention not be limited to the exact details and illustrations described and illustrated herein, but fall within the scope of the appended claims and equivalents thereof.
Claims (10)
1. A small portable detachable chip product automatic testing method is characterized by comprising the following steps:
s101: configuring basic information of an IC chip to be tested through software deployed by an upper computer;
s102: connecting a test instrument, a chip clamp and an IC chip to be tested according to indexes to be tested;
s103: after the test instrument and the IC to be tested are connected, parameter configuration is carried out on the tested indexes through software of the upper computer and configuration is confirmed;
s104: returning to a starting interface of the software to start to execute the index test, and analyzing, confirming and storing a test result;
s105: replacing the IC chip, returning to the step S103 and repeatedly executing until all the IC chips are tested;
the basic information comprises a product name, a product serial number, a test type and a test temperature.
2. The automated small portable detachable chip product testing method according to claim 1, wherein in step S105, the replacement of the IC chip is performed by a small robot.
3. The automated small portable detachable chip product testing method according to claim 1, wherein the testing apparatus comprises: the device comprises a noise measuring instrument, a frequency spectrograph, a vector network analyzer and a digital multimeter.
4. The automated testing method of a small portable detachable chip product according to claim 1, wherein the index test comprises: the method comprises the following steps of noise coefficient index testing, input three-order intermodulation point index testing, output three-order intermodulation point index testing, 1dB compression point index testing, S parameter index testing and static working point index testing.
5. The automated testing method of a small portable detachable chip product according to claim 4, wherein the noise figure index testing method is as follows: firstly configuring noise source parameters on a noise tester, then calibrating link environmental noise, then performing scanning test frequency point configuration, then performing noise coefficient scanning configuration, comparing the result with an expected index, and performing secondary inspection if the result is not qualified.
6. The automated testing method of a small portable detachable chip product as claimed in claim 4, wherein the method of inputting the three-step intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
7. The automated testing method of a small portable detachable chip product as claimed in claim 4, wherein the method of outputting the third-order intermodulation point index test is as follows: the method comprises the steps of firstly configuring detailed frequency point parameters on a frequency spectrograph, then scanning and recording link line loss, after configuring a signal source, comparing the signal source with a recorded line loss file to input an index scan of a three-order intermodulation point, comparing the result with an expected index, and if the result is not qualified, carrying out secondary inspection.
8. The automatic test method for the small portable detachable chip product according to claim 4, wherein the method for testing the index of the 1dB compression point comprises the steps of firstly configuring the frequency point to be tested, then scanning the link line loss, then configuring the parameters of a vector network analyzer, scanning the 1dB compression point according to the frequency point setting, comparing the result with an expected index, and carrying out secondary inspection if the result is not qualified.
9. The automated testing method of a small portable detachable chip product according to claim 4, wherein the S parameter index testing method comprises the following steps: firstly, configuring a frequency band to be detected on a vector network analyzer, then acquiring S parameters according to the frequency point configuration, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified.
10. The automated testing method of a small portable detachable chip product according to claim 4, characterized in that the method of the static operating point index test is as follows: firstly, carrying out frequency point configuration, then configuring digital multimeters connected in series and in parallel in a link, then carrying out static working point scanning according to the configured frequency points, comparing the obtained result with an expected index, and carrying out secondary inspection if the result is not qualified;
wherein the tested static operating point indicators include: a quiescent operating voltage and a quiescent operating current.
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Application publication date: 20200811 |