CN111509114A - 贴附微型元件至基板上的方法 - Google Patents

贴附微型元件至基板上的方法 Download PDF

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Publication number
CN111509114A
CN111509114A CN201910867304.0A CN201910867304A CN111509114A CN 111509114 A CN111509114 A CN 111509114A CN 201910867304 A CN201910867304 A CN 201910867304A CN 111509114 A CN111509114 A CN 111509114A
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layer
elevated
micro
adhesion layer
electrode
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CN201910867304.0A
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陈立宜
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Mikro Mesa Technology Co Ltd
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Mikro Mesa Technology Co Ltd
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Abstract

本发明公开了一种贴附微型元件至基板上的方法。该方法包含：在基板上形成导电垫；形成增高黏合层在导电垫上形成增高黏合层；在包含蒸气的环境中调节增高黏合层的温度至选定温度点或喷洒气体至增高黏合层上，使得至少一部分蒸气或气体凝结并在增高黏合层上形成液体层；在增高黏合层的上方放置微型元件，使得微型元件接触液体层，并由位于微型元件和增高黏合层之间的液体层所产生的毛细力抓住微型元件，其中微型元件包含电极，电极面向增高黏合层；以及蒸发液体层，使得电极贴附至增高黏合层并与导电垫电性连接。本发明所提出贴附微型元件至基板上的方法，可防止因施加在微型元件上的剪切力而可能造成的损坏。

Description

贴附微型元件至基板上的方法
技术领域
本发明涉及一种贴附微型元件至基板上的方法。
背景技术
此处的陈述仅提供与本发明有关的背景信息，而不必然地构成现有技术。
近年来，微型元件在许多应用领域都逐渐兴起。在与微型发光元件相关的各个技术层面中，转移制程是微型元件要达到商业化的最重要挑战任务之一。转移制程当中的一个重要议题是将微型元件黏合至基板上。
发明内容
本发明的目的在于克服现有技术的缺陷，而提出一种改进的贴附微型元件至基板上的方法，可防止因施加在微型元件上的剪切力而可能造成的损坏。
本发明的目的及解决其技术问题是采用以下技术方案来实现的。
本发明的一些实施方式公开了一种贴附微型元件至基板上的方法。该方法包含：在基板上形成导电垫；在导电垫上形成增高黏合层；在包含蒸气的环境中调节增高黏合层的温度至选定温度点或喷洒气体至增高黏合层上，使得至少一部分蒸气或气体凝结并在增高黏合层上形成液体层；在增高黏合层的上方放置微型元件，使得微型元件接触液体层，并由位于微型元件和增高黏合层之间的液体层所产生的毛细力抓住微型元件，其中微型元件包含电极，电极面向增高黏合层；以及蒸发液体层，使得电极贴附至增高黏合层并与导电垫电性连接。
根据本发明的一实施例，贴附微型元件至基板上的方法还包含在形成导电垫之前形成黏附层于基板上。
根据本发明的一实施例，增高黏合层的厚度的范围在1微米和10微米之间。
根据本发明的一实施例，增高黏合层包含锡(tin，Sn)。
根据本发明的一实施例，电极的厚度小于或等于2微米。
根据本发明的一实施例，电极的厚度小于或等于0.5微米。
根据本发明的一实施例，液体层包含水。
根据本发明的一实施例，选定温度点为露点。
根据本发明的一实施例，蒸发液体层包含升高增高黏合层的温度，使得电极在液体层蒸发后黏附固定至增高黏合层。
根据本发明的一实施例，贴附微型元件至基板上的方法还包含蒸发液体层后升高增高黏合层的温度至高于增高黏合层的熔点。
根据本发明的一实施例，贴附微型元件至基板上的方法还包含在蒸发液体层后升高增高黏合层的温度至高于增高黏合层和电极的共晶点。
根据本发明的一实施例，当毛细力抓住微型元件时，位于微型元件和增高黏合层之间的液体层的厚度小于微型元件的厚度。
根据本发明的一实施例，电极的材料包含铜(copper，Cu)。
根据本发明的一实施例，气体的水蒸气压高于环境水蒸气压。
根据本发明的一实施例，气体主要由氮和水所组成。
本发明与现有技术相比具有明显的优点和有益效果。借由上述技术方案，本发明的贴附微型元件至基板上的方法可以减少由剪切力产生并施加在微型元件上的力矩，使得贴附结构变得较为稳固，从而改善后续制程的良率。
上述说明仅是本发明技术方案的概述，为了能够更清楚了解本发明的技术手段，而可依照说明书的内容予以实施，并且为了让本发明的上述和其他目的、特征和优点能够更明显易懂，以下特举较佳实施例，并配合图式，详细说明如下。
附图说明
图1绘示本发明一些实施例中贴附微型元件至基板上的方法的流程图；
图2A绘示本发明第一实施例中贴附微型元件至基板上的方法中某一中间阶段的剖面示意图；
图2B绘示本发明第二实施例中贴附微型元件至基板上的方法中某一中间阶段的剖面示意图；
图2C绘示本发明第三实施例中贴附微型元件至基板上的方法中某一中间阶段的剖面示意图；
图2D绘示本发明第四实施例中贴附微型元件至基板上的方法中某一中间阶段的剖面示意图；
图2E绘示本发明第五实施例中贴附微型元件至基板上的方法中某一中间阶段的剖面示意图；
图3绘示本发明一些实施例中液体层蒸发后的贴附结构的剖面示意图；
图4绘示本发明另一些实施例中液体层蒸发后的黏合结构的剖面示意图；
图5绘示本发明一些实施例中液体层蒸发后的贴附结构的剖面示意图；
图6绘示本发明又一些实施例中液体层蒸发后的贴附结构的剖面示意图。
【主要元件符号说明】
100：方法
110、120、130、140、150：操作
200、200A、200C、200D：贴附结构
200B：黏合结构
210：基板
220、220a、220b：导电垫
230、230a、230b：增高黏合层
240：液体层
250：微型元件
250T：顶表面
252：电极
254：第一型半导体层
256：主动层
258：第二型半导体层
260：黏附层
350：微型元件(覆晶型LED)
352a：第一电极
352b：第二电极
354：第一型半导体层
356：主动层
358：第二型半导体层
450：微型元件(垂直型LED)
452a：第一电极
452b：第二电极
4502：电流控制层
454：第一型半导体层
456：主动层
458：第二型半导体层
L：长度
F：剪切力
O1：第一开口
O2：第二开口
具体实施方式
为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效，以下结合图式及较佳实施例，对依据本发明提出的贴附微型元件至基板上的方法，其具体实施方式、结构、方法、步骤、特征及其功效，详细说明如后。
有关本发明的前述及其他技术内容、特点及功效，在以下配合参考图式的较佳实施例的详细说明中将可清楚呈现。通过具体实施方式的说明，当可对本发明为达成预定目的所采取的技术手段及功效更加深入且具体的了解，然而所附图式仅是提供参考与说明之用，并非用来对本发明加以限制。
为简化图式，一些现有已知惯用的结构与元件在图式中将以简单示意的方式绘示。并且，除非有其他表示，在不同图式中相同的元件符号可视为相对应的元件。这些图式的绘示是为了清楚表达这些实施方式中各元件之间的连接关系，并非绘示各元件的实际尺寸。
参考图1和图2A至图2E。图1绘示本发明一些实施例中贴附微型元件至基板上的方法100的流程图。图2A至图2E绘示图1的方法100中不同中间阶段的剖面示意图。方法100从操作110开始，在基板210上形成导电垫220(参考图2A)。方法100接着进行操作120，在导电垫220上形成增高黏合层230(参考图2B)。方法100接着进行操作130，在包含蒸气的环境中调节增高黏合层230的温度至选定温度点或喷洒气体至增高黏合层230上，使得增高黏合层230上形成液体层240(参考图2C)。方法100接着进行操作140，在增高黏合层230的上方放置微型元件250，使得微型元件250接触液体层240(参考图2D)。方法100接着进行操作150，蒸发液体层240，使得微型元件250贴附至增高黏合层230并与导电垫220电性连接(参考图2E)。
参考图2A和图2B，在基板210上形成导电垫220以及在导电垫220上形成增高黏合层230。在一些实施例中，导电垫220可包含铜(copper，Cu)，但不以此为限。在一些实施例中，增高黏合层230包含锡(tin，Sn)。在一些实施例中，增高黏合层230的厚度的范围在约1微米和约10微米之间。此厚度为在平行于Z方向量测的厚度，Z方向垂直于基板210的延伸方向(亦即，Y方向)。
参考图2C，在增高黏合层230上形成液体层240。在一些实施例中，液体层240包含水，但不以此为限。在一些实施例中，选定温度点为露点，使得水可凝结并形成在增高黏合层230上。增高黏合层230可稳定地交换热至蒸气，从而使蒸气在增高黏合层230上凝结以形成液体层240。在一些实施例中，将气体喷洒至增高黏合层230上。在一些实施例中，喷洒至增高黏合层230上的气体的水蒸气压高于环境水蒸气压，使其在不需要调整增高黏合层230的温度的情况下，液体层240即可形成在增高黏合层230上。在一些实施例中，气体主要由氮和水所组成。
参考图2D，在增高黏合层230的上方放置微型元件250。在一些实施例中，当微型元件250接触液体层240时，微型元件250由液体层240所产生的毛细力抓住，液体层240位于微型元件250和增高黏合层230之间。在一些实施例中，当毛细力抓住微型元件250时，位于微型元件250和增高黏合层230之间的液体层240的厚度小于微型元件250的厚度。这使得液体层240可抓住微型元件250，且微型元件250的位置保持在基板210上的可控区域内。在一些实施例中，微型元件250包含电极252。电极252面向增高黏合层230。电极252可包含铜，但不以此为限。电极252也可包含黏附材料，例如铬(chromium，Cr)或钛(titanium，Ti)，但不以此为限。在一些实施例中，电极252的厚度小于或等于2微米。在一些实施例中，电极252的厚度小于或等于约0.5微米，从而在前述放置之前制造微型元件250时可避免弯曲生长基板和磊晶层。在一些实施例中，微型元件250包含第一型半导体层254、主动层256和第二型半导体层258。第一型半导体层254接触电极252。主动层256接触第一型半导体层254。第二型半导体层258通过主动层256与第一型半导体层254接合。第一型半导体层254可以是p型半导体层，但不以此为限。第二型半导体层258可以是n型半导体层，但不以此为限。在一些实施例中，微型元件250也可为垂直型发光二极管，例如，垂直共振腔面射型激光(vertical-cavity surface-emitting laser，VCSEL)。
参考图2E，蒸发液体层240。在如图2D所示的液体层240蒸发后，形成如图2E所示的贴附结构200。蒸发液体层240可以是以升高增高黏合层230的温度的方式达成，使得电极252在液体层240蒸发后黏附固定至增高黏合层230。此时，微型元件250贴附于增高黏合层230并电性接触增高黏合层230。所得到的贴附结构200可防止由于施加在微型元件250上的剪切力F而可能造成的损坏。如同图2E的示例，当剪切力F施加在微型元件250上时，例如在平行于Y方向的方向上施加在微型元件250的顶表面250T上，产生了将微型元件250与基板210分开的力矩，力矩的值是剪切力F乘以长度L。长度L是指量测微型元件250被剪切力F施加的一角和液体层240蒸发的界面(亦即，电极252和增高黏合层230之间的界面)所得到的长度。上述实施例中所描述的贴附微型元件250至基板210上的方法100可以缩短长度L，原因在于增高黏合层230预先形成在导电垫220上而不是形成在微型元件250上。因此，可以减少如上所述由剪切力F产生并施加在微型元件250上的力矩，贴附结构200变得较为稳固，从而改善后续制程的良率。
参考图3。图3绘示本发明一些实施例中液体层240蒸发后的贴附结构200A的剖面示意图。图3所描述的实施例和图2A至图2E所描述的实施例的不同点在于，在图3所描述的实施例中，在形成导电垫220之前，在基板210上形成黏附层260。
参考图4。图4绘示本发明一些实施例中液体层240蒸发后的黏合结构200B的剖面示意图。在一些实施例中，当液体层240蒸发后，增高黏合层230的温度进一步升高至高于增高黏合层230的熔点。在一些实施例中，当液体层240蒸发后，增高黏合层230的温度进一步升高至高于增高黏合层230和微型元件250之电极252的共晶点。图4的黏合结构200B显示前述升高温度至高于前述熔点和前述共晶点所得到的结构。
参考图5。图5绘示本发明另一些实施例中液体层240蒸发后的贴附结构200C的剖面示意图。在一些实施例中，微型元件350为覆晶型发光二极管(light-emitting diode，LED)。覆晶型LED 350包含第一型半导体层354、主动层356、第二型半导体层358、第一电极352a和第二电极352b。第二型半导体层358通过主动层356与第一型半导体层354接合。第一电极352a电性连接至第一型半导体层354。第二电极352b电性连接至第二型半导体层358。两个独立的导电垫220a和220b设置在基板210上，两个独立的增高黏合层230a和230b分别设置在导电垫220a和220b上。导电垫220a和220b彼此分隔开。增高黏合层230a和230b彼此分隔开。在一些实施例中，第一型半导体层354为p型半导体层，第二型半导体层358为n型半导体层。导电垫220a用以接收正供应电压，导电垫220b用以接收接地电压或负供应电压。借由执行类似于图1的方法100的方法，覆晶型LED 350可以黏附固定至增高黏合层230a和230b。在一些实施例中，微型元件350的电极352a和352b实质上共平面。
参考图6。图6绘示本发明又一些实施例中液体层240蒸发后的贴附结构200D的剖面示意图。在一些实施例中，微型元件450为垂直型发光二极管(LED)。垂直型LED 450包含第一型半导体层454、主动层456、第二型半导体层458、电流控制层4502、第一电极452a和第二电极452b。第二型半导体层458通过主动层456与第一型半导体层454接合。电流控制层4502与第一型半导体层454接合。电流控制层4502具有第一开口O1和第二开口O2。第一电极452a经由第一开口O1电性连接至第一型半导体层454。第二电极452b经由第二开口O2电性连接至第一型半导体层454。基板210具有至少两个独立的导电垫220a和220b。导电垫220a和220b彼此分隔开。在一些实施例中，导电垫220a用以接收第一电压，导电垫220b用以接收第二电压。第一电压和第二电压可以是相同或不同的电压。借由执行类似于图1所示的方法100的方法，第一电极452a和第二电极452b可分别黏附固定至增高黏合层230a和230b。类似地，第一电极452a和第二电极452b可分别贴附至增高黏合层230a和230b。
综上所述，本发明的实施例提供一种贴附微型元件至基板上的方法，当中的增高黏合层可防止因施加在微型元件上的剪切力而可能造成的损坏。
以上所述，仅是本发明的较佳实施例而已，并非对本发明作任何形式上的限制，虽然本发明已以较佳实施例揭露如上，然而并非用以限定本发明，任何熟悉本专业的技术人员，在不脱离本发明技术方案范围内，当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (15)

1.一种贴附微型元件至基板上的方法，其特征在于，包含：
在基板上形成导电垫；
在所述导电垫上形成增高黏合层；
在包含蒸气的环境中调节所述增高黏合层的温度至选定温度点或喷洒气体至所述增高黏合层上，使得至少一部分所述蒸气或所述气体凝结并在所述增高黏合层上形成液体层；
在所述增高黏合层的上方放置所述微型元件，使得所述微型元件接触所述液体层，并由位于所述微型元件和所述增高黏合层之间的所述液体层所产生的毛细力抓住微型元件，其中所述微型元件包含电极，所述电极面向所述增高黏合层；以及
蒸发所述液体层，使得所述电极贴附至所述增高黏合层并与所述导电垫电性连接。
2.如权利要求1所述的方法，其特征在于，还包含在形成所述导电垫之前在所述基板上形成黏附层。
3.如权利要求1所述的方法，其特征在于，所述增高黏合层的厚度的范围在1微米和10微米之间。
4.如权利要求1所述的方法，其特征在于，所述增高黏合层包含锡。
5.如权利要求1所述的方法，其特征在于，所述电极的厚度小于或等于2微米。
6.如权利要求1所述的方法，其特征在于，所述电极的厚度小于或等于0.5微米。
7.如权利要求1所述的方法，其特征在于，所述液体层包含水。
8.如权利要求1所述的方法，其特征在于，所述选定温度点为露点。
9.如权利要求1所述的方法，其特征在于，蒸发所述液体层包含升高所述增高黏合层的温度，使得所述电极在所述液体层蒸发后黏附固定至所述增高黏合层。
10.如权利要求1所述的方法，其特征在于，还包含在蒸发所述液体层后升高所述增高黏合层的温度至高于所述增高黏合层的熔点。
11.如权利要求1所述的方法，其特征在于，还包含在蒸发所述液体层后升高所述增高黏合层的温度至高于所述增高黏合层和所述电极的共晶点。
12.如权利要求1所述的方法，其特征在于，当所述毛细力抓住所述微型元件时，位于所述微型元件和所述增高黏合层之间的所述液体层的厚度小于所述微型元件的厚度。
13.如权利要求1所述的方法，其特征在于，所述电极的材料包含铜。
14.如权利要求1所述的方法，其特征在于，所述气体的水蒸气压高于环境水蒸气压。
15.如权利要求14所述的方法，其特征在于，所述气体主要由氮和水所组成。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023226457A1 (zh) * 2022-05-26 2023-11-30 厦门市芯颖显示科技有限公司 一种显示面板及用于该显示面板的发光元件和背板

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10797009B1 (en) * 2019-07-09 2020-10-06 Mikro Mesa Technology Co., Ltd. Method for transferring micro device
US10964662B2 (en) * 2019-07-10 2021-03-30 Mikro Mesa Technology Co., Ltd. Method of transferring micro device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101310373A (zh) * 2005-09-29 2008-11-19 松下电器产业株式会社 电子电路构成部件的装配方法以及装配装置
US20090023243A1 (en) * 2004-12-28 2009-01-22 Mitsumasa Koyanagi Method and apparatus for fabricating integrated circuit device using self-organizing function
CN102292802A (zh) * 2009-01-23 2011-12-21 日亚化学工业株式会社 半导体装置及其制造方法
CN102473485A (zh) * 2009-07-21 2012-05-23 日亚化学工业株式会社 导电性材料的制造方法、通过该方法得到的导电性材料、包含该导电性材料的电子设备以及发光装置
CN104733327A (zh) * 2013-12-19 2015-06-24 Imec公司 用于对准微电子组件的方法
CN106486577A (zh) * 2015-08-27 2017-03-08 美科米尚技术有限公司 微型发光二极管装置
US20170215280A1 (en) * 2016-01-21 2017-07-27 Vuereal Inc. Selective transfer of micro devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2891184B2 (ja) * 1996-06-13 1999-05-17 日本電気株式会社 半導体装置及びその製造方法
JP4357189B2 (ja) * 2003-03-07 2009-11-04 株式会社リコー 半導体装置の製造装置及び半導体装置の製造方法
WO2013059762A1 (en) * 2011-10-21 2013-04-25 The Regents Of The University Of California Universal nonopatternable interfacial bonding
US8426227B1 (en) * 2011-11-18 2013-04-23 LuxVue Technology Corporation Method of forming a micro light emitting diode array
US9217541B2 (en) * 2013-05-14 2015-12-22 LuxVue Technology Corporation Stabilization structure including shear release posts
TWI565382B (zh) * 2016-02-05 2017-01-01 財團法人工業技術研究院 電子元件的轉移方法、電子模組及光電裝置
EP3420582A1 (en) * 2016-02-25 2019-01-02 X-Celeprint Limited Efficiently micro-transfer printing micro-scale devices onto large-format substrates
DE102016221281A1 (de) * 2016-10-28 2018-05-03 Osram Opto Semiconductors Gmbh Verfahren zum transferieren von halbleiterchips und transferwerkzeug
JP6770468B2 (ja) * 2017-03-23 2020-10-14 キオクシア株式会社 凍結洗浄装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090023243A1 (en) * 2004-12-28 2009-01-22 Mitsumasa Koyanagi Method and apparatus for fabricating integrated circuit device using self-organizing function
CN101310373A (zh) * 2005-09-29 2008-11-19 松下电器产业株式会社 电子电路构成部件的装配方法以及装配装置
CN102292802A (zh) * 2009-01-23 2011-12-21 日亚化学工业株式会社 半导体装置及其制造方法
CN102473485A (zh) * 2009-07-21 2012-05-23 日亚化学工业株式会社 导电性材料的制造方法、通过该方法得到的导电性材料、包含该导电性材料的电子设备以及发光装置
CN104733327A (zh) * 2013-12-19 2015-06-24 Imec公司 用于对准微电子组件的方法
CN106486577A (zh) * 2015-08-27 2017-03-08 美科米尚技术有限公司 微型发光二极管装置
US20170215280A1 (en) * 2016-01-21 2017-07-27 Vuereal Inc. Selective transfer of micro devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023226457A1 (zh) * 2022-05-26 2023-11-30 厦门市芯颖显示科技有限公司 一种显示面板及用于该显示面板的发光元件和背板

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