CN111508943A - 封装结构及其制造方法 - Google Patents

封装结构及其制造方法 Download PDF

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Publication number
CN111508943A
CN111508943A CN201910559573.0A CN201910559573A CN111508943A CN 111508943 A CN111508943 A CN 111508943A CN 201910559573 A CN201910559573 A CN 201910559573A CN 111508943 A CN111508943 A CN 111508943A
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capacitor
conductor element
insulating
insulating layer
chip
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CN111508943B (zh
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王良丞
林孝羲
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Anchorage Semiconductor Co ltd
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Delta Electronics Inc
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Abstract

本公开内容关于一种封装结构，包含第一电容、系统单芯片及布线层。第一电容设于基板上。系统单芯片与第一电容被固定于第一绝缘层中。布线层用以电性连接于第一电容及系统单芯片，且藉由第二绝缘层设置于第一绝缘层上。本公开内容还涉及到所述封装结构的制造方法。

Description

封装结构及其制造方法
技术领域
本公开内容关于一种封装结构，特别是具有电容及集成电路的封装结构。
背景技术
应用于复杂电子系统的集成电路(Integrated circuit)组件中通常具有数量庞大、相互连接的电路芯片。电路芯片具有微小的尺寸及极高的电路密度。在部分电路中，需要利用大电容来实现某些功能，例如升压或降压。然而，受限于电路芯片的结构，电路芯片内无法设置大的电容器，而这造成了在设计电路上的一个两难状况。
发明内容
本公开内容的一种实施方式为一种封装结构，包含基板、第一电容、系统单芯片、布线层及第二绝缘层。第一电容设于基板上。系统单芯片与第一电容被固定于第一绝缘层内。布线层电性连接于第一电容及系统单芯片。第二绝缘层用以将布线层固定于第一绝缘层上。
本公开内容的另一种实施方式为一种封装结构，包含第一导体元件、绝缘元件及第二导体元件。第一导体元件设于基板上。绝缘元件设于第一导体元件上。第一导体元件、绝缘元件及系统单芯片被固定于第一绝缘层中。第二导体元件设于绝缘元件上，使第一导体元件、绝缘元件及第二导体元件形成第一电容。
本公开内容的又一种实施方式为一种封装结构的制造方法，其先在基板上设置第一电容及系统单芯片。藉由第一绝缘材料，固定第一电容及系统单芯片，以形成第一绝缘层。在第一绝缘层上形成布线层，使第一电容藉由布线层电性连接于系统单芯片。藉由第二绝缘材料，将布线层固定至第一绝缘层上，以在第一绝缘层上形成第二绝缘层。
附图说明
图1为根据本公开内容的部分实施例所示出的封装结构的示意图。
图2A为根据本公开内容的部分实施例所示出系统单芯片的示意图。
图2B为根据本公开内容的部分实施例所示出第一电容的示意图。
图3为根据本公开内容的部分实施例所示出的封装结构的示意图。
图4为根据本公开内容的部分实施例所示出的封装结构的制造方法的流程图。
图5A～图5G为根据本公开内容的部分实施例所示出的封装结构的制造过程图。
其中，附图标记说明如下：
100 封装结构
110 第一绝缘层
111 第一传导体
112 第二传导体
120 第二绝缘层
120a 第一加工层
120b 第二加工层
120c 第三加工层
121 布线层
121a 第一金属元件
121b 第二金属元件
130 基板
131 第一载板
131a 第一传导层
132 第二载板
132a 第二传导层
200 第一电容
210 第一导体元件
220 第二导体元件
230 绝缘元件
300 系统单芯片
310 芯片基板
320 氮化镓层
330 驱动电路
G 栅极
D 漏极
S 源极
B 自举端
P PWM信号端
H 穿孔
C 第二电容
S401～S406 步骤
具体实施方式
以下将以附图说明本公开的多个实施方式，为明确说明起见，许多实务上的细节将在以下叙述中一并说明。然而，应了解到，这些实务上的细节不应用以限制本公开。也就是说，在本公开内容部分实施方式中，这些实务上的细节是非必要的。此外，为简化附图起见，一些现有惯用的结构与元件在附图中将以简单示意的方式示出。
于本文中，当一元件被称为“连接”或“耦接”时，可指“电性连接”或“电性耦接”。“连接”或“耦接”亦可用以表示二或多个元件间相互搭配操作或互动。此外，虽然本文中使用“第一”、“第二”、…等用语描述不同元件，该用语仅是用以区别以相同技术用语描述的元件或操作。除非上下文清楚指明，否则该用语并非特别指称或暗示次序或顺位，亦非用以限定本公开。
请参阅图1，为根据本公开内容的部分实施例的封装结构示意图。封装结构100包含基板130、第一电容200、系统单芯片300及布线层121。在部分实施例中，基板130包含第一载板(carrier，为绝缘材质)131及第二载板132。第一载板131及第二载板132分别包含第一传导层131a以及第二传导层132a。第一载板131及第二载板132间是相互绝缘设置。第一电容200设置于基板130的第一载板131上。系统单芯片300设置于基板130的第二载板132上。
在部分实施例中，第一导体元件210设于第一载板131上的第一传导层131a上。系统单芯片300设于第二载板132的第二传导层132a上。第一载板131及第二载板132的材质可包含不锈钢、铜、铝、金、银、锡、白金或前述各材质的合金组合。第一载板131及第一传导层131a可为相同或相异的材质。同样地，第二载板132及第二传导层132a可为相同或相异的材质。
封装结构100还包含第一绝缘层110及第二绝缘层120。系统单芯片300与第一电容200被固定于第一绝缘层110中。第二绝缘层120用以将布线层121固定于第一绝缘层110上。在部分实施例中，第一绝缘层110是由第一绝缘材料以射出成型制程形成，以固定第一电容200及系统单芯片300。
布线层121用以电性连接第一电容200及系统单芯片300。在部分实施例中，布线层121的材质为金属，且是通过激光雕刻(laser drill)及电镀制程(metal platingprocess)形成，细节将于后文详述。
请参阅图1及图2A所示，“系统单芯片”为一种集成电路(以下简称芯片)，用以将电脑或电子系统中的多个电子元件整合于芯片中。前述电子元件可包含中央处理器、存储器、输入输出端以及二次存储器，且皆设置于单一块基板上。
在部分实施例中，系统单芯片300包含集成电路，例如逻辑集成电路、数字集成电路、多工集成电路、功率集成电路、存储器电路、微机电系统(MEMS)、光电器件、传感器(如：光传感器或指纹传感器等)。在部分实施例中，系统单芯片300包括形成在其内的主动元件(图中未示)，例如晶体管、金属氧化物半导体场效晶体管(MOSFET)、金属氧化物半导体场效晶体管(MISFET)、接面场效晶体管(JFET)、绝缘栅双极晶体管(IGBT)及其组合。
在部分实施例中，系统单芯片300内的电路需要一个大电容。然而，由于大电容的体积与占用面积都太大，而不易设置在系统单芯片300中。在本实施例中，第一电容200是被设于第一绝缘层110中邻近系统单芯片300的位置。因此，本公开内容可以在不影响封装结构100的整体体积的情况下配置大电容。
请参阅图1及图2B所示，在部分实施例中，第一电容200包含第一导体元件210、绝缘元件230及第二导体元件220。第一导体元件210及第二导体元件220可为铜柱。第一导体元件210设于第一绝缘层110中。第一导体元件210、绝缘元件230及系统单芯片300皆被固定于第一绝缘层110中。绝缘元件230设于第一导体元件210上，第二导体元件220设于绝缘元件230上。第一导体元件210、绝缘元件230及第二导体元件220用以形成第一电容200。
为了调整第一电容200的电容值，绝缘元件230的材质可与第一绝缘层110或第二绝缘层120的材质不同。举例而言，绝缘元件230的材质可为陶瓷或云母，且相异于第一绝缘材料的材质。在其他部分实施例中，第一电容200不包含绝缘元件230。亦即，第一导体元件210与第二导体元件230间保持有预定间隙。第一绝缘材料可填满第一导体元件210与第二导体元件230间的该预定间隙。换言之，绝缘元件230的材质可与第一绝缘层110的材质相同。
如图1所示，在部分实施例中，第一导体元件210与绝缘元件230皆设于第一绝缘层110中。第二导体元件220则设于第二绝缘层120中。第二导体元件220及布线层121被固定于第二绝缘层120，且第二导体元件220藉由布线层121电性连接至系统单芯片300。然而，请参阅图3，在其他部分实施例中，根据不同的制程，第一导体元件210、绝缘元件230及第二导体元件220可皆设于第一绝缘层110中，且被第一绝缘材料所固定。第二导体元件220仍藉由布线层121电性连接于系统单芯片300，细节将于后文详述。
请参阅图1及图2A所示，在部分实施例中，系统单芯片300包含芯片基板310、氮化镓层320及驱动电路330。系统单芯片300的顶侧包含至少三个接点，分别为源极S、漏极D以及栅极G。在部分实施例中，系统单芯片300还包含自举端B及PWM信号端P，且第一电容200作为驱动电路330的自举电容。源极S、漏极D及栅极G用以分别接收对应的电压信号，以驱动驱动电路330中的晶体管。PWM信号端P则用以接收PWM信号(Pulse Width Modulation，脉冲宽度调制)，以控制驱动电路330中的开关元件。自举端B电性连接于驱动电路330中自举电容(如：第一电容200)的副极端，用以提升(bootstrap)来自驱动电路330的自举电容的信号。
在部分实施例中，系统单芯片300为氮化镓功率晶体管，驱动电路330为栅极驱动电路。在部分实施例中，栅极驱动电路包含高压端晶体管、低压端晶体管及电源泵。举例而言，栅极驱动电路可为美国专利US9,906,221“DRIVING CIRCUIT OF A POWER CIRCUIT”所讨论的电路。
在第一电容200为驱动电路330的自举电容的实施例中，第一电容200电性连接于栅极端G及自举端B。第一电容200电性连接于驱动电路330，且能根据自举信号而被使能。
如图1所示，在部分实施例中，封装结构100还包含位于第一绝缘层110的第一传导体111。第一传导体111可为铜柱。第一传导体111通过第一传导层131a设置于第一载板131上，以电性连接于第一电容200的第一侧(如：底侧)。布线层121电性连接于第一电容200的第二侧(如：顶侧)。布线层121电性连接于系统单芯片200的栅极，第一传导体111电性连接于第一导体元件210及自举端B。
封装结构100还包含第二传导体112。第二传导体112可为铜柱。第二传导体112通过第二传导层132a设置于第二载板132上，以电性连接于系统单芯片300的第一侧(如：底侧)。此外，第二传导体112电性连接于系统单芯片300的源极S，用以接收源极信号。
图4为根据图1所示的封装结构100的制程方法示意图。图5A～图5E为封装结构100的制作过程示意图。请参阅图1、图4及图5A～图5E所示，制造方法包含步骤S401～S406。在步骤S401中，第一电容200的第一导体元件210、系统单芯片300、第一传导体111、第二传导体112皆设于基板130上。在部分实施例中，第一电容200的第一导体元件210是和第一传导层131a形成于第一载板131上。系统单芯片300与第二传导层132a形成于第二载板132上。
请参阅图5A～图5B所示，在步骤S402中，绝缘元件230形成于第一导体元件210上。在步骤S403中，第一导体元件210及第一电容200的绝缘元件230藉由第一绝缘材料和系统单芯片300固定在一起，以形成第一绝缘层110。在部分实施例中，第一绝缘材料的材质为环氧基树脂(Epoxy)或BT树脂(Bismaleimide Triazine Resin)。
在步骤S404中，请参阅图5C～图5E，通过射出成型制程，在第一绝缘层110上涂布第一加工层(molding layer)120a。接着，通过激光雕刻与电镀制程，形成多个第一金属元件121a。在部分实施例中，如图5C～图5D所示，在通过射出成型制程形成第一加工层120a后，在第一加工层120a上蚀刻出多个穿孔H，穿孔H的位置对应于绝缘元件230、第一传导体111、第二传导体112及系统单芯片300。接着，如图5E所示，通过激光雕刻与电镀制程，在第一绝缘层110上形成多个第一金属元件121a。在部分实施例中，所述第一金属元件121a的其中的一会作为第二导体元件220。第一绝缘层110上的第一加工层120a用以固定第二导体元件220及第一金属元件121a。
请参阅图5F所示，在步骤S405中，以相同于步骤S404的方式，在第一加工层120a上形成第二加工层120b及多个第二金属元件121b。第一金属元件121a及第二金属元件121b用以形成布线层121，使第一电容200的第一导体元件210藉由第一传导体111及第一金属元件121a，电性连接于系统单芯片300的自举端B。第二导体元件220藉由第二金属元件121b电性连接于栅极G。
在步骤S406中，请参阅图1及图5G所示，在第二加工层120b上形成第三加工层120c及多个第三金属元件121c。第一加工层120a、第二加工层120b及第三加工层120c用以形成第二绝缘层120。在部分实施例中，第一加工层120a、第二加工层120b及第三加工层120c皆使用第二绝缘材料。第二绝缘材料用以将布线层121及第二导体元件220固定至第一绝缘层110上以形成第二绝缘层120。在其他部分实施例中，第一加工层120a、第二加工层120b及第三加工层120c亦可使用不同的绝缘材质。
在部分实施例中，在形成第一金属元件121a及第二金属元件121b后，布线层121通过其间隙将形成第二电容C。请参阅图1及图5G所示，第一金属元件121a及其中一个第二金属元件121b之间隙能形成第二电容C。第二电容C形成于第二绝缘层120中，且并联于于第一电容200，使第一电容200及第二电容C皆作为驱动电路330的自举电容。
根据本公开内容的方法，将能把已封装好的第一电容200设置于基板130上。亦即，第一导体元件210、绝缘元件230及第二导体元件220先封装为第一电容200，再放置于基板130上。在其他部分实施例中，第一导体元件210及绝缘元件230可先封装并放置于基板130上，接着，在形成第一绝缘层110后，利用制程形成第二导体元件220或放置第二导体元件220至已经封装于第一绝缘层110的绝缘元件230及第一导体元件210上。
如图5A～图5G所示的实施例，第二导体元件220形成于绝缘元件120上，且设于第二绝缘层120中。在部分实施例中，图3所示，在形成绝缘元件120于第一导体元件210上后，先在绝缘元件230上设置第二导体元件220。接着，藉由第一绝缘材料固定第一导体元件210、第二导体元件220及绝缘元件230。亦即，第一导体元件210、第二导体元件220及绝缘元件230皆设于第一绝缘层110中。
在部分实施例中，在第一导体元件210设置在基板130上后，第一绝缘材料固定第一导体元件210及系统单芯片300。在该实施例中，第一绝缘材料被作为绝缘元件。在形成第一绝缘层110后，再设置第二导体元件220至第一绝缘层110上。第一导体元件210将会与第二导体元件220间保持有预定间隙。据此，第一导体元件210、第二导体元件220，以及介于第一导体元件210及第二导体元件220间的第一绝缘材料将能形成第一电容200。
前述各实施例中的各项元件、运行状态或技术特征，是可相互结合，而不以本公开内容中的文字描述顺序或附图呈现顺序为限。
虽然本公开内容已以实施方式公开如上，然其并非用以限定本公开内容，任何本领域技术人员，在不脱离本公开内容的精神和范围内，当可作各种变动与润饰，因此本公开内容的保护范围当视后附的权利要求所界定者为准。

Claims (20)

1.一种封装结构，包含：
一基板；
一第一电容，设于该基板上；
一系统单芯片，与该第一电容被固定于一第一绝缘层内；
一布线层，电性连接于该第一电容及该系统单芯片；以及
一第二绝缘层，用以将该布线层固定于该第一绝缘层上。
2.如权利要求1所述的封装结构，其中，该第一电容包含：
一第一导体元件，形成于该第一绝缘层中；
一绝缘元件，形成于该第一绝缘层中；以及
一第二导体元件，形成于该绝缘元件上。
3.如权利要求2所述的封装结构，其中，该绝缘元件的材质相异于该第一绝缘层的材质及该第二绝缘层的材质。
4.如权利要求1所述的封装结构，其中，该第一电容包含：
一第一导体元件，位于该第一绝缘层中；以及
一第二导体元件，与该第一导体元件间保持有一间隔。
5.如权利要求1所述的封装结构，还包含：
一第一导体元件，位于该第一绝缘层中，该第一电容藉由该第一导体元件及该布线层电性连接于该系统单芯片。
6.如权利要求1所述的封装结构，其中，该系统单芯片包含一栅极驱动电路，且该第一电容作为该栅极驱动电路的一自举电容。
7.如权利要求1所述的封装结构，其中，该系统单芯片包含一氮化镓功率晶体管。
8.如权利要求1所述的封装结构，还包含：
一第二电容，形成于该第二绝缘层中，且与该第一电容相并联。
9.一种封装结构，包含：
一第一导体元件，设于一基板上；
一绝缘元件，设于该第一导体元件上，其中该第一导体元件、该绝缘元件及一系统单芯片是被固定于一第一绝缘层中；以及
一第二导体元件，设于该绝缘元件上，使该第一导体元件、该绝缘元件及该第二导体元件形成一第一电容。
10.如权利要求9所述的封装结构，其中，该第一导体元件、该第二导体元件、该绝缘元件及该系统单芯片被固定于该第一绝缘层中，且该第二导体元件藉由一布线层电性连接于该系统单芯片。
11.如权利要求9所述的封装结构，其中，该第二导体元件及一布线层被固定于一第二绝缘层中，且该第二导体元件藉由该布线层电性连接于该系统单芯片。
12.如权利要求9所述的封装结构，其中，该绝缘元件的材质包含陶瓷或云母。
13.如权利要求9所述的封装结构，其中，该绝缘元件的材质与该第一绝缘层的材质相同。
14.一种封装结构的制造方法，包含：
在一基板上设置一第一电容及一系统单芯片；
藉由一第一绝缘材料，固定该第一电容及该系统单芯片，以形成一第一绝缘层；
在该第一绝缘层上形成一布线层，使该第一电容藉由该布线层电性连接于该系统单芯片；以及
藉由一第二绝缘材料，将该布线层固定至该第一绝缘层上，以在该第一绝缘层上形成一第二绝缘层。
15.如权利要求14所述的制造方法，还包含：
在该基板上形成一第一导体元件；以及
在形成该第一绝缘层后，在该第一绝缘层上设置一第二导体元件，其中该第二导体元件与该第一导体元件之间保持有一间隔。
16.如权利要求14所述的制造方法，还包含：
在该基板上设置一第一导体元件；
在该第一导体元件上设置一绝缘元件；
在形成该第一绝缘层后，在该第一绝缘层上设置一第二导体元件；以及
藉由该第二绝缘材料，固定该布线层与该第二导体元件。
17.如权利要求14所述的制造方法，还包含：
在该基板上设置一第一导体元件；
在该第一导体元件上设置一绝缘元件；
在该绝缘元件上设置一第二导体元件；以及
藉由该第一绝缘材料，固定该第一导体元件、该第二导体元件及该绝缘元件。
18.如权利要求14所述的制造方法，还包含：
在该基板上设置一第一传导体，其中该第一传导体电性连接于该第一电容的一第一侧，该布线层电性连接于该第一电容的一第二侧，且该布线层及该第一传导体分别电性连接于该系统单芯片的一第一端及一第二端。
19.如权利要求14所述的制造方法，其中，该系统单芯片包含一栅极驱动电路，且该第一电容作为该栅极驱动电路的一自举电容。
20.如权利要求14所述的制造方法，还包含：
利用该布线层中的间隙形成一第二电容，其中该第二电容并联于该第一电容。
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