CN111505372A - Voltage acquisition device - Google Patents
Voltage acquisition device Download PDFInfo
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- CN111505372A CN111505372A CN202010321792.8A CN202010321792A CN111505372A CN 111505372 A CN111505372 A CN 111505372A CN 202010321792 A CN202010321792 A CN 202010321792A CN 111505372 A CN111505372 A CN 111505372A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/252—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with conversion of voltage or current into frequency and measuring of this frequency
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- G08C19/00—Electric signal transmission systems
Abstract
The invention provides a voltage acquisition device, which adopts AD7606-8 as an analog-to-digital converter, adopts Ethernet upper computer communication, adopts ARM + FPGA hardware architecture, uses ARM to complete the work of protocol processing, parameter configuration, filter coefficient generation, data reading, data management and the like, and uses FPGA to complete the work of A/D conversion control, FIR digital filtering, data caching and the like. The equipment receives command information of the upper computer, extracts parameters such as sampling frequency, sampling mode and filter parameters from the information and configures the parameters. And after the data acquisition is finished, the ARM reads the data in the FPGA data cache region through the FSMC bus and sends the data to the upper computer or directly stores the data into the SD card according to the setting. The FIR low pass is realized by the cooperation of ARM and FPGA, and the calculation and quantification of the filter coefficient and the adjustment of the filter structure are completed according to the filtering parameters such as sampling frequency, cut-off frequency and the like. And finally, by utilizing the advantage of parallel execution of the FPGA, the acquisition of voltage signals of 8 channels and FIR low-pass digital filtering with variable parameters are completed simultaneously.
Description
Technical Field
The invention relates to the technical field of data acquisition, in particular to a voltage acquisition device.
Background
Data acquisition is used as an important means for data acquisition, and with the progress of scientific technology and the development of various industries, the data acquisition is rapidly developed and plays an important role in various industries or fields. In a data acquisition system, the role of a data acquisition module is very important, and the performance of the data acquisition module directly affects the sampling performance of the sampling system. Among the existing numerous acquisition modules, the data acquisition module based on the FPGA has the advantages of strong real-time performance, reliable acquisition rate, high data operation speed, parallel operation of multiple modules and the like, and particularly has great advantages in multi-channel data acquisition, but cannot realize complex communication interaction and efficiently manage sampled data and configuration parameters. The data acquisition module with the MCU or the DSP as the core can realize complex communication based on various protocol stacks on one hand, and can efficiently manage data and configuration parameters by using a file system on the other hand, but due to the characteristic of serial execution of instructions, independence among the modules cannot be guaranteed, operations such as data processing and transmission can affect data acquisition, and real-time performance and stability of data acquisition are difficult to guarantee.
In order to eliminate high frequency noise in the sampled data, the data is usually processed by digital filtering. At present, in an embedded system, an FIR filter is usually realized by adopting an MCU, a DSP, and an FPGA. The filter adopting the MCU or the DSP can directly calculate the filter coefficient in the form of floating point number, but the calculation speed is slow, and the filter calculation can influence the operation of other modules; the filter adopting the FPGA has the characteristic of high operation speed, can carry out filtering by an independent module, but has the defects in the aspect of floating point number calculation, and has lower flexibility after the coefficient needs to be quantized.
The voltage signal is a very important parameter output by the sensor, and accurate acquisition and analysis of the voltage is one of the key factors for ensuring that a data acquisition system obtains correct information. From the above analysis, it can be seen that the data acquisition module in the prior art has many disadvantages when applied to voltage acquisition.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a voltage acquisition device which can efficiently and flexibly acquire voltage signals.
In order to achieve the purpose, the invention adopts the specific scheme that: a voltage acquisition device comprises an analog-to-digital converter, a data processing unit, an acquisition control unit and an Ethernet module which are electrically connected in sequence; the analog-to-digital converter is electrically connected with the signal source; the data processing unit comprises an A/D control module, a low-pass filtering module, a data cache module, an acquisition management module and a first communication module, wherein the A/D control module is electrically connected with the analog-to-digital converter, the data cache module is in communication connection with the A/D control module and the data cache module, the acquisition management module is in communication connection with the A/D control module, the low-pass filtering module and the data cache module, and the first communication module is in communication connection with the acquisition management module and the data cache module; the acquisition control unit comprises a protocol processing module, a control signal generation module, a data management module and a second communication module, wherein the protocol processing module is connected with an upper computer through the Ethernet module, the second communication module is in communication connection with the first communication module, the control signal generation module, the protocol processing module and the data management module are in communication connection with the first communication module, and the protocol processing module is in communication connection with the control signal generation module and the data management module.
As a further optimization of the voltage acquisition device: the data processing unit further comprises a signal branch module and a signal selection module, wherein the signal branch module is in communication connection with the A/D control module, the acquisition management module, the low-pass filtering module and the signal selection module, and the signal selection module is also in communication connection with the low-pass filtering module and the data caching module.
As a further optimization of the voltage acquisition device: the first communication module and the second communication module are both set as FSMC bus modules.
As a further optimization of the voltage acquisition device: the control signal generation module comprises a parameter configuration submodule, a state acquisition submodule and a filter coefficient generation submodule.
As a further optimization of the voltage acquisition device: the acquisition control unit further comprises a data reading module which is in communication connection with the second communication module, the protocol processing module and the data management module.
As a further optimization of the voltage acquisition device: the device also comprises a storage module which is in communication connection with the data management module.
Based on the voltage acquisition device, the invention also provides a voltage acquisition method, which comprises the following steps:
s1, the upper computer sends an acquisition instruction to the control signal generation module through the Ethernet module and the protocol processing module;
s2, the control signal generating module generates a control signal according to the acquisition instruction, and sends the control signal to the acquisition management module through the second communication module and the first communication module;
s3, the acquisition management module drives the A/D control module to acquire the original electric signal from the signal source from the analog-to-digital converter according to the control signal;
s4, the acquisition management module drives the low-pass filtering module to perform FIR low-pass digital filtering on the original electric signal data;
s5, the low-pass filtering module sends the filtered data to the data caching module for storage;
s6, the acquisition management module drives the data cache module to send the filtered data to the protocol processing module and the data management module through the first communication module and the second communication module;
and S7, sending the filtered data to an upper computer by the protocol processing module through the Ethernet module or storing the filtered data to the SD card through data management.
Has the advantages that: the invention utilizes the acquisition control unit to complete the operations of external communication, protocol processing, data management, parameter processing and the like, utilizes the data processing unit to complete the data acquisition process, and has the advantages of higher acquisition efficiency, capability of controlling the acquisition process in real time according to the acquisition requirement of the upper computer, more flexibility and wide application range.
Drawings
FIG. 1 is a schematic view of the overall structure of the collecting device of the present invention;
FIG. 2 is a timing diagram of FSMC bus multiplexing mode read and write operations of a data processing unit;
fig. 3 is a schematic diagram of the structure of the FIR low-pass filter.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1 to 3, a voltage acquisition device includes an analog-to-digital converter, a data processing unit, an acquisition control unit, and an ethernet module, which are electrically connected in sequence.
The analog-to-digital converter is electrically connected with the signal source. The analog-to-digital converter is used for converting the electric signal of the signal source into a digital signal.
The data processing unit comprises an A/D control module, a low-pass filtering module, a data caching module, an acquisition management module and a first communication module, wherein the A/D control module is electrically connected with the analog-to-digital converter, the data caching module is in communication connection with the A/D control module and the data caching module, the acquisition management module is in communication connection with the A/D control module, the low-pass filtering module and the data caching module, and the first communication module is in communication connection with the acquisition management module and the data caching module.
The acquisition control unit comprises a protocol processing module, a control signal generation module, a data management module and a second communication module, wherein the protocol processing module is connected with an upper computer through an Ethernet module, the second communication module is in communication connection with the first communication module, the control signal generation module, the protocol processing module and the data management module are all in communication connection with the first communication module, and the protocol processing module is in communication connection with the control signal generation module and the data management module.
When the voltage signal acquisition and buffering device is used, a control command is received from the upper computer, sampling parameters such as sampling frequency, a sampling channel, sampling depth, filter indexes and the like are extracted from the control command, then a filter coefficient is generated according to the sampling parameters, and voltage signal acquisition and buffering are completed according to the filter coefficient. Specifically, firstly, the Ethernet module and the protocol processing module cooperate to enable the control signal generation module to acquire a control command from an upper computer, then the control signal generation module analyzes a sampling parameter from the control command and generates a filter coefficient according to the sampling parameter, then the control signal generation module transmits the filter coefficient to the filter module through the second communication module, the first communication module and the acquisition management module, then the A/D control module and the analog-to-digital conversion module cooperate to acquire an analog signal from a data source and convert the analog signal into a digital signal and transmit the digital signal to the low-pass filter module, then the low-pass filter module performs low-pass filtering processing on the received digital signal according to the filter coefficient to obtain filtered data, and then the first communication module and the second communication module transmit the filtered data to the data management module and the protocol processing module, the data management module stores the acquisition parameters and the like, the filtered data is sent to an upper computer by the protocol processing module through the Ethernet module or is managed and stored to the SD card through the data management module, and finally the acquisition of the voltage signals is completed.
In the embodiment, the analog-to-digital converter adopts AD7076-8 and is connected with the data processing unit through a parallel interface, has 8 analog quantity input channels, and can convert +/-10V and +/-5V analog voltage signals into digital signals under the control of an FPGA (field programmable gate array); the acquisition control unit is realized by adopting an STM32F407IGT6 chip; the data processing unit is realized by adopting an EP4CE10F17C8N chip; the Ethernet module adopts W5500; the low-pass filter adopts an FIR low-pass filter.
The invention utilizes the acquisition control unit to complete the operations of external communication, protocol processing, data management, parameter processing and the like, utilizes the data processing unit to complete the data acquisition process, and has the advantages of higher acquisition efficiency, capability of controlling the acquisition process in real time according to the acquisition requirement of the upper computer, more flexibility and wide application range.
In order to process the acquisition parameters more efficiently, the data processing unit further comprises a signal branch module and a signal selection module, wherein the signal branch module is in communication connection with the A/D control module, the acquisition management module, the low-pass filtering module and the signal selection module, and the signal selection module is also in communication connection with the low-pass filtering module and the data cache module. The signal branch module and the signal selection module are used for completing the connection among the modules, specifically, the signal branch module is used for respectively transmitting the acquired signals to the low-pass filtering module and the signal selection module according to the control signals from the acquisition management module, and the signal selection module is used for respectively transmitting the digital signals from the signal branch module and the acquisition parameters processed by the low-pass filtering module so as to avoid mutual interference. In addition, because the host computer can carry out multichannel ethernet communication simultaneously, consequently the host computer can connect a plurality of these devices simultaneously, realizes the multiple spot collection.
The first communication module and the second communication module can be selected according to actual needs, and in this embodiment, the STM32F407IGT6 chip and the EP4CE10F17C8N chip support FSMC bus communication, so both the first communication module and the second communication module are set as FSMC bus modules. The FSMC bus multiplexing mode read-write time sequence of the data processing unit is shown in figure 2, the FPGA controls the change of bus signals by monitoring the FSMC bus CS0, WR, RD, NADV and the like, and executes corresponding operations on the data bus DB [15:0] according to the time sequence requirement to realize the read-write of the FSMC bus data. In the address multiplexing mode, the address lines and the data of the FSMC bus share the bus and are distinguished by the NADV signals. When CS0 is low, the FPGA monitors the signal change of the NADV, and latches the address data on the DB [15:0] data line at the rising edge of the NADV. The WR signal is pulled down to indicate that data is written, and the FPGA stores the data of the data bus DB [15:0] into a corresponding address interval at the rising edge of the WR to realize the data writing function; the RD is pulled low to indicate that the ARM is about to read data, and the FPGA outputs the data of the corresponding address to a data bus DB [15:0] on the rising edge of the RD so as to finish the data reading function. By adopting the address multiplexing mode to transmit data, mapping of more address intervals can be completed, and multipoint acquisition is better supported.
The specific structure of the control signal generation module is as follows: the control signal generation module comprises a parameter configuration submodule, a state acquisition submodule and a filter coefficient generation submodule. The parameter configuration submodule is mainly used for generating a parameter configuration file after the control of the data processing unit is successfully completed, so that the device can directly acquire voltage signals according to the parameter configuration file after being restarted; the state acquisition submodule is used for acquiring the operating state of the data processing unit, and for example, whether the current analog-to-digital converter and the A/D control module operate normally can be judged by analyzing the digital signals; and the filter coefficient generation submodule is used for generating filter coefficients according to the sampling parameters.
In order to ensure that data can be efficiently transmitted in the acquisition control unit, the acquisition control unit further comprises a data reading module, and the data reading module is in communication connection with the second communication module, the protocol processing module and the data management module. The data reading module has a function similar to that of the signal selection module and is used for completing signal shunting.
In order to ensure the safety of the acquired parameters and facilitate the viewing, the device also comprises a storage module which is in communication connection with the data management module. The storage module adopts an SD card, and based on a Fat32 file system, the data management module drives the SD card through an SDIO interface, and then stores the acquired data and the control parameters into the storage module according to the analysis result of the protocol processing module on the protocol.
Based on the voltage acquisition device, the invention also provides an acquisition method of the voltage acquisition device, which comprises S1-S7.
And S1, the upper computer sends an acquisition instruction to the control signal generation module through the Ethernet module and the protocol processing module.
And S2, the control signal generating module generates a control signal according to the acquisition instruction, and sends the control signal to the acquisition management module through the second communication module and the first communication module. In the control signal, the filter coefficient is the most important parameter, and the specific calculation method of the filter coefficient is as follows.
In the present invention, the FIR low-pass filter is designed by using window function method, first using a frequency response of
By FIR filter to approximate an ideal filter Hd(ejω) Then using a window function ω (n) to derive the unit impulse response of an infinitely long ideal filter
Cutting off a segment, and finally completing h (n) to hd(n) approximation h (n) ═ ω (n) hd(n)。
The filter coefficients are specifically calculated in steps P1 to P6.
P1, selecting an ideal filter as an approximation function, the ideal low-pass filter frequency response being:
p2, calculating h according to the selected filter orderd(n)：
P3, to ensure linear phase, the filter order is added by 1 to obtain α ═ N-1)/2, which represents the sequence hd(n) the length of the truncated sequence, in this case
In particular, when
When the temperature of the water is higher than the set temperature,
p4, mixing hd(n) multiplying the selected window function omega (n) to obtain a unit impulse response h (n) of the FIR digital filter; h (n) ═ ω (n) hd(n)。
P5, multiplying all filter coefficients by (2)Q-1-1, Q is a quantization bit, design takes 16), and the processed coefficients are rounded to form integer coefficients.
P6, converting the integer filter coefficients into two's complement data.
And S3, the acquisition management module drives the A/D control module to acquire the original electric signal from the signal source from the analog-to-digital converter according to the control signal.
And S4, the acquisition management module drives the low-pass filtering module to process the original electric signal to obtain the acquisition parameters. The FIR low-pass filter adopted by the invention has 5 structures of direct type, cascade type, linear phase type, frequency sampling type and fast convolution type, in this embodiment, the direct type, i.e. convolution type is adopted, and the system function is:
in the traditional direct FIR low-pass filter, the whole filter only has one data output point, and the supported filtering order is limited.
And S5, the low-pass filtering module sends the acquisition parameters to the data caching module for storage. In this embodiment, the data caching module is implemented by using a RAM unit built in an EP4CE10F17C8N chip, and the data caching module uses 9 RAMs with a depth of 1024 and a width of 32, where the RAM1-RAM8 is used as a cache for acquiring parameters, and the RAM _ READ is used as a cache for reading the acquiring parameters by the acquisition control unit. Furthermore, the data cache module supports two acquisition modes of eight-channel synchronous acquisition and single-channel acquisition, and can select a proper acquisition mode according to the specific situation of the signal source, for example, the eight-channel synchronous acquisition mode is adopted when the data volume of the signal source is large, so that the acquisition efficiency is improved. In an eight-channel synchronous acquisition mode, the data storage of the channels 1 to 8 is respectively corresponding to the RAMs 1 to 8, the switching of the RAMs is controlled by a write control logic unit, and the data of the corresponding channels are written into the corresponding RAMs; when sampling in the single-channel acquisition mode, the RAM1 to the RAM8 are used for data storage, and different sampling depths are realized according to the setting of the number of the used RAMs. The data is READ through a READ control unit of the buffer module and the RAM _ READ, after the data buffering is completed, the READ control logic sequentially READs data from the RAM1 to the RAM8 and writes the data into the RAM _ READ, and the ARM READs the data through the FSMC bus to obtain sampling data.
And S6, the acquisition management module drives the data cache module to send the filtered data to the protocol processing module and the data management module through the first communication module and the second communication module.
And S7, the protocol processing module sends the filtered data to the upper computer through the Ethernet module.
Considering the functions of knowing the equipment state, setting sampling parameters, controlling data acquisition and the like in the voltage signal acquisition, the method defines the message types of a heartbeat message packet, an equipment information request and a feedback message packet thereof, a sampling frequency setting message packet, a sampling length setting message packet, a sampling mode setting message packet, an FIR filter setting message packet, a sampling control message packet, an operation result feedback message and the like for a protocol processing module, as shown in Table 1. When the upper computer needs to control a plurality of acquisition devices simultaneously, conflict of message identification is avoided, each device has an ID number, and only messages with correct sources and the same target ID as the ID of the acquisition module can be analyzed and processed by the acquisition module.
Table 1 communication protocol message type table
| Message type | Message description |
| Heartbeat messages | The equipment sends the information to the upper level, including the equipment type, equipment state and the like |
| Sampling frequency setting | Setting voltage signal sampling frequency |
| Channel range setting | Setting simulation channel range |
| Sample length setting | Setting voltage signal sampling length |
| Sampling mode setting | Setting a sampling mode, and selecting whether to upload data in real time or store the data in a data storage |
| FIR filter parameter setting | Enabling and setting FIR filter parameters or turning off filters |
| Sampling control command | Starting or stopping data sampling |
| Device parameter acquisition command | Obtaining device parameter information to a device |
| Device parameter feedback package | The equipment feeds back equipment parameters to the upper computer |
| Feedback message packet | Feeding back parameter setting result or operation execution result, and returning failure reason when failure occurs |
| Sampling data packet | Uploading of sampling data for voltage signal |
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (7)
1. A voltage acquisition device, its characterized in that: the system comprises an analog-digital converter, a data processing unit, an acquisition control unit and an Ethernet module which are electrically connected in sequence;
the analog-to-digital converter is electrically connected with the signal source;
the data processing unit comprises an A/D control module, a low-pass filtering module, a data cache module, an acquisition management module and a first communication module, wherein the A/D control module is electrically connected with the analog-to-digital converter, the data cache module is in communication connection with the A/D control module and the data cache module, the acquisition management module is in communication connection with the A/D control module, the low-pass filtering module and the data cache module, and the first communication module is in communication connection with the acquisition management module and the data cache module;
the acquisition control unit comprises a protocol processing module, a control signal generation module, a data management module and a second communication module, wherein the protocol processing module is connected with an upper computer through the Ethernet module, the second communication module is in communication connection with the first communication module, the control signal generation module, the protocol processing module and the data management module are in communication connection with the first communication module, and the protocol processing module is in communication connection with the control signal generation module and the data management module.
2. A voltage acquisition device as claimed in claim 1, wherein: the data processing unit further comprises a signal branch module and a signal selection module, wherein the signal branch module is in communication connection with the A/D control module, the acquisition management module, the low-pass filtering module and the signal selection module, and the signal selection module is also in communication connection with the low-pass filtering module and the data caching module.
3. A voltage acquisition device as claimed in claim 2, wherein: the first communication module and the second communication module are both set as FSMC bus modules.
4. A voltage acquisition device according to claim 3, wherein: the control signal generation module comprises a parameter configuration submodule, a state acquisition submodule and a filter coefficient generation submodule.
5. A voltage acquisition device according to claim 4, wherein: the acquisition control unit further comprises a data reading module which is in communication connection with the second communication module, the protocol processing module and the data management module.
6. A voltage acquisition device as claimed in claim 1, wherein: the device also comprises a storage module which is in communication connection with the data management module.
7. The acquisition method of a voltage acquisition device according to claim 6, characterized in that: the method comprises the following steps:
s1, the upper computer sends an acquisition instruction to the control signal generation module through the Ethernet module and the protocol processing module;
s2, the control signal generating module generates a control signal according to the acquisition instruction, and sends the control signal to the acquisition management module through the second communication module and the first communication module;
s3, the acquisition management module drives the A/D control module to acquire the original electric signal from the signal source from the analog-to-digital converter according to the control signal;
s4, the acquisition management module drives the low-pass filtering module to perform FIR low-pass digital filtering on the original electric signal data;
s5, the low-pass filtering module sends the filtered data to the data caching module for storage;
s6, the acquisition management module drives the data cache module to send the filtered data to the protocol processing module and the data management module through the first communication module and the second communication module;
and S7, sending the filtered data to an upper computer by the protocol processing module through the Ethernet module or storing the filtered data to the SD card through data management.
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