CN111463850A - Charging current control circuit and control method, electronic equipment and charging method thereof - Google Patents
Charging current control circuit and control method, electronic equipment and charging method thereof Download PDFInfo
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Abstract
The invention discloses a charging current control circuit and a charging current control method thereof, and an electronic device and a charging method thereof, wherein the charging current control circuit comprises: the charging current output module is used for outputting charging current and outputting sampling current obtained by sampling the charging current according to a sampling proportion; the sampling module is connected with the charging current output module and is used for acquiring sampling voltage according to the sampling current; the reference generation module is used for generating a reference voltage; the error amplification module is connected with the sampling module and the reference generation module and used for carrying out error amplification on the sampling voltage and the reference voltage, outputting an error amplification signal to the charging current output module and controlling the charging current; and the control module is used for outputting a corresponding sampling control signal to the charging current output module according to the charging mode signal and adjusting the sampling proportion.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a charging current control circuit.
Background
Lithium batteries are used as green new energy resources and are widely applied to various electronic products in life. With the popularization of digital products such as mobile phones, notebook computers and the like, lithium ion batteries are widely used in such products with excellent performance, and are gradually developing to other product application fields such as portable electronic devices, wearable devices, and IoT (Internet of Things) devices. In the lithium battery power supply systems, due to different sizes and different space areas of the systems, applications with different lithium battery capacities are derived, for example, a TWS (True Wireless Stereo) earphone has the application of the lithium battery capacities of 30 mAh-100 mAh, and also has the application of the lithium battery capacities of thousands of milliampere hours of a mobile phone. The difference of battery capacities and the charging characteristics of lithium batteries have different requirements on the charging control, and the size of the charging current also has different requirements due to the inconsistency of the battery capacities, but the control accuracy of the charging current is the most important requirement no matter how the charging current is.
The charging phase of a lithium battery generally comprises three charging phases including: a pre-charge phase, a fast charge phase, and a constant voltage charge phase. The pre-charge phase and the fast charge phase are both fixed current charge phases, and the charge current of the pre-charge phase is often much smaller than that of the fast charge phase. In order to satisfy the charging current control of different battery capacities, it has been a common practice in many charging control chips to adjust the charging current.
The charging architecture of the existing lithium battery charging control chip is generally divided into two types: linear charging, switch charging. In order to realize the control of the fixed current, a current loop is usually used for controlling, generally, a current sampling mode is used for inputting a sampling current and a fixed current threshold into an error amplifier, the loop control is realized through the output feedback of the error amplifier, and finally, the purpose that the charging current is the current threshold is realized. Therefore, the control of a typical charge loop typically includes a current sampling circuit and an error amplifier. Because the charging current range is very wide, the situation that the high-precision targets of the low-current charging current and the high-current charging current cannot be considered frequently occurs in the same current control circuit.
Disclosure of Invention
The invention aims to provide a charging current control circuit and a control method thereof, an electronic device and a charging method thereof, and improve the accuracy of charging current control.
In order to solve the above problem, an aspect of the present invention provides a charging current control circuit, including: the charging current output module is used for outputting charging current and outputting sampling current obtained by sampling the charging current according to a sampling proportion; the sampling module is connected with the charging current output module and is used for acquiring sampling voltage according to the sampling current; the reference generation module is used for generating a reference voltage; the error amplification module is connected with the sampling module and the reference generation module and used for carrying out error amplification on the sampling voltage and the reference voltage, outputting an error amplification signal to the charging current output module and controlling the charging current; and the control module is used for outputting a corresponding sampling control signal to the charging current output module according to the charging mode signal and adjusting the sampling proportion.
Optionally, adjusting the sampling ratio includes: when the preset charging current corresponding to the charging mode signal is increased, the sampling proportion is reduced; and/or when the preset charging current corresponding to the charging mode signal is reduced, the sampling proportion is increased.
Optionally, the charging current output module includes: a power tube and a sampling tube; the grid electrode of the sampling tube is connected with the grid electrode of the power tube and is connected to the output end of the error amplification module; the source electrodes of the sampling tube and the power tube are connected to a power supply end; the drain electrode of the power tube is used for outputting charging current, and the drain electrode of the sampling tube is connected to the sampling module and used for outputting sampling current.
Optionally, the power transistor includes N sub power transistors connected in parallel, where a gate of at least one sub power transistor is connected to at least one first switch in a one-to-one correspondence manner and connected to the output terminal of the error amplification module through the first switch, respectively, and N is an integer greater than or equal to 2; the sampling control signal is used for controlling the on-off state of each first switch.
Optionally, the sampling tubes include M sub-sampling tubes connected in parallel, wherein a gate of at least one sub-sampling tube is connected to at least one second switch in a one-to-one correspondence manner and connected to an output end of the error amplification module through the second switch, and M is an integer greater than or equal to 2; the sampling control signal is used for controlling the on-off state of each second switch.
Optionally, the reference generating module is configured to generate at least two reference voltage values; the control module is further used for outputting a reference voltage control signal according to the charging mode signal and controlling the reference generation module to output a corresponding reference voltage.
Optionally, the controlling the reference generating module to output the corresponding reference voltage includes: a first reference voltage outputted when the first preset current is detected; when the preset charging current corresponding to the charging mode signal is a second preset current, outputting a second reference voltage; the first preset current is smaller than the first preset current, and the first reference voltage is larger than the second reference voltage.
Optionally, the reference generating module includes: the reference current source is respectively connected with at least two paths of resistors between the output end of the reference current source and a grounding end, each path of resistor is respectively connected with the reference current source through a corresponding third switch, and the connection ends of the at least two paths of resistors and the reference current source are used for outputting reference voltage; the reference voltage control signal is used for controlling the on-off state of each third switch.
Optionally, the sampling module includes: the voltage clamping unit and the voltage sampling unit; the voltage clamping unit is connected to the drain electrode of the sampling tube and the drain electrode of the power tube and is used for clamping the drain electrode voltage of the sampling tube to the drain electrode voltage of the power tube; the voltage sampling unit is used for converting the sampling current into sampling voltage through a sampling resistor and outputting the sampling voltage to the error amplification module; the control module is also used for outputting a sampling voltage control signal according to the charging mode signal and controlling the size of the sampling resistor.
Optionally, the voltage clamping unit includes a third transistor, a second transistor, a first constant current source connected to ground, and a second constant current source; the source electrode of the third transistor is connected to the sampling current output end of the charging current output module, and the drain electrode of the third transistor is connected to the first constant current source; the source electrode of the second transistor is connected to the drain electrode of the power tube, and the drain electrode of the second transistor is connected to the second constant current source; the gates of the third and second transistors are commonly connected to the drain of the third transistor.
Optionally, the voltage sampling unit includes a first transistor, a source of the first transistor is connected to the sampling current output end of the charging current output module, a drain of the first transistor is connected to at least two sampling resistors, and the two sampling circuits are respectively connected in series between a drain of the third transistor and a ground terminal through corresponding fourth switches; the sampling voltage control signal is used for controlling the on-off state of the fourth switch.
The technical scheme of the invention also provides a charging current control method, which comprises the following steps: sampling the charging current according to a sampling proportion, and outputting a sampling current; converting the sampled current to a sampled voltage; carrying out error amplification on the sampling voltage and the reference voltage, and controlling the sampling current through an error amplification signal; and adjusting the sampling proportion according to different charging modes.
Optionally, different charging modes correspond to different preset charging currents; when the preset charging current corresponding to the charging mode is increased, the sampling proportion is reduced; and when the preset charging current corresponding to the charging mode signal is reduced, the sampling proportion is increased.
Optionally, when the preset charging current corresponding to the charging mode is increased, the reference voltage is reduced; and when the preset charging current corresponding to the charging mode signal is reduced, the reference voltage is increased.
Optionally, the charging current is output through a power tube, and the charging current is sampled by a sampling tube according to a sampling proportion.
Optionally, the power tube includes at least two sub power tubes, and the sampling ratio is adjusted by controlling the number of sub power tubes effective therein.
Optionally, the sampling tube comprises at least two sub-sampling tubes, and the sampling ratio is adjusted by controlling the number of effective sub-sampling tubes.
The technical solution of the present invention also provides an electronic device, including: the charging current control circuit of any of the above; a battery, a current input end of the battery being connected to a charging current output end of the charging current control current.
The technical solution of the present invention further provides a method for charging an electronic device, where the method for charging a battery of the electronic device includes: and controlling the charging current by adopting the charging current control method.
The charging current control circuit can adjust the sampling proportion of the charging current output module according to the charging mode signal. The sampling proportion is adjusted according to different charging stages, the phenomenon that the performance or parameters of devices in the charging current output module are changed due to the change of the charging current can be avoided or reduced, the sampling accuracy of the charging current is further improved, and the high-precision control of the charging current in different charging stages or in a wide charging current range is finally realized.
Furthermore, a power tube is adopted in the charging current output module to output charging current, and a sampling tube is utilized to sample the current of the power tube to obtain sampling current. The sampling tube can comprise a plurality of sub-sampling tubes, the power tube can comprise a plurality of sub-power tubes, so that the sampling proportion can be adjusted by controlling the number of the sub-sampling tubes and the sub-effective power tubes which are connected, the adjusting method is simple, and the adjustment of different accuracies of the sampling proportion can be realized according to the number of the sub-sampling tubes and the sub-effective power tubes.
Furthermore, the control module is further used for controlling the sampling module and the reference module, so that the sampling voltage and the reference voltage are maintained at higher working points in different charging stages, the offset influence of the error amplification module is reduced, and the high precision of the control of the charging current is further improved.
Drawings
Fig. 1 is a schematic structural diagram of a charging current control circuit according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of a charging current control circuit according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a circuit implementation of a control module according to an embodiment of the invention;
fig. 4 is a schematic waveform diagram of signals of a charging current control circuit according to an embodiment of the present invention during charging current control;
fig. 5 is a schematic structural diagram of a charging current control circuit according to an embodiment of the invention;
FIG. 6 is a schematic circuit diagram of a control module according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating a charging current control method according to an embodiment of the invention.
Detailed Description
As described in the background art, the inventors have analyzed and found that it is difficult to achieve both the control accuracy of a large current and the control accuracy of a small current in the prior art. In a conventional charging current control circuit, a charging current is output through a power transistor, and a sampling transistor is used to sample the current of the power transistor, thereby obtaining a sampling current. Because the power tube needs to support the heavy current, the size can be great usually, under the less circumstances of charging current, because the size of power tube is great, power tube grid voltage can be very little by charging loop adjustment to improve the resistance of power tube, grid voltage undersize makes the power tube get into subthreshold stage easily, the precision of the current sampling that the sampling pipe carried out this moment can very big decline, thereby cause the charging current error grow, can't realize the accurate control to charging current. Therefore, the charging current control circuit and the control method in the prior art cannot realize high-precision current control in a wide current range.
In order to solve the above problems, the present invention provides a novel charging current control circuit and a charging current control method.
The technical solutions of the exemplary embodiments provided in the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. The following embodiments and their technical features may be combined with each other without conflict.
Fig. 1 is a schematic structural diagram of a charging current control circuit according to an embodiment of the invention.
In this embodiment, the charging current control circuit includes: a charging current output module 101, a sampling module 102, a reference generation module 103, an error amplification module 104, and a control module 105.
The charging current output module 101 is configured to output a charging current ICHG and output a sampling current ISEN obtained by sampling the charging current ICHG according to a sampling ratio. In an alternative, the charging current output module 101 is configured to be connected to a power source and a battery, convert a voltage of the power source into a charging current, output the charging current to the battery, and charge the battery. Meanwhile, in order to realize the control of the charging current ICHG, the charging current output module 101 is further configured to output a sampling current ISEN obtained by sampling the charging current ICHG at a certain sampling ratio, so as to output the sampling current ISEN to an external feedback loop, thereby realizing the loop control of the charging current ICHG. When the sampling ratio is r, the sampling current ISEN is r ICHG.
The sampling module 102 is connected to the charging current output module 101, and is configured to obtain a sampling current ISEN output by the charging current output module 101, and obtain a sampling voltage VS according to the sampling current ISEN. The incoming sampling current ISEN can be converted into a corresponding sampling voltage VS by using a suitable conversion circuit structure. In some embodiments, the sampling voltage VS may be in a direct relationship with the sampling current ISEN; in other embodiments, the relationship between the sampling voltage VS and the sampling current ISEN may be other.
The reference generating module 103 is configured to generate a reference voltage VR required by loop control. The reference voltage VR corresponds to a preset charging current of a current charging stage. Different charging phases generally correspond to different magnitudes of the preset charging current, and thus to different reference voltages VR.
The error amplifying module 104 is connected to the sampling module 102 and the reference generating module 103, and configured to amplify an error between the sampling voltage VS and the reference voltage VR, and output an error amplifying signal CTR L to the charging current output module 101, so as to control the charging current ICHG, where the error amplifying signal CTR L is output according to a difference between the sampling voltage VS and the reference voltage VR, the charging current output module 101 is controlled, and the magnitude of the output charging current ICHG is adjusted, so as to achieve accurate control of the charging current, where on one hand, when the charging mode changes, the actual charging current is adjusted to a preset charging current value corresponding to the reference voltage VR in the current charging mode, and on the other hand, when the preset charging current does not change, the charging current ICHG is kept stable, so as to achieve constant current control of the charging current, when the charging phase changes, the reference voltage VR is adjusted, the error amplifying signal CTR L also changes, and the charging current output module 101 is controlled to adjust the new preset charging current value, and the error amplifying signal CTR L may also be a common error signal CTR L.
The control module 105 is connected to the charging current output module 101, and configured to output a corresponding sampling control signal VG to the charging current output module 101 according to the charging mode signal FAST _ CHG, so as to adjust a sampling ratio when the charging current is sampled. The charging mode signal FAST _ CHG may be a digital or analog signal, and different charging stages correspond to different signal characteristics through a certain encoding protocol. In some embodiments, the high and low levels of the charging mode signal FAST _ CHG may be utilized to respectively correspond to different charging phases; it is also possible to correspond to different charging phases by modulating the duty cycle or frequency of the charging mode signal FAST _ CHG. The control module 105 may detect the current charging stage by decoding the charging mode signal FAST _ CHG, so as to output a sampling control signal VG corresponding to the current charging stage to the charging current output module 101, adjust the sampling ratio, and implement control on current sampling.
Specifically, the adjusting the sampling ratio includes: when the preset charging current corresponding to the charging mode signal FAST _ CHG is increased, the sampling proportion is reduced; and when the preset charging current corresponding to the charging mode signal FAST _ CHG is decreased, increasing the sampling ratio. For example, when the charging mode signal corresponds to the pre-charging stage, the charging current is low, and a large sampling ratio is adopted; when the charging mode signal is adjusted from the pre-charging phase to the fast charging phase, the charging current is increased, and the sampling ratio is correspondingly decreased. Because the circuit devices in the charging current output module 101 change performance or parameters to some extent under different charging currents due to their own characteristics, the accuracy of current sampling is affected. In this embodiment, the sampling proportion is adjusted for different charging stages, so that the change of the device performance or parameters in the charging current output module 101 caused by the change of the charging current can be avoided or reduced, the sampling accuracy of the charging current is further improved, and the accurate control in a larger charging current range is finally realized.
In this embodiment, the reference generating module 103 is further configured to generate at least two reference voltage values; the control module 105 is connected to the reference generating module 103, and is further configured to output a reference voltage control signal VD according to the charging mode signal FAST _ CHG, so as to control the reference generating module 103 to output a reference voltage corresponding to the charging mode signal FAST _ CHG. And setting a reference voltage value of the current charging stage according to the sampling voltage value of the charging current at the preset charging current value. In an embodiment, when the precharge charging current is increased, the sampling ratio is decreased more, so that the sampling voltage value corresponding to the preset charging current is decreased, and therefore, in this embodiment, controlling the reference generating module 103 to output the corresponding reference voltage includes: when the preset charging current of the charging stage corresponding to the charging mode signal FAST _ CHG is increased, reducing the reference voltage; when the preset charging current corresponding to the charging mode signal FAST _ CHG decreases, the reference voltage is increased. In other embodiments, the reference voltage value may also be increased as the preset charging current increases and the sampling ratio decreases slightly.
The control module 105 is further connected to the sampling module 102, and configured to output a sampling voltage control signal VC according to the charging mode signal FAST _ CHG, and adjust the magnitude of the sampling voltage VS output by the sampling module 102, so that the sampling voltage VS always corresponds to a higher voltage value and does not deviate from a normal working range, thereby avoiding that the error amplification module 104 is out of order due to a larger fluctuation of the sampling voltage VS, which affects the accuracy of loop control.
In one embodiment, when the precharge current is increased, the sampling ratio is decreased more, so that the sampling current ISEN is decreased greatly, the ratio between the sampling voltage and the sampling current can be properly increased, and the finally output sampling voltage value is increased, so that the sampling voltage value still maintains a higher voltage. When the pre-charging current is decreased, the sampling proportion is increased more, so that the sampling current ISEN is greatly increased, and the proportion between the sampling voltage and the sampling current can be properly decreased in order to avoid the sampling voltage value exceeding the reasonable working range of the error amplification module 104.
In other embodiments, the sampling module 102 may also keep the ratio between the sampled voltage and the sample fixed, without being controlled by the control module 105.
Fig. 2 is a schematic structural diagram of a charging current control circuit according to another embodiment of the present invention.
In this embodiment, the charging current output module 201 of the charging current control circuit includes: a power tube MP and a sampling tube MPS; the grid of the sampling tube MPS is connected to the grid of the power tube MP, and is connected to the output end of the error amplification module 204; the source electrodes of the sampling tube MPS and the power tube MP are both connected to a power supply terminal VIN. The drain electrode of the power tube MP is connected to a BATTERY BATTERY, the charging current ICHG is output to the BATTERY, and the drain electrode voltage BAT is charging voltage; the drain of the sampling tube MPS is connected to the sampling module 202 for providing a sampling current ISEN to the sampling module 202.
When the width-to-length ratio of the power tube MP is K and the width-to-length ratio of the sampling tube MPs is L, the sampling ratio between the sampling tube MPs and the power tube MP is L/K.
In this embodiment, the power transistor MP includes 3 sub power transistors connected in parallel, which are respectively sub power transistors MP 1-MP 3, wherein first switches SW5 and SW6 are respectively connected between gates of the sub power transistors MP2 and MP3 and the output terminal of the error amplification module 204, and a gate of the sub power transistor MP1 is directly connected to the output terminal of the error amplification module 204. When the first switches SW5 and SW6 are both turned on, the effective width-to-length ratio of the power tube MP is maximized, so that the sampling ratio between the sampling tube MPs and the power tube MP is minimized. The sampling proportion is smaller as the number of the connected sub power tubes is larger, so that the sampling proportion can be adjusted by controlling the on-off states of the first switches SW5 and SW 6.
The control module 205 is configured to identify a charging phase according to the charging mode signal FAST _ CHG, so as to output sampling control signals VG1 and VG2 to control on/off states of the first switches SW5 and SW6, respectively, thereby implementing adjustment of a sampling ratio. When the first switches SW5 and SW6 are all turned on, the sub-power tubes MP1, MP2 and MP3 are all effective power tubes, and at this time, the width-to-length ratio K of the power tube MP is the largest, and the sampling ratio is the smallest; when the first switches SW5 and SW6 are both off, only the sub-power transistor MP1 is an active power transistor, and at this time, the width-to-length ratio K of the power transistor MP is the smallest and the sampling ratio is the largest.
In other embodiments, the power transistor MP may include N sub power transistors connected in parallel, where a gate of at least one sub power transistor is connected to the output end of the error amplifying module through a corresponding first switch, and N is an integer greater than or equal to 2; the control module 205 may control each first switch, and the larger the number of sub power transistors is, the larger the adjustment range and the adjustment precision for the sampling ratio are.
In this embodiment, the sampling module 202 includes: the voltage clamping unit and the voltage sampling unit. The voltage clamping unit is connected to the drain electrode of the sampling tube MPS and the drain electrode of the power tube MP and is used for clamping the drain electrode voltage of the sampling tube MPS to the drain electrode voltage BAT of the power tube MP, so that the grid electrode, the source electrode and the drain electrode voltage of the sampling tube MPS and the power tube MP are correspondingly the same, the influence of the sampling tube MPS on the channel modulation effect during sampling of the power tube MP is eliminated, and accurate sampling is realized. The voltage sampling unit is configured to convert the sampling current ISEN into a sampling voltage through a sampling resistor, and output the sampling voltage to the error amplification module 204.
In this embodiment, the voltage clamping unit includes: the driving circuit comprises a third transistor M3, a second transistor M2, a first constant current source I1 connected to the ground and a second constant current source I2; the source of the third transistor M3 is connected to the drain of the sampling tube MPS, and the drain is connected to the first constant current source I1; the source of the second transistor M2 is connected to the drain of the power transistor MP, and the drain is connected to the second constant current source I2; the gates of the third transistor M3 and the second transistor M2 are commonly connected to the drain of the third transistor M3. The third transistor M3 and the second transistor M2 are two identical transistors, and in this embodiment, the third transistor M3 and the second transistor M2 are both PMOS transistors. In other embodiments, the third transistor M3 and the second transistor M2 may also be NMOS transistors, and accordingly, the circuit is adjusted reasonably according to the operating characteristics of the transistors, so as to adjust the voltage at three terminals of the transistors. The third transistor M3, the second transistor M2, the first current source I1 connected to ground, and the second constant current source I2 form a mirror structure, so that the source voltage of the third transistor M3 is the same as the source voltage of the second transistor M2, and is equal to the drain voltage BAT of the power transistor MP. Since the source of the third transistor M3 is connected to the drain of the sampling tube MPS, the voltages of the drain of the sampling tube MPS and the drain of the power tube MP are both BAT, so that the voltages of the gate, the source and the drain of the sampling tube MPS and the power tube MP are all the same.
The voltage sampling unit comprises a first transistor M1, the source of the first transistor M1 is connected to the sampling current output end of the charging current output module 201, the drain of the first transistor M1 is connected to two parallel sampling resistors, namely a sampling resistor R1 and a sampling resistor R2, the sampling resistor R1 is connected in series between the drain of the first transistor M1 and the ground terminal through a fourth switch SW1, and the sampling resistor R2 is connected in series between the drain of the first transistor M1 and the ground terminal through a fourth switch SW 2. The sampling resistor R1 and the sampling resistor R2 have different resistances.
Since the currents flowing through the third transistor M3 and the second transistor M2 are both constant currents and do not change, the sampling current ISEN is entirely shunted to the voltage sampling unit, and the sampling current is converted into a sampling voltage through the sampling resistor. Specifically, the sampling current ISEN flows through the first transistor M1 to the lower sampling resistor, the sampling voltage VS is ISEN × R, and according to the on-off states of the fourth switches SW1 and SW2, the effective sampling resistor R may be a parallel resistance value of R1, R2 or R1 and R2, so that the sampling voltage VS is adjusted.
The control module 205 is configured to output sampling voltage control signals VC1, VC2 according to the charging mode signal FAST _ CHG to control the on/off states of the fourth switches SW1 and SW2, respectively, so as to select the corresponding sampling resistor as the effective sampling resistor.
In other embodiments, the drain of the first transistor M1 may further be connected with three or more sampling resistors, each sampling resistor is connected in series between the drain of the first transistor M1 and the ground terminal through a fourth switch, and the control module 204 may control each fourth switch, where the larger the number of sampling resistors is, the larger the adjustment range and the adjustment precision for the effective sampling resistor are.
The reference generation module 203 includes: the reference current source IREF is respectively connected with a reference resistor R3 and a reference resistor R4 between the output end and the ground end of the reference current source IREF, the reference resistor R3 and the reference resistor R4 are respectively connected with the reference current source IREF through a third switch SW3 and a third switch SW4, and the connection end of the reference resistor and the reference current source IREF is used for outputting a reference voltage VR.
The control module 205 is configured to output reference voltage control signals VD1 and VD2 according to the charging mode signal FAST _ CHG to respectively control on/off states of the third switches SW3 and SW4, so as to adjust the reference voltage VR.
In other embodiments, three or more reference resistors may be further connected between the reference current source IREF and the ground terminal, each reference resistor is connected in series between the reference current source IREF and the ground terminal through a third switch, and the control module 205 may control each third switch, where the larger the number of the reference resistors is, the larger the adjustment range and the adjustment precision for the reference voltage are.
The error amplifying module 204 includes an operational amplifier OPA, the sampling voltage VS is input from a positive input terminal of the operational amplifier OPA, and the reference voltage VR is input from a negative input terminal of the operational amplifier OPA. When the sampling voltage VS is consistent with the reference voltage VR, the operational amplifier OPA outputs a zero-bias voltage, so that the charging current ICHG output by the power tube MP is equal to the preset charging current in the current charging stage. When the charging current ICHG deviates from the preset charging current, a deviation is generated between the sampling voltage VS and the reference voltage VR, the operational amplifier OPA amplifies a difference value between the sampling voltage VS and the reference voltage VR, and outputs an error amplification signal to the sampling tube MPS of the charging current output module 201 and the gate of the power tube MP, so as to control the resistance of the power tube MP, adjust the charging current ICHG flowing through the power tube MP, correct the deviation between the charging current ICHG and the preset charging current, and thus realize the accurate control of the charging current.
In this embodiment, the error amplification module 204 is an operational amplifier OPA, and the output error amplification signal is a voltage signal, which can be directly used as the gate voltage of the power transistor MP; in other embodiments, the error amplifying module 204 may further include a transconductance amplifier, where the output error amplifying signal is a current signal, and the current signal needs to be converted into a voltage signal through a load resistor, and then the gate of the power transistor MP is controlled. In other embodiments, the error amplifying module 204 may also sample other circuit structures, and those skilled in the art may select an appropriate circuit structure as needed to implement the function of the error amplifying module 204.
In the above embodiments, the first switch, the third switch and the fourth switch may all adopt a switching element, such as a transistor or a triode, to implement a switching function. And the on-off state of each switch is controlled by the control signal corresponding to each switch through high and low levels.
Referring to fig. 3, a circuit implementation diagram of the control module 205 according to an embodiment of the invention is shown.
The control module 205 includes inverters and an in-phase buffer.
The charging mode signal FAST _ CHG is a high-low level signal, and the high-low level signal represents different charging phases respectively. In this embodiment, when the charging mode signal FAST _ CHG is at a high level, it represents a FAST charging stage, and the preset charging current is larger; the charging mode signal FAST _ CHG is low, which represents the pre-charging period, and the charging current is set to be small.
The control module 205 outputs a corresponding control signal according to the level state of the charging mode signal FAST _ CHG, and selects a sampling resistor in the sampling module 202, a reference resistor in the reference generating module 204, and a power transistor in the charging current output module 201.
An in-phase buffer B1 and an in-phase buffer B2 are sequentially connected in series between the input end of the control module 205 and the output end of the sampling control signal VG2, and the sampling control signal VG2 is in phase with the charging mode signal FAST _ CHG; the in-phase buffer B1 outputs a sample control signal VG1, which is VG1 in phase with the charge mode signal FAST _ CHG.
An in-phase buffer B3 and an inverter inv1 are sequentially connected in series between the input end of the control module 205 and the output end of the sampling voltage control signal VC2, so that the sampling voltage control signal VC2 is in anti-phase with the charging mode signal FAST _ CHG; the in-phase buffer B3 outputs a sample voltage control signal VC1, which is VC1 in phase with the charge mode signal FAST _ CHG.
An in-phase buffer B4 and an inverter inv2 are sequentially connected in series between the input end of the control module 205 and the output end of the reference voltage control signal VD2, so that the reference voltage control signal VD2 is opposite to the charging mode signal FAST _ CHG; the in-phase buffer B4 outputs a sampling voltage control signal VD1, and the reference voltage control signal VD1 is in phase with the charging mode signal FAST _ CHG.
Fig. 4 is a schematic waveform diagram of signals of the charging current control circuit according to the embodiment when controlling the charging current.
In the PRE-charging stage, the charging mode signal FAST _ CHG is at a low level, and the charging current ICHG _ PRE is small; in the FAST charge phase, the charge mode signal FAST _ CHG is high, and the charge current ICHG _ FAST is large.
In the pre-charging stage, the charging current is very small, and at this time, VG1 and VG1 are both low level, and the first switches SW5 and SW6 are controlled to be turned off, at this time, the size of the power tube MP is minimum, and at this time, the sampling ratio is maximum. When entering the fast charging stage, at this time, VG1 and VG1 are both at a high level, the first switches SW5 and SW6 are controlled to be closed and conducted, at this time, the size of the power tube MP is the largest, and the sampling ratio is the smallest. Through the control, the sampling proportion of the pre-charging stage is larger than that of the fast charging stage, the size of the power tube MP is adjusted to be smaller in the pre-charging stage, so that even if the charging current is smaller in the pre-charging stage, the current IMP _ PER flowing through the unit power tube is larger than the current IMF _ PER flowing through the unit power tube in the fast charging stage due to the fact that the size of the effective power tube is smaller, and the current flowing through the sampling tube MPS is larger due to the fact that the sampling proportion is larger, so that the working states of the power tube and the sampling tube cannot fall into a sub-threshold area with larger sampling offset.
Meanwhile, different reference voltages VR can be adopted correspondingly in the pre-charging stage and the quick-charging stage. In the pre-charging stage, the reference voltage control signal VD1 is at a low level, VD2 is at a high level, the fourth switch SW3 is controlled to be turned off, the fourth switch SW4 is controlled to be turned on, and the reference voltage is controlled to be at a low levelVR _ PRE ═ IREF × R4; in the fast charging stage, the reference voltage control signal VD1 is at a high level, VD2 is at a low level, the fourth switch SW3 is controlled to be turned on, the fourth switch SW4 is turned off, and the reference voltage VR _ PRE is IREF R3. In this embodiment, the sampling ratio of the FAST charge phase is much smaller than that of the precharge phase, and the smaller ratio of the sampling ratio is smaller than the larger ratio of the charging current, so that the sampling voltage VS _ FAST of the FAST charge phase is smaller than the sampling voltage VS _ PRE of the precharge phase instead. Therefore, in this embodiment, R3 is set<R4, making the reference voltage VR _ FAST of the FAST charging stage smaller than the reference voltage VR of the pre-charging stage-PRE。
In other embodiments, the reference voltages in different charging phases may be adjusted reasonably according to the charging current magnitude ratios, sampling ratios, and the like in different charging phases. In some embodiments, the reference voltage during the fast charge phase needs to be adjusted to be greater than the reference voltage during the precharge phase.
In this embodiment, in the PRE-charge stage, the control module 205 outputs the sampling voltage control signal VC1 at a low level and VC2 at a high level, so that the third switch SW1 is turned off and SW2 is turned on, and the sampling voltage VS _ PRE is ISEN × R1; in the FAST charge stage, the sampling voltage control signal VC1 is high, and VC2 is low, so that the third switch SW1 is turned on, SW2 is turned off, and the sampling voltage VS _ FAST is ISEN × R2. Since ISEN is ICHG × R, the sampling voltage VS of each charging phase can be further adjusted by appropriately setting the sizes of R1 and R2.
In the embodiment of the invention, by adjusting the sampling proportion and the reference voltage, the working point of the sampled voltage can be always maintained at a higher voltage value in the pre-charging stage and the fast-charging stage without deviating from the normal range, thereby reducing the requirements on the detuning performance of the operational amplifier OPA in the error amplification module 204 and the power supply voltage, improving the accuracy of the error amplification signal output by the error amplification module 204 on the adjustment of the charging current, and further improving the stable control capability of the error amplification module 204 on the constant current loop compensation of the charging current.
In some embodiments, there may be only one sampling circuit in the sampling module 202, and the same sampling resistor is used to convert the sampling current into the sampling voltage at different stages.
Fig. 5 is a schematic structural diagram of a charging current control circuit according to an embodiment of the present invention.
In this embodiment, in the charging current output module 201, the power tube MP includes only one sub-power tube, and the sampling tube MPs includes three sub-sampling tubes MP 1-MP 3, wherein gates of the sub-sampling tube MP2 and the sub-sampling tube MP3 are respectively connected to the output end of the error amplifying module 204 through second switches SW7 and SW8, and the control module 205 outputs sampling control signals VG1 and VG2 to respectively control on/off states of the second switches SW7 and SW 8.
Fig. 6 is a schematic circuit diagram of the control module 205 according to an embodiment.
In this embodiment, an inverter inv3 and a non-inverting buffer B5 are connected in series between the input terminal of the control module 205 and the output terminal of the sampling control signal VG2, the inverter inv3 is used for outputting the sampling voltage control signal VG1, the sampling control signal VG2 and the charging mode signal are inverted, and the sampling control signal VG1 and the charging mode signal FAST _ CHG are inverted.
An in-phase buffer B6 and an inverter inv4 are sequentially connected in series between the input end of the control module 205 and the output end of the sampling voltage control signal VC2, so that the sampling voltage control signal VC2 is in anti-phase with the charging mode signal FAST _ CHG; the in-phase buffer B6 outputs a sample voltage control signal VC1, which is VC1 in phase with the charge mode signal FAST _ CHG.
An in-phase buffer B7 and an inverter inv5 are sequentially connected in series between the input end of the control module 205 and the output end of the reference voltage control signal VD2, so that the reference voltage control signal VD2 is opposite to the charging mode signal FAST _ CHG; the in-phase buffer B4 outputs a sampling voltage control signal VD1, and the reference voltage control signal VD1 is in phase with the charging mode signal FAST _ CHG.
In this embodiment, in the pre-charge stage, the sampling control signals VG1 and VG2 are both high level, the second switches SW7 and SW8 are turned on, the three sub-sampling tubes MPS1 to MPS3 are all valid sub-sampling tubes, the size of the sampling tube MPS is the largest, and the sampling ratio between the sampling tube MPS and the power tube MP is the largest. In the fast charge stage, the sampling control signals VG1 and VG2 are both low level, the second switches SW7 and SW8 are both off, only the sub-sampling tube MPS1 is an effective sampling tube, and the size of the sampling tube MPS is reduced, so that the sampling ratio becomes small. Through the control, the sampling proportion of the pre-charging stage is far larger than that of the fast-charging stage. Since the sampling tube MPS has a larger size at a low current, and the sampling tube MPS has a lower current, although the working state may fall into a sub-threshold region where the sampling is not adjusted, the sampling precision may also be improved due to the increase of the sampling ratio.
Meanwhile, in order to reduce the offset influence of the operational amplifier OPA in different charging stages, the reference voltage VR can be adjusted to be always at a higher voltage, so that the offset influence of the OPA can be smaller when the charging current is smaller.
In this embodiment, other parts of the charging current control module are the same as those in the previous embodiment, and are not described herein again.
In other embodiments, the power tube may include a plurality of sub power tubes, and the sampling tube may include a plurality of sub sampling tubes, and the control module may simultaneously adjust the sampling ratio by controlling the number of the sub power tubes and the sub sampling tubes that are connected.
The embodiment of the invention also provides a charging current control method.
Fig. 7 is a schematic flow chart illustrating a charging current control process according to the present invention.
The charging current control method includes:
and S101, sampling the charging current according to a sampling proportion and outputting the sampling current.
And step S102, converting the sampling current into sampling voltage.
Specifically, the sampling current may be converted into a sampling voltage through a sampling resistor.
And S103, carrying out error amplification on the sampling voltage and the reference voltage, and controlling the sampling current through an error amplification signal.
The sampling voltage and the reference voltage may be error amplified by an operational amplifier.
And step S104, adjusting the sampling proportion according to different charging modes.
The charging current can be output through a power tube, the charging current is sampled by a sampling tube according to a sampling proportion, and the sampling proportion is adjusted by adjusting the size proportion between the sampling tube and the power tube.
In one embodiment, the power tube comprises at least two sub power tubes, and the sampling ratio is adjusted by controlling the number of the sub power tubes effective in the power tube. Wherein, there is the sub power tube that the electric current passes through as the effective sub power tube.
In another embodiment, the sampling tube comprises at least two sub-sampling tubes, the sampling ratio is adjusted by controlling the number of effective sub-sampling tubes, wherein the sub-sampling tube through which current passes is used as the effective sub-sampling tube.
In another embodiment, the sampling tube comprises at least two sub-sampling tubes, the power tube comprises at least two sub-power tubes, and the sampling ratio is adjusted by controlling the number of effective sub-power tubes and effective sub-sampling tubes.
Specifically, different charging modes correspond to different preset charging currents; when the preset charging current corresponding to the charging mode is increased, the sampling proportion is reduced; when the preset charging current corresponding to the charging mode signal is reduced, the sampling proportion is improved, so that when the charging current is larger or smaller, the working states of the power tube and the sampling tube cannot deviate from the normal working range, the sampling accuracy can be improved, and the accuracy of current control is improved.
In some embodiments, adjusting the reference voltage according to different charging modes is further included. In one embodiment, when the preset charging current corresponding to the charging mode is increased, the reference voltage is increased; and when the preset charging current corresponding to the charging mode signal is reduced, reducing the reference voltage. In other embodiments, the reference voltage may be adjusted to a value corresponding to the preset charging current according to a sampling ratio, the preset charging current, and the like in the current charging mode.
In some embodiments, the method further includes adjusting the sampling resistor according to different charging modes, so that the sampling voltage is always kept in a higher operating point range when the sampling proportion is changed, and the offset influence of the operational amplifier is reduced. For example, when the preset charging current corresponding to the charging mode signal is increased, the sampling resistance is properly increased; when the preset charging current corresponding to the charging mode signal is decreased, the sampling resistance is properly decreased,
the embodiment of the invention also provides an electronic device, which comprises the charging current control circuit and a battery in the embodiment; the current input end of the battery is connected to the charging current output end of the charging current control current. The charging current of the battery is controlled by the charging current control circuit, so that the charging current can be accurately controlled in various charging stages, and the charging efficiency and the service life of the battery are improved.
The embodiment of the invention also provides a charging method of the electronic equipment, which comprises the step of controlling the charging current by adopting the charging current control method in the embodiment so as to realize accurate control of the charging current in various charging stages.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent flow transformations made by using the contents of the specification and the drawings, such as the mutual combination of technical features between various embodiments, or the direct or indirect application to other related technical fields, are included in the scope of the present invention.
Claims (19)
1. A charging current control circuit, comprising:
the charging current output module is used for outputting charging current and outputting sampling current obtained by sampling the charging current according to a sampling proportion;
the sampling module is connected with the charging current output module and is used for acquiring sampling voltage according to the sampling current;
the reference generation module is used for generating a reference voltage;
the error amplification module is connected with the sampling module and the reference generation module and used for carrying out error amplification on the sampling voltage and the reference voltage, outputting an error amplification signal to the charging current output module and controlling the charging current;
and the control module is used for outputting a corresponding sampling control signal to the charging current output module according to the charging mode signal and adjusting the sampling proportion.
2. The charge current control circuit of claim 1, wherein adjusting the sampling ratio comprises: when the preset charging current corresponding to the charging mode signal is increased, the sampling proportion is reduced; and/or when the preset charging current corresponding to the charging mode signal is reduced, the sampling proportion is increased.
3. The charge current control circuit of claim 1, wherein the charge current output module comprises: a power tube and a sampling tube; the grid electrode of the sampling tube is connected with the grid electrode of the power tube and is connected to the output end of the error amplification module; the source electrodes of the sampling tube and the power tube are connected to a power supply end; the drain electrode of the power tube is used for outputting charging current, and the drain electrode of the sampling tube is connected to the sampling module and used for outputting sampling current.
4. The charging current control circuit according to claim 3, wherein the power transistor includes N sub power transistors connected in parallel, wherein a gate of at least one sub power transistor is connected to at least one first switch in a one-to-one correspondence and connected to the output terminal of the error amplification module through the first switch, and N is an integer greater than or equal to 2; the sampling control signal is used for controlling the on-off state of each first switch.
5. The charging current control circuit according to claim 3, wherein the sampling pipes comprise M sub-sampling pipes connected in parallel, wherein the grid of at least one sub-sampling pipe is connected with at least one second switch in a one-to-one correspondence manner and is connected to the output end of the error amplification module through the second switch, and M is an integer greater than or equal to 2; the sampling control signal is used for controlling the on-off state of each second switch.
6. The charging current control circuit of claim 1, wherein the reference generation module is configured to generate at least two reference voltage values; the control module is further used for outputting a reference voltage control signal according to the charging mode signal and controlling the reference generation module to output a corresponding reference voltage.
7. The charge current control circuit of claim 6, wherein controlling the reference generation module to output the corresponding reference voltage comprises: when the preset charging current corresponding to the charging mode signal is a first preset current, outputting a first reference voltage; when the preset charging current corresponding to the charging mode signal is a second preset current, outputting a second reference voltage; the first preset current is smaller than the first preset current, and the first reference voltage is larger than the second reference voltage.
8. The charge current control circuit of claim 1, wherein the reference generation module comprises: the reference current source is respectively connected with at least two paths of resistors between the output end of the reference current source and a grounding end, each path of resistor is respectively connected with the reference current source through a corresponding third switch, and the connection ends of the at least two paths of resistors and the reference current source are used for outputting reference voltage; the reference voltage control signal is used for controlling the on-off state of each third switch.
9. The charge current control circuit of claim 1, wherein the sampling module comprises: the voltage clamping unit and the voltage sampling unit; the voltage clamping unit is connected to the drain electrode of the sampling tube and the drain electrode of the power tube and is used for clamping the drain electrode voltage of the sampling tube to the drain electrode voltage of the power tube; the voltage sampling unit is used for converting the sampling current into sampling voltage through a sampling resistor and outputting the sampling voltage to the error amplification module; the control module is also used for outputting a sampling voltage control signal according to the charging mode signal and controlling the size of the sampling resistor.
10. The charge current control circuit of claim 9, wherein the voltage clamping unit comprises a third transistor, a second transistor, a first constant current source connected to ground, and a second constant current source; the source electrode of the third transistor is connected to the sampling current output end of the charging current output module, and the drain electrode of the third transistor is connected to the first constant current source; the source electrode of the second transistor is connected to the drain electrode of the power tube, and the drain electrode of the second transistor is connected to the second constant current source; the gates of the third and second transistors are commonly connected to the drain of the third transistor.
11. The charging current control circuit according to claim 9, wherein the voltage sampling unit comprises a first transistor, a source of the first transistor is connected to the sampling current output terminal of the charging current output module, a drain of the first transistor is connected to at least two sampling resistors, and the two sampling circuits are respectively connected in series between a drain of the third transistor and a ground terminal through corresponding fourth switches; the sampling voltage control signal is used for controlling the on-off state of the fourth switch.
12. A charging current control method, comprising:
sampling the charging current according to a sampling proportion, and outputting a sampling current;
converting the sampled current to a sampled voltage;
carrying out error amplification on the sampling voltage and the reference voltage, and controlling the sampling current through an error amplification signal;
and adjusting the sampling proportion according to different charging modes.
13. The charging current control method according to claim 12, wherein different charging modes correspond to different preset charging currents; when the preset charging current corresponding to the charging mode is increased, the sampling proportion is reduced; and when the preset charging current corresponding to the charging mode is reduced, the sampling proportion is increased.
14. The charging current control method according to claim 13, wherein when the preset charging current corresponding to the charging mode increases, the reference voltage is decreased; and when the preset charging current corresponding to the charging mode signal is reduced, the reference voltage is increased.
15. The charging current control method according to claim 13, wherein the charging current is output through a power tube, and the charging current is sampled by a sampling tube in accordance with a sampling ratio.
16. The charging current control method according to claim 15, wherein the power tube comprises at least two sub power tubes, and the sampling ratio is adjusted by controlling the number of sub power tubes effective therein.
17. The charge current control method of claim 15, wherein the sampling pipes comprise at least two sub-sampling pipes, and the sampling ratio is adjusted by controlling the number of sub-sampling pipes effective therein.
18. An electronic device, comprising:
the charging current control circuit according to any one of claims 1 to 11;
and the current input end of the battery is connected to the charging current output end of the charging current control circuit.
19. A charging method for an electronic device, for charging a battery of the electronic device, comprising: the charging current control method according to any one of claims 12 to 17 is used to control the charging current.
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