CN102970008B - Rapid transient response pulse duration modulation circuit - Google Patents

Abstract

The invention discloses a rapid transient response pulse duration modulation circuit which comprises a PWM(pulse-width modulation)modulator, an incline compensation circuit, a current detecting circuit as well as an error amplifier, wherein the current detecting circuit comprises an LX voltage transferring circuit and a detecting current generator; the output end of the LX voltage transferring circuit is connected with the input end of a detecting current generator, and the PWM modulator comprises a voltage-current comparator, an amplifying circuit and a shaping circuit; the incline compensation circuit adopts a segmental incline compensation structure which converts incline voltage into a current for stacking and comparison, the input end of the voltage-current comparator is respectively connected with the detecting current generator, the error amplifier and the output signal of the incline compensation circuit; and the output end of the voltage-current comparator is connected with the input end of the amplifying circuit, the output end of the amplifying circuit is connected with the input end of the shaping circuit, and the output end of the shaping circuit can output a signal for a PWM modulation circuit.

Description

A kind of fast transient response pulse width modulation circuit

Technical field

The present invention relates to supply convertor, particularly at a kind of fast transient response pulse width modulation circuit of IC interior, belong to microelectronics technology.

Background technology

In system-on-chip designs, power supply plan adopts Dynamic voltage scaling technology can reduce the power consumption of whole system, and this technical requirement output voltage is variable, and can adjust fast.Traditional peak current mode dc-dc, because it has transient response and simple compensating circuit faster, is better than the major control mode that voltage mode control becomes power supply chip always.The topological structure of peak current mode, as shown in Figure 1, core, one, the inside is exactly pulse-width modulator to basic topology, i.e. PWM device.The signal of the signal of PWM primary recipient slope compensation, current detection signal and error amplifier (EA), carries out calculation process and then obtains the pulse width modulating signal that system needs.The general voltage of complexity that needs turns electric current, electric current supercircuit and a comparator circuit.Due to the needs to voltage switching at a high speed, complicated topology limits the raising of speed.

Summary of the invention

The object of the invention is to solve traditional DC-DC power source chip, the delay time brought due to PWM device, electric current detecting structure complexity is long, the problem that transient response when causing output voltage to switch is slow.For this reason, the invention provides a kind of fast transient response pulse width modulation circuit, by the electric current I that EA output end voltage transforms _eAthe electric current I transformed with slope generation voltage _sC, current detection circuit export electric current I _cSand compare, when both have intersection point, circuit overturns.Current detection circuit adopts unconventional nonlinear organization, can obtain the function expression detecting electric current I cs and inductive current IL.It is the section linear compensating of 0 that slope compensation compensates slope when taking little duty ratio, effectively can improve load capacity and the transient response of system.

Above-mentioned purpose of the present invention is achieved through the following technical solutions: a kind of fast transient response pulse width modulation circuit, based on peak current mode dc-dc topological structure, comprise PWM device, current detection circuit, slope compensation circuit and error amplifier, PWM device receives the signal of slope compensation, the signal of current detection signal and error amplifier, carry out the pulse width modulating signal that then calculation process obtains system needs, it is characterized in that: current detection circuit comprises LX voltage transfer circuit and detects current generator, the output of LX voltage transfer circuit is connected with the input detecting current generator, PWM device comprises voltage-to-current comparator, amplifying circuit and shaping circuit, ramp voltage is converted into electric current and superposes the segmentation slope compensation structure compared by slope compensation circuit employing, the input of voltage-to-current comparator connects the output signal detecting current generator, error amplifier and slope compensation circuit respectively, the output of voltage-to-current comparator connects the input of amplifying circuit, the output of amplifying circuit connects the input of shaping circuit, the output of shaping circuit is PWM circuit output signal, wherein:

In current detection circuit, the source electrode that LX voltage transfer circuit comprises switching tube MP1 and PMOS M1, MP1 connects supply voltage, the grid connection control voltage Vcontrol1 of MP1, the drain electrode of MP1 connects the source electrode of M1, and the grid of M1 meets control signal Vcontrol2, and the drain electrode of M1 is output; Detect current generator and comprise PMOS M2 ~ M5, NMOS tube M6 ~ M7 and bias current Ibias1, the grid of M2 meets control signal Vcontrol3, the source electrode of M2 connects supply voltage, the drain electrode of M2 connects the drain electrode of the M1 in the source electrode of M3 and LX voltage transfer circuit, the drain electrode of M3 connects the grid of bias current Ibias1 and M3, M5, the other end ground connection of bias current Ibias1, the source electrode of M5 is connected with the drain electrode of M4, the source electrode of M4 connects supply voltage, the grounded-grid of M4, the drain electrode of M5 connects the drain electrode of NMOS tube M6, the source ground of M6.The grid of M6 is connected with the drain interconnection of M6 and with the grid of M7, the source ground of M7, the drain electrode output current Ics of M7;

Slope compensation circuit comprises PMOS M8, NMOS tube M9, electric capacity C1 and bias current Ibias2, the source electrode of M8 connects supply voltage, the grid of M8 is connected with the grid of M9 and connection control voltage Vcontrol4, the drain electrode of M8 is connected by the drain electrode of bias current Ibias2 and M9 and one end of electric capacity C1, as the source electrode of the output voltage signal Vsc of slope compensation circuit, M9, the equal ground connection of the other end of electric capacity C1;

In PWM device, voltage-to-current comparator comprises NMOS tube M10 ~ M12, PMOS M13 ~ M14, and resistance R3, R4, the grid of M10 is as an input of PWM device, connect the output Vea of error amplifier, , one end of the source electrode contact resistance R3 of M10, the other end ground connection of R3, the drain electrode of M10 connects the drain electrode of M13, the source electrode of M13 connects supply voltage, the grid of M13 is connected with drain interconnection and with the grid of M14, the source electrode of M14 connects supply voltage, the drain electrode of M14 connects the drain electrode of M12, the grid of M12 connect pole and meet bias voltage Vbias1, the source electrode of M12 connects the drain electrode of M11, another input as PWM device is connected with the output current Ics detecting current generator in current detection circuit, the grid of M11 is connected with the output voltage signal Vsc of slope compensation circuit as the 3rd input of PWM device, one end of the source electrode connecting resistance R4 of M11, the other end ground connection of R4, amplifying circuit comprises PMOS M15 and NMOS tube M16, the grid of M15 connects the source electrode of M12 and the drain electrode of M11 in voltage-to-current comparator, the source electrode of M15 connects supply voltage, the drain electrode of M15 connects the drain electrode of M16, and as the output of amplifying circuit, the grid of M16 connects bias voltage Vbisa2, the source ground of M16, shaping circuit comprises inverter INV1, and the input of INV1 connects the output of amplifying circuit, and the output of INV1 is pulse width modulating signal output.

Advantage of the present invention and remarkable result:

(1) voltage-to-current comparator structure taked by PWM device of the present invention, and the electric current sum that the electric current that the electric current transform EA output end voltage and slope generation voltage transform, current detection circuit export compares; And after mirror current source, adopt a N pipe to carry out clamper.This structure enormously simplify the pwm circuit structure of traditional complexity, saves the delay time of loop, improves the voltage follow ability of system and the response speed of system.

(2) the present invention utilizes two common gate P tube grid voltage these equilibrium relationships equal, obtains simple non-linear current detection architecture.The same with PWM structure, this simple circuit structure improves the Dynamic voltage scaling ability of system.

(3) slope compensation circuit superposes by ramp voltage being converted into electric current the mode compared, and realizes the segmentation slope compensation of uncompensation under little duty ratio.This structure can avoid the overcompensation situation when duty ratio is less than 0.5, improves the load capacity of system, extends system bandwidth, be conducive to the voltage follow performance of improvement system.

Accompanying drawing explanation

Fig. 1 is existing peak current mode DC-DC circuit topology block diagram;

Fig. 2 is theory diagram of the present invention;

Fig. 3 is a kind of specific implementation circuit diagram of the present invention.

Embodiment

As Fig. 2, the present invention includes PWM device, current detection circuit, slope compensation circuit and error amplifier, PWM device receives the signal Vea of slope compensation signal Vsc, current detection signal Ics and error amplifier, carries out the pulse width modulating signal that then calculation process obtains system needs.Current detection circuit comprises LX voltage transfer circuit 1 and detects electric current I cs=f (I _l) generator 2.LX is the connected node voltage of MP1 pipe and MN1 pipe in Fig. 1, and the output V1 of LX voltage transfer circuit 1 is connected with the input detecting current generator 2; PWM device comprises voltage-to-current comparator 4, amplifying circuit 5 and shaping circuit 6, and ramp voltage is converted into electric current and superposes the segmentation slope compensation 3 compared by slope compensation circuit employing, and its input signal is control voltage Vcontrol4.The input of voltage-to-current comparator 4 connects the output signal Vsc detecting current generator output current Ics, error amplifier output Vea and slope compensation circuit respectively, the output V2 of voltage-to-current comparator 4 connects the input of amplifying circuit 5, the output V3 of amplifying circuit 5 connects the input of shaping circuit 6, and the output of shaping circuit 6 is the pulse width modulating signal of PWM circuit output.

As Fig. 3, in current detection circuit, LX voltage transfer circuit 1 comprises main switch MP1 and PMOS M1, the source electrode of MP1 connects supply voltage, the grid connection control voltage Vcontrol1 of MP1, the drain electrode of MP1 is LX point voltage, connects the source electrode of M1, the grid of M1 meets control signal Vcontrol2, and the drain electrode of M1 is output V1.LX voltage transfer circuit 1 is in order at inductive current ascent stage, the voltage on LX node can be copied and be transferred to Ics=f (IL) generator 2.As shown in Figure 3, adopt a metal-oxide-semiconductor M1 being operated in dark linear zone, the voltage near-duplicate on LX point can be come.

Detect current generator 2 and comprise PMOS M2 ~ M5, NMOS tube M6 ~ M7 and bias current Ibias1, the grid of M2 meets control signal Vcontrol3, the source electrode of M2 connects supply voltage, the source electrode of the drain electrode connection M3 of M2 exports V1 as input with the drain electrode of M1 in LX voltage transfer circuit 1 and is connected, the drain electrode of M3 connects bias current Ibias1 and M3, the grid of M5, the other end ground connection of bias current Ibias1, the source electrode of M5 is connected with the drain electrode of M4, the source electrode of M4 connects supply voltage, the grounded-grid of M4, the drain electrode of M5 connects the drain electrode of NMOS tube M6, the source ground of M6.The grid of M6 is connected with the drain interconnection of M6 and with the grid of M7, the source ground of M7, the drain electrode output current Ics of M7.Ics=f (IL) generator 2 can adopt mirror-image structure linearly to be copied by the electric current of IL, but because linear structure needs electric current accurately to copy, so required circuit structure can be very complicated, device delay time can be very long.As shown in Figure 3, the present invention adopts the simple nonlinear organization of a kind of structure, utilizes the grid voltage of metal-oxide-semiconductor M5 and M7 this relation equal, can obtain Ics and I _lcurrent expression.

Slope compensation circuit 3 comprises PMOS M8, NMOS tube M9, electric capacity C1 and bias current Ibias2, the source electrode of M8 connects supply voltage, the grid of M8 is connected with the grid of M9 and connection control voltage Vcontrol4, the drain electrode of M8 is connected by the drain electrode of bias current Ibias2 and M9 and one end of electric capacity C1, as the source electrode of the output voltage signal Vsc of slope compensation circuit, M9, the equal ground connection of the other end of electric capacity C1.The input signal Vcontrol4 of slope compensation circuit 3 is the feedback control signal that PWM comparator output terminal signal produces after digital circuit.Vcontrol4 is a square-wave signal, relevant with system duty cycle, by controlling the length of the discharge and recharge time of slope compensation electric capacity, thus can realize section linear compensating.Compensating slope when duty ratio is less than 0.5 is 0, is a fixing slope compensation slope when duty ratio is greater than 0.5.

In PWM device, voltage-to-current comparator 4 comprises NMOS tube M10 ~ M12, PMOS M13 ~ M14, and resistance R3, R4, the grid of M10 is as an input of PWM device, connect the output Vea of error amplifier, , one end of the source electrode contact resistance R3 of M10, the other end ground connection of R3, the drain electrode of M10 connects the drain electrode of M13, the source electrode of M13 connects supply voltage, the grid of M13 is connected with drain interconnection and with the grid of M14, the source electrode of M14 connects supply voltage, the drain electrode of M14 connects the drain electrode of M12, the grid of M12 connect pole and meet bias voltage Vbias1, the source electrode of M12 connects the drain electrode of M11, another input as PWM device is connected with the output current Ics detecting current generator in current detection circuit, the grid of M11 is connected with the output voltage signal Vsc of slope compensation circuit as the 3rd input of PWM device, one end of the source electrode connecting resistance R4 of M11, the other end ground connection of R4.Voltage-to-current comparator 4 is in order to by EA output end voltage Vea, and the output end voltage Vsc of slope compensation circuit 3 changes current signal into, by I _sC, I _cSelectric current superposes, then by I _eAwith I _sC, I _cSand compare.Voltage-to-current comparator 4 can adopt a comparator configuration, utilizes the current characteristics comparing pipe, input voltage is converted into electric current, is directly compared by electric current, and the result compared is sent into next stage amplifying circuit 5.

Amplifying circuit 5 comprises PMOS M15 and NMOS tube M16, the grid of M15 connects the source electrode of M12 in voltage-to-current comparator 4 and the drain electrode output V2 of M11, the source electrode of M15 connects supply voltage, the drain electrode of M15 connects the drain electrode of M16, and as the output V3 of amplifying circuit, the grid of M16 connects bias voltage Vbisa2, the source ground of M16..Amplifying circuit 5 can take various structures, both can adopt cascodes, also can adopt common-source stage structure.Under the condition that gain meets, in order to obtain the circuit structure of simplifying most, Fig. 3 takes the simplest common-source amplifier structure, and V2 signal input amplifying circuit 5 is obtained signal V3, carries out amplifying and sends into next stage shaping circuit 6.

Shaping circuit 6 comprises inverter INV1, and the input of INV1 connects the output V3 of amplifying circuit, and the output of INV1 is pulse width modulating signal of the present invention.The effect of shaping circuit 6 is in order to the output signal V3 shaping by amplifying circuit 5.The output signal of amplifying circuit V3 is analog signal, in order to obtain digital signal PWM_OUT at PWM output, will carry out shaping to analog signal.

The operation principle of circuit of the present invention is as follows: when inductive current is in ascent stage, and control signal Vcontrol2 makes M1 pipe open work, and control signal Vcontrol1, Vcontrol3 make MP1, M2 pipe end.LX voltage is by being operated in the M1 pipe transmission of dark linear zone, i.e. V ₁≈ V _lX.M4 pipe is operated in dark linear zone, is equivalent to a resistance.Bias current Ibias1 provides biased to M3, and the grid voltage of M5 and M3 is equal, and M6, M7 are current mirror duplicate circuit, by regulating the breadth length ratio of M6, M7, can obtain the proportionality coefficient that current mirror copies.Now suppose (W/L) ₇(W/L) ₆=1. utilize the grid voltage of M7 and M5 equal, V _g3=V _g5, Ics=f (I can be obtained _l) be shown below:

$\frac{I_L}{u_P{C}_{\mathrm{OX}}{\left(\frac{W}{L}\right)}_{\mathrm{MP}1}[V_{\mathrm{DD}}-V_{\left|\mathrm{TH}\right|\_\mathrm{MP}1}]}=\sqrt{\frac{I_{\mathrm{CS}}}{u_P{C}_{\mathrm{OX}}{\left(\frac{W}{L}\right)}_{M5}}}+V_{\left|\mathrm{TH}\right|\_M5}\frac{I_{\mathrm{CS}}}{2u_P{C}_{\mathrm{OX}}{\left(\frac{W}{L}\right)}_{M4}[V_{\mathrm{DD}}-V_{\left|\mathrm{TH}\right|\_M4}]}-V_{\mathrm{SG}3}$

Wherein, I _lfor inductive current, μ _pfor PMOS mobility, C _oXfor PMOS unit are gate oxide capacitance, (W/L) _mP1and V _{| TH|_MP1}be respectively breadth length ratio and the threshold voltage of PMOS shown in Fig. 1, (W/L) _m4, (W/L) _m5and V _{| TH|_M4}, V _{| TH|_M5}be respectively breadth length ratio and the threshold voltage of M4 pipe and M5 pipe in Fig. 3, Ics is the drain electrode output current Ics of M7 in Fig. 3, V _dDfor supply voltage.Due to bias current I _bias1be a constant, so VGS3 is constant in the gate source voltage above formula of M3.As shown in above formula, because be not adopt the principle that copies of current mirror, so the electric current I cs that obtains of this current detection circuit and inductive current I _lfor non-linear relation.The structure of this circuit is simple, and time delay is little and low in energy consumption.

The control signal Vcontrol4 of slope compensation circuit is the feedback control signal relevant with duty ratio that PWM device output end signal produces after digital circuit, can realize segmentation slope compensation.When Vcontrol4 is low, M8 opens, and M9 turns off, and bias current Ibias2 charges to electric capacity C1, exports Vsc ramp voltage signal; When Vcontrol4 is high, M8 turns off, and M9 opens, and electric capacity C1 is discharged by M9.When duty is smaller, when being less than 0.5, capacitor charging time shortens, and the Vsc voltage of output is less, and be not enough to M11 pipe is opened, slope generation voltage cannot be converted to electric current and compare in PWM device.This just means, when duty ratio is less, slope compensation slope is 0, when duty ratio is larger, is a fixing slope compensation slope, namely achieves the function of section linear compensating.

PWM device is a comparator configuration, and its first order is a current comparator, and the second level is that first stage amplifier adds shaping circuit.When PWM device works, output voltage error amplifier Vea is converted into electric current I by M10 pipe _ea, V _scelectric current I is converted into by M11 pipe _sc, M13, M14 are a current mirror, and proportionality coefficient is 1, replica current I _ea, obtain image current I _ea1.Derivation obtains electric current:

$I_{\mathrm{ea}}=V_{\mathrm{ea}}\×\frac{g_{m10}}{1+g_{m10}\×R3}$

$I_{\mathrm{SC}}=V_{\mathrm{SC}}\×\frac{g_{m11}}{1+g_{m11}\×R4}$

Wherein, g _m10and g _m11be respectively the mutual conductance of M10 pipe and M11 pipe in Fig. 3, R3 and R4 is the resistance value of resistance shown in Fig. 3.At V2 place, I _eawith I _sC, I _cSand compare, when both have intersection point, V2 place voltage overturns, through amplification, shaping circuit, output signal PWM_OUT.

For ensureing that M14 pipe can copy the electric current of M13 pipe more accurately, M14 pipe need be operated in saturation region, introduces M12 pipe for this reason.M12 pipe has the effect of switch and clamper, first arranging Vbias1 is appropriate value, secondly adjustment M12 pipe makes it be in linear zone when normal work, the Vds of M14 is made to have certain value, it is made to be operated in saturation region, and the point voltage of V2 can not be too high, make M15 be operated in saturation region and play amplification.

The present invention takes the PWM device structure of the structure of a voltage-to-current-voltage+comparator different from traditional, this voltage-to-current comparator configuration is simplified, and coordinate slope compensation circuit to achieve segmentation slope compensation that low duty ratio slope compensation slope is 0, not only reduce the delay time of system, and segmentation slope compensation improves system bandwidth, substantially increase the Fast dynamic voltage adjustment capability of system.

Claims (1)

1. a fast transient response pulse width modulation circuit, based on peak current mode dc-dc topological structure, comprise PWM device, current detection circuit, slope compensation circuit and error amplifier, PWM device receives the signal of the signal of slope compensation, current detection signal and error amplifier, carry out the pulse width modulating signal that then calculation process obtains system needs, it is characterized in that: current detection circuit comprises voltage transfer circuit and detects current generator, the output of voltage transfer circuit is connected with the input detecting current generator; PWM device comprises voltage-to-current comparator, amplifying circuit and shaping circuit, ramp voltage is converted into electric current and superposes the segmentation slope compensation structure compared by slope compensation circuit employing, the input of voltage-to-current comparator connects the output signal detecting current generator, error amplifier and slope compensation circuit respectively, the output of voltage-to-current comparator connects the input of amplifying circuit, the output of amplifying circuit connects the input of shaping circuit, the output of shaping circuit is PWM circuit output signal, wherein:

In current detection circuit, the source electrode that voltage transfer circuit comprises switching tube MP1 and PMOS M1, MP1 connects supply voltage, the grid connection control voltage Vcontrol1 of MP1, the drain electrode of MP1 connects the source electrode of M1, and the grid of M1 meets control signal Vcontrol2, and the drain electrode of M1 is output, detect current generator and comprise PMOS M2 ~ M5, NMOS tube M6 ~ M7 and bias current Ibias1, the grid of M2 meets control signal Vcontrol3, the source electrode of M2 connects supply voltage, the drain electrode of M2 connects the drain electrode of the M1 in the source electrode of M3 and voltage transfer circuit, the drain electrode of M3 connects bias current Ibias1 and M3, the grid of M5, the other end ground connection of bias current Ibias1, the source electrode of M5 is connected with the drain electrode of M4, the source electrode of M4 connects supply voltage, the grounded-grid of M4, the drain electrode of M5 connects the drain electrode of NMOS tube M6, the source ground of M6, the grid of M6 is connected with the drain interconnection of M6 and with the grid of M7, the source ground of M7, the drain electrode output current Ics of M7,

Slope compensation circuit comprises PMOS M8, NMOS tube M9, electric capacity C1 and bias current Ibias2, the source electrode of M8 connects supply voltage, the grid of M8 is connected with the grid of M9 and connection control voltage Vcontrol4, the drain electrode of M8 is connected by the drain electrode of bias current Ibias2 and M9 and one end of electric capacity C1, as the source electrode of the output voltage signal Vsc of slope compensation circuit, M9, the equal ground connection of the other end of electric capacity C1;

In PWM device, voltage-to-current comparator comprises NMOS tube M10 ~ M12, PMOS M13 ~ M14, and resistance R3, R4, the grid of M10 is as an input of PWM device, connect the output Vea of error amplifier, , one end of the source electrode contact resistance R3 of M10, the other end ground connection of R3, the drain electrode of M10 connects the drain electrode of M13, the source electrode of M13 connects supply voltage, the grid of M13 is connected with drain interconnection and with the grid of M14, the source electrode of M14 connects supply voltage, the drain electrode of M14 connects the drain electrode of M12, the grid of M12 connect pole and meet bias voltage Vbias1, the source electrode of M12 connects the drain electrode of M11, another input as PWM device is connected with the output current Ics detecting current generator in current detection circuit, the grid of M11 is connected with the output voltage signal Vsc of slope compensation circuit as the 3rd input of PWM device, one end of the source electrode connecting resistance R4 of M11, the other end ground connection of R4, amplifying circuit comprises PMOS M15 and NMOS tube M16, the grid of M15 connects the source electrode of M12 and the drain electrode of M11 in voltage-to-current comparator, the source electrode of M15 connects supply voltage, the drain electrode of M15 connects the drain electrode of M16, and as the output of amplifying circuit, the grid of M16 connects bias voltage Vbisa2, the source ground of M16, shaping circuit comprises inverter INV1, and the input of INV1 connects the output of amplifying circuit, and the output of INV1 is pulse width modulating signal output.