CN114865913A - On-time generator with low power consumption function - Google Patents

On-time generator with low power consumption function Download PDF

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Publication number
CN114865913A
CN114865913A CN202210316551.3A CN202210316551A CN114865913A CN 114865913 A CN114865913 A CN 114865913A CN 202210316551 A CN202210316551 A CN 202210316551A CN 114865913 A CN114865913 A CN 114865913A
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power consumption
low power
resistor
time
capacitor
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陈晓飞
张泽宸
程炼
李嘉桦
邹雪城
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Huazhong University of Science and Technology
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Huazhong University of Science and Technology
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a conduction time generator with a low power consumption function, which can detect whether a system enters a low power consumption mode or not, can prolong the conduction time in the low power consumption mode, further prolong the switching period, reduce the switching loss and the driving loss, and improve the conversion efficiency of a DC-DC converter under light load, and is characterized in that: the on-time generator comprises a low power consumption mode detection circuit and an on-time generation circuit, wherein the low power consumption mode detection circuit is used for outputting a low power consumption signal LPM to the on-time generation circuit, and the on-time generation circuit is used for outputting an on-time timing end signal TON to a logic and driving circuit of the DC-DC converter.

Description

On-time generator with low power consumption function
Technical Field
The invention relates to the technical field of DC-DC converters, in particular to a conduction time generator with a low power consumption function.
Background
In recent years, portable electronic devices typified by smartphones have been rapidly developed. The voltage of a lithium battery serving as a power supply inside the portable electronic device is usually 2.7-4.3V, but the operating voltage of an operation unit such as an internal processor is 1.8V or less, so that a Buck-type DC-DC converter is required inside the device to realize the step-down conversion of the DC voltage. The battery capacity of portable electronic devices is severely limited in view of size and safety, and thus the DC-DC converter is required to maintain high conversion efficiency over the full load range, and to have high load transient response performance in view of the fact that these devices are often switched in application scenarios such as screen-off and screen-on.
Constant On-Time (COT) is a very suitable application for power management of portable devices because of its high efficiency under light load and fast transient response. COT control means that the switching period is changed by controlling the conduction time of the upper power tube to be constant, so that the output voltage is kept at a desired value. The main modules of the COT control include a PWM comparator and an on-time generator. Whenever the feedback voltage V is FB Down to a reference voltage V REF And meanwhile, the output of the PWM comparator is turned over, so that the upper power tube is conducted, and the conduction time is determined by the conduction time generator.
If the on-time can be prolonged when the load is reduced, the switching period can be prolonged, and then the switching loss and the driving loss can be reduced, and the purpose of improving the conversion efficiency is achieved. Therefore, in order to further improve the conversion efficiency of the DC-DC converter under light load, it is currently necessary to design an on-time generator of a Buck DC-DC converter applied to COT control.
Disclosure of Invention
In order to solve the above-mentioned problems, the present invention provides a turn-on time generator with a low power consumption function, which is capable of detecting whether a system enters a low power consumption mode, and prolonging a turn-on time in the low power consumption mode, thereby prolonging a switching period, reducing a switching loss and a driving loss, and improving a conversion efficiency of a DC-DC converter under a light load.
The technical scheme is as follows:
on-time generator with low power consumption function, characterized in that: the on-time generator comprises a low power consumption mode detection circuit and an on-time generation circuit, wherein the low power consumption mode detection circuit is used for outputting a low power consumption signal LPM to the on-time generation circuit, and the on-time generation circuit is used for outputting an on-time timing end signal TON to a logic and driving circuit of the DC-DC converter.
The low-power-consumption mode detection circuit comprises a current source I1, one end of the current source I1 is connected with a power supply VIN, the other end of the current source I1 is connected with a source electrode of a MOS transistor M10, and a grid electrode of the MOS transistor M10 is connected with an input signal
Figure BDA0003569959940000021
The drain electrode of the MOS tube M20 is connected with the drain electrode of the MOS tube M20, one end of the capacitor C1 and the source electrode of the transmission gate TG1, the grid electrode of the MOS tube M20 is connected with the input signal VN, the source electrode of the MOS tube M20 is connected with the other end of the capacitor C1 and the ground, the grid electrode of the transmission gate TG1 is connected with the input signal VP and the input signal VP
Figure BDA0003569959940000022
The drain is connected with the source of a transmission gate TG2, and the gates of the transmission gates TG2 are respectively connected with an input signal
Figure BDA0003569959940000023
AND VP, a drain is respectively connected with one end of a capacitor C2 AND an input end of an inverter INV1, the other end of the capacitor C2 is connected to ground, an output end of the inverter INV1 is connected with an input end of the inverter INV2, an output end of the inverter INV2 is connected with a first input end of an AND gate AND1, a second input end of the AND gate AND1 is connected with an input signal ZCD, an output end of the AND gate AND1 is connected with a first input end of an AND gate AND2, a second input end of the AND gate 2 is connected with an input signal SSFINISH, AND an output end of the AND gate AND2 outputs an LPM signal.
The on-time generation circuit comprises an operational amplifier EA, wherein the in-phase input end of the operational amplifier EA is respectively connected with one end of a resistor R1 and one end of a resistor R2, the reverse-phase input end of the operational amplifier EA is respectively connected with one end of a resistor RON and the source electrode of a MOS tube M2, the output end of the operational amplifier EA is connected with the grid electrode of a MOS tube M2, the other end of the resistor R1 is connected with a power supply VIN, the other ends of the resistor R2 and the resistor RON are connected with the ground, the drain electrode of the MOS tube M2 is respectively connected with the drain electrode of a MOS tube M0, the grid electrode of the MOS tube M1, the source electrodes of the MOS tube M0 and the MOS tube M1 are both connected with the power supply VIN, the drain electrode of the MOS tube M1 is respectively connected with the reverse-phase input end of a comparator CMP, one end of a capacitor CON, one end of a capacitor CLPM and the drain electrode of a MOS tube M3, the other end of the capacitor CON is connected with the ground, the other end of the capacitor CLPM is connected with the drain electrode of the MOS tube M5, and the gate electrode of the input signal LPM 5 is connected with the input signal LPM, the source of the MOS transistor M3 is connected to ground, the gate of the MOS transistor M3 is connected to the input signal RESET of the DC-DC converter, the source of the MOS transistor M4 is connected to ground, the non-inverting input end of the comparator CMP is connected to the source of the MOS transistor M5 and one end of the resistor R4 respectively, the drain of the MOS transistor M4 is connected to the power supply VIN, the gate of the comparator CMP is connected to the input signal Vb2, the other end of the resistor R5 is connected to ground, the other end of the resistor R4 is connected to the input signal VOUT, and the output end of the comparator CMP outputs the TON signal.
Threshold time T at which the inverters INV1 and INV2 flip TH,LPM Comprises the following steps:
Figure BDA0003569959940000031
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance value of the capacitor C1.
Threshold I of load current for entering low power consumption mode LOAD,TH Comprises the following steps:
Figure BDA0003569959940000032
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OUT Is the output voltage value of the DC-DC converter, L is the inductance value, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance value of the capacitor C1, R ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
The on-time T generated by the on-time generator under normal state ON Comprises the following steps:
Figure BDA0003569959940000033
in the formula, R 1 Is the resistance of resistor R1, R 2 Is the resistance of resistor R2, R 4 Is the resistance of resistor R4, R 5 Is the resistance value of resistor R5, V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OIT Is the output voltage value, R, of the DC-DC converter ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
The on-time T generated by the on-time generator in the low power consumption mode ON,LPM Comprises the following steps:
Figure BDA0003569959940000041
in the formula C LPM Is the capacitance value of the capacitor CPLM; hypothesis C LPM =K·C ON And then: t is On,LPM = (K+1)·T ON
The invention has the beneficial effects that:
1. the invention designs a low power consumption mode detection circuit and a conduction time generation circuit to form a conduction time generator with a low power consumption function, which can detect whether a system enters a low power consumption mode or not, and can prolong the conduction time in the low power consumption mode, thereby prolonging the switching period, reducing the switching loss and the driving loss, and improving the conversion efficiency of the DC-DC converter under light load.
2. The invention can also be implemented by setting the capacitance value of the capacitor CPLM, for example by setting C LPM =K·C ON Then, thenT ON,LPM =(K+1)·T ON Therefore, the conduction time in the low power consumption mode is K +1 times of that in the normal state, and the applicability and the controllability of the conduction time generator are further improved.
Description of the drawings:
FIG. 1 is a schematic diagram of an overall structure of a DC-DC converter;
FIG. 2 is a schematic diagram of a low power mode detection circuit;
FIG. 3 is a schematic diagram of a classical adaptive on-time generation circuit;
FIG. 4 is a schematic diagram of a turn-on time generation circuit;
FIG. 5 is a waveform diagram illustrating the DCM operation.
Detailed Description
The present invention will be further described with reference to the following examples.
The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention. The conditions in the embodiments can be further adjusted according to specific conditions, and simple modifications of the method of the present invention based on the concept of the present invention are within the scope of the claimed invention.
Fig. 1 is a schematic diagram of an overall structure of a DC-DC converter, in which SW is a switch node voltage signal, ZCD is a zero-cross detection signal, LPM is an output signal of a low power consumption mode detection circuit, RESET is a RESET signal of an on-time generator, which is provided by a logic module of the DC-DC converter, TON is an on-time timing end signal, and a high level pulse is output when timing is ended.
The on-time generator with the low power consumption function comprises a low power consumption mode detection circuit and an on-time generation circuit, wherein the low power consumption mode detection circuit is used for outputting a low power consumption signal LPM to the on-time generation circuit, and the on-time generation circuit is used for outputting an on-time timing end signal TON to a logic and driving circuit of the DC-DC converter.
As shown in fig. 2, the low power consumption mode detection circuit includes a current source I1, one end of the current source I1 is connected to a power source VIN, the other end is connected to a source of a MOS transistor M10, and a gate of the MOS transistor M10Connecting input signals
Figure BDA0003569959940000051
The drain electrode of the MOS tube M20 is connected with the drain electrode of the MOS tube M20, one end of the capacitor C1 and the source electrode of the transmission gate TG1, the grid electrode of the MOS tube M20 is connected with the input signal VN, the source electrode of the MOS tube M20 is connected with the other end of the capacitor C1 and the ground, and the grid electrode of the transmission gate TG1 is connected with the input signal VP and the ground respectively
Figure BDA0003569959940000052
The drain electrode is connected with the source electrode of the transmission gate TG2, and the gate electrodes of the transmission gate TG2 are respectively connected with the input signal
Figure BDA0003569959940000053
AND VP AND drain are respectively connected to one end of a capacitor C2 AND an input end of an inverter INV1, the other end of the capacitor C2 is connected to ground, an output end of the inverter INV1 is connected to an input end of the inverter INV2, an output end of the inverter INV2 is connected to a first input end of an AND gate AND1, a second input end of the AND gate AND1 is connected to the input signal ZCD, an output end of the AND gate AND1 is connected to a first input end of an AND gate AND2, a second input end of the AND gate 2 is connected to the input signal SSFINISH, AND an output end of the AND gate AND2 outputs an LPM signal.
The operation of the low power consumption Mode detection circuit can be divided into three states, which respectively correspond to an on stage, an off stage and an on stage in a system Discontinuous Conduction Mode (DCM) operating state:
in the off phase VN ═ VP ═ 1, when M10 and M20 are both on, TG1 is off. The discharge current flowing through M20 is much larger than I 1 And capacitor C1 is reset. C2 is a sample-and-hold capacitor that stores the voltage of the last cycle C1.
In the discontinuous phase, VN is 0, VP is 1, M10 is on, M20 is off, TG1 is off, current source I1 charges the C1 capacitor, and the C1 upper plate voltage rises linearly from 0.
In the on phase, VN is 0, M10 and M20 are both off, the plate voltage on C1 is the voltage at the end of the off phase, TG1 is on, and the capacitance of C2 is designed to be much smaller than C1, so V2 is considered to be approximately equal to V1 after the transfer gate is opened. A dummy device TG2 is added after the transmission gate TG1 is designed to reduce the influence of charge injection effect.
The working process of the circuit is as follows: the low power consumption mode detection circuit resets the capacitor C1 in the off stage, charges the capacitor C1 by a constant current source in the off stage, and samples and holds the charging result in the on stage and compares the charging result to judge whether the system enters the low power consumption mode. Wherein ZCD is a zero-crossing detection signal and is at a high level in the discontinuous stage; SSFINISH is a soft start completion signal, and the high level marks the completion of chip start; LPM is a low power consumption signal that marks the on time generator needs to extend the on time generated at this time; the logic protection system can enter the low power consumption mode after the start is completed and within the intermittent time, so that the false triggering of the low power consumption mode is avoided. When the duration of the intermittent phase is longer than a threshold time T TH,LPM Then, the inverter will turn over, so that the low power consumption signal LPM becomes high level; simultaneously according to threshold time T TH,LPM The threshold value I of the current can be derived LOAD,TH And obtaining the load current when the on-time generator enters the low power consumption mode.
Power supply voltage value V with inversion threshold of one half for inverters INV1 and INV2 IN When the time is long enough for the upper plate voltage of the capacitor C1 to be charged to the flipping threshold, the inverter flips:
Figure BDA0003569959940000061
i.e. the threshold time T at which the inverters INV1 and INV2 flip TH,LPM Comprises the following steps:
Figure BDA0003569959940000062
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance value of the capacitor C1.
The waveform of the DCM operation is shown in fig. 5, and neglecting the current of the feedback network, the energy of the inductor current flows into the load resistor completely, so the periodic average value of the inductor current is equal to the load current:
Figure BDA0003569959940000071
there is a balance from the inductor current volt-second:
Figure BDA0003569959940000072
the above formula is arranged as follows:
Figure BDA0003569959940000073
Figure BDA0003569959940000074
here, the repetition (22), i.e. the on-time controlled by the on-time generator:
Figure BDA0003569959940000075
the expression from the united equation (5) and equation (7) to the peak value of the inductor current:
Figure BDA0003569959940000076
bringing the above formula (4) to obtain:
Figure BDA0003569959940000077
adding formula (5) and formula (6):
Figure BDA0003569959940000078
will T SW Minus T ON And T OFF The off-time T can be obtained D The size of (A) is as follows:
Figure BDA0003569959940000079
the conditions of 5V of input voltage, 1.2V of output voltage and 10mA of load current are substituted as follows:
Figure BDA0003569959940000081
it can therefore be approximated as:
Figure BDA0003569959940000082
let T TH,LPM =T SW Obtaining a threshold value I of the load current entering a low power consumption mode LOAD,TH Comprises the following steps:
Figure BDA0003569959940000083
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OUT Is the output voltage value of the DC-DC converter, L is the inductance value, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance value of the capacitor C1, R ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
The basic principle of the on-time generating circuit: the conduction time of the V2COT controlled Buck type DC-DC designed by the invention is defined as follows:
Figure BDA0003569959940000084
here, the switching period is designed to be 0.5us, and in a Continuous Conduction Mode (CCM) state, the operating frequency is:
Figure BDA0003569959940000085
therefore, if the on-time is equal to V IN Is inversely proportional to V OUT And in proportion, the operating frequency of the system in the CCM state is fixed. Common methods of creating the on-time of the above conditions are: by using a compound of formula V IN Charging the capacitor with positive specific current, inputting the voltage of the upper plate of the capacitor into a comparator, and designing the flip threshold and V of the comparator OUT Proportional, the time for the capacitor to charge to reach the rollover threshold and V IN Is inversely proportional to V OUT Is in direct proportion.
As shown in fig. 3, assuming that M11 and M21, and M31 and M41 are the same in size, the magnitude of the charging current flowing to the capacitor C11 is:
Figure BDA0003569959940000086
if V is satisfied IN >>V GS,M11 Then, the approximation is:
Figure BDA0003569959940000091
the on-time is therefore:
Figure BDA0003569959940000092
although the circuit structure is simple, the scheme generates the conduction time and V IN Has poor linearity, only satisfies V IN >>V GS,M11 Time, on time with V IN Approximately inversely proportional.
Burst Mode (Burst Mode) is commonly found in PWM controlled DC-DC for improving efficiency under light load. When the load is reduced to be low enough, the system enters Burst Mode, continuous multi-cycle conduction is carried out, a large amount of energy flows from the input end to the output end, the output voltage is higher, therefore, the discharging time in a DCM state is correspondingly prolonged, the purposes of prolonging the switching cycle, reducing the switching loss and the driving loss are achieved, and the efficiency under light load is further improved. By the aid of the method, COT is controlled to enter a working state similar to Burst Mode under light load, switching period is prolonged, and efficiency can be improved.
As shown in fig. 4, the on-time generating circuit of the present invention includes an operational amplifier EA, a non-inverting input terminal of the operational amplifier EA is connected to one end of a resistor R1 and one end of a resistor R2, an inverting input terminal of the operational amplifier EA is connected to one end of a resistor RON and a source of a MOS transistor M2, an output terminal of the operational amplifier EA is connected to a gate of a MOS transistor M2, the other end of the resistor R1 is connected to a power VIN, the other ends of the resistor R2 and the resistor RON are connected to ground, a drain of the MOS transistor M2 is connected to a drain of a MOS transistor M0, a gate of the MOS transistor M1, a source of the MOS transistor M0 and a source of the MOS transistor M1 are connected to the power VIN, a drain of the MOS transistor M1 is connected to an inverting input terminal of a comparator CMP, one end of a capacitor CON, one end of the capacitor CLPM and a drain of the MOS transistor M3, the other end of the capacitor CON is connected to ground, the other end of the capacitor CLPM is connected to a drain of the MOS transistor M5, the gate of the MOS transistor M5 is connected to the input signal LPM, the source is connected to ground, the gate of the MOS transistor M3 is connected to the input signal RESET, the source is connected to ground, the non-inverting input terminal of the comparator CMP is connected to the source of the MOS transistor M4, one end of the resistor R5 and one end of the resistor R4, the drain of the MOS transistor M4 is connected to the power supply VIN, the gate is connected to the input signal Vb2, the other end of the resistor R5 is connected to ground, the other end of the resistor R4 is connected to the input signal VOUT, and the output terminal of the comparator CMP outputs a TON signal. The LPM is a low power consumption signal, which is output by the low power consumption mode detection circuit. The RESET is a conducting time timing RESET signal, is at a low level when the upper power tube is conducted, and is at a high level at other times; the input signal Vb2 is a bias voltage, is provided by a chip internal bias circuit, and is used for providing a certain voltage value so that the M4 tube outputs a certain current when the chip is started.
The on-time generation circuit adopted by the invention clamps the voltage at one end of the resistor to V by introducing the operational amplifier EA IN A certain partial pressure V of b And further eliminates non-linearity. The working principle of the on-time generating circuit in a normal state is as follows: first, V b Is composed of resistors R1 and R2 for V IN Partial pressure generation of (a); then, the operational amplifiers EA, M2 and RON will V b Converting the current into a current, and charging the capacitor CON after the current is mirrored by a current mirror formed by M0 and M1; finally, as the charging progresses, the voltage V of the upper plate of the capacitor C Flip the trigger comparator CMP, the flip threshold of the comparator CMP and V OUT And (4) correlating. The charging current of the capacitor can thus be expressed as:
Figure BDA0003569959940000101
here, the on-time generated by the on-time generator in the normal state may be expressed as:
Figure BDA0003569959940000102
in the formula, R 1 Is the resistance of a resistor R1, R 2 Is the resistance of resistor R2, R 4 Is the resistance of resistor R4, R 5 Is the resistance value of resistor R5, V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OUT Is the output voltage value, R, of the DC-DC converter ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
From the formula, it can be seen that the on-time and V IN Is inversely proportional to V OUT Is in direct proportion and has a proportionality coefficient of
Figure BDA0003569959940000103
Design R of the invention 1 =2R 2 ,R 4 =R 5 Comprises the following steps:
Figure BDA0003569959940000111
when the system is just powered on, V OUT If the comparator flip threshold is 0, the system will suffer from a power-on failure. M4 provides certain electric current when the system just powers on and flows through R5, makes the upset threshold value of comparator be greater than zero, guarantees that the system can start smoothly. The output voltage gradually rises along with the startup of the system, the gate-source voltage of the M4 drops, and the M4 tube is completely turned off after the startup of the system is completed.
When the load is higher than the threshold I LOAD,TH When the LPM signal output by the low power consumption mode detection circuit is at a low level, the system is in a normal state. When the load is lower than the threshold I LOAD,TH Then, the LPM signal output by the low power consumption mode detection circuit is at a high level, and the M5 transistor in the on-time generation circuit is turned on, so that the capacitor CON is connected in parallel with a capacitor CLPM in the low power consumption mode.
Therefore, the on-time T generated by the on-time generator in the low power consumption mode at this time ON,LPM Comprises the following steps:
Figure BDA0003569959940000112
in the formula C LPM Is the capacitance value of the capacitor CPLM; hypothesis C LPM =K·C ON Then the on-time can be simplified as:
T ON,LPM =(K+1)·T oN #(24)
therefore, in the low power consumption mode, the conduction time is changed to be K +1 times of the original conduction time, the energy transmitted from the input end in each switching period is changed to be K +1 times, and the switching period is naturally changed to be K +1 times of the energy in normal working, so that the aims of reducing the switching loss and the driving loss are fulfilled.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (6)

1. On-time generator with low power consumption function, characterized in that: the on-time generator comprises a low power consumption mode detection circuit and an on-time generation circuit, wherein the low power consumption mode detection circuit is used for outputting a low power consumption signal LPM to the on-time generation circuit, and the on-time generation circuit is used for outputting an on-time timing end signal TON to a logic and driving circuit of the DC-DC converter;
the low-power-consumption mode detection circuit comprises a current source I1, one end of the current source I1 is connected with a power supply VIN, the other end of the current source I1 is connected with a source electrode of a MOS transistor M10, and a grid electrode of the MOS transistor M10 is connected with an input signal
Figure FDA0003569959930000011
The drain electrode of the MOS tube M20 is connected with the drain electrode of the MOS tube M20, one end of the capacitor C1 and the source electrode of the transmission gate TG1, the grid electrode of the MOS tube M20 is connected with the input signal VN, the source electrode of the MOS tube M20 is connected with the other end of the capacitor C1 and the ground, the grid electrode of the transmission gate TG1 is connected with the input signal VP and the ground respectively
Figure FDA0003569959930000012
The drain electrode is connected with the source electrode of the transmission gate TG2, and the gate electrodes of the transmission gate TG2 are respectively connected with the input signal
Figure FDA0003569959930000013
VP AND drain are respectively connected with one end of a capacitor C2 AND the input end of an inverter INV1, the other end of the capacitor C2 is connected with ground, the output end of the inverter INV1 is connected with the input end of an inverter INV2, the output end of the inverter INV2 is connected with the first input end of an AND gate AND1, the second input end of the AND gate AND1 is connected with an input signal ZCD, the output end of the AND gate AND1 is connected with the first input end of an AND gate AND2, AND the second input end of the AND gate AND2 is connected with an input signal SSFINISH, the output of AND gate AND2 outputs the LPM signal.
2. The on-time generator with low power consumption function according to claim 1, characterized in that: the on-time generation circuit comprises an operational amplifier EA, wherein the non-inverting input end of the operational amplifier EA is respectively connected with one end of a resistor R1 and one end of a resistor R2, the inverting input end of the operational amplifier EA is respectively connected with one end of a resistor RON and the source electrode of a MOS tube M2, the output end of the operational amplifier EA is connected with the gate electrode of a MOS tube M2, the other end of the resistor R1 is connected with a power supply VIN, the other ends of the resistor R2 and the resistor RON are connected with the ground, the drain electrode of the MOS tube M2 is respectively connected with the drain electrode and the gate electrode of a MOS tube M0 and the gate electrode of the MOS tube M1, the source electrodes of the MOS tube M0 and the MOS tube M1 are both connected with the power supply VIN, the drain electrode of the MOS tube M1 is respectively connected with the inverting input end of a comparator CMP, one end of a capacitor CON, one end of a capacitor CLPM and the drain electrode of a MOS tube M3, the other end of the capacitor CON is connected with the drain electrode of the MOS tube M5, and the gate electrode of the MOS tube M5 is connected with an input signal LPM, the source of the MOS transistor M3 is connected to ground, the gate of the MOS transistor M3 is connected to the input signal RESET of the DC-DC converter, the source of the MOS transistor M4 is connected to ground, the non-inverting input end of the comparator CMP is connected to the source of the MOS transistor M5 and one end of the resistor R4, the drain of the MOS transistor M4 is connected to the power supply VIN, the gate of the comparator CMP is connected to the input signal Vb2, the other end of the resistor R5 is connected to ground, the other end of the resistor R4 is connected to the input signal VOUT, and the output end of the comparator CMP outputs the TON signal.
3. The on-time generator with low power consumption function according to claim 1, characterized in that: threshold time T at which the inverters INV1 and INV2 flip TH,LPM Comprises the following steps:
Figure FDA0003569959930000021
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance of the capacitor C1The value is obtained.
4. The on-time generator with low power consumption function according to claim 1, characterized in that: threshold I of load current for entering low power consumption mode LOAD,TH Comprises the following steps:
Figure FDA0003569959930000022
in the formula V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OUT Is the output voltage value of the DC-DC converter, L is the inductance value, I 1 Is the output current value, C, of the current source I1 1 Is the capacitance value of the capacitor C1, R ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
5. The on-time generator with low power consumption function according to claim 2, characterized in that: the on-time T generated by the on-time generator under normal state ON Comprises the following steps:
Figure FDA0003569959930000023
in the formula R 1 Is the resistance of resistor R1, R 2 Is the resistance of resistor R2, R 4 Is the resistance of resistor R4, R 5 Is the resistance value of resistor R5, V IN Is the input voltage value of the DC-DC converter, i.e. the voltage value of the power supply VIN, V OIT Is the output voltage value, R, of the DC-DC converter ON Is the resistance value of the resistor RON, C ON Is the capacitance value of the capacitor CON.
6. The on-time generator with low power consumption function according to claim 2, characterized in that: the on-time T generated by the on-time generator in the low power consumption mode ON,LPM Comprises the following steps:
Figure FDA0003569959930000031
in the formula C LPM Is the capacitance value of the capacitor CPLM; hypothesis C LPM =K·C ON And then: t is ON,LPM =(K+1)·T ON
CN202210316551.3A 2022-03-29 2022-03-29 On-time generator with low power consumption function Pending CN114865913A (en)

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